source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 2aceec5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 2aceec5 was ef9460b, checked in by Jiri Svoboda <jiri@…>, 14 years ago

ddf_fun_add_match_id() should copy its string argument.
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File size: 21.1 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 const usb_address_t hub_address =
130 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
131 if (hub_address <= 0) {
132 usb_log_error("Failed to get OHCI root hub address: %s\n",
133 str_error(hub_address));
134 return hub_address;
135 }
136 instance->rh.address = hub_address;
137 usb_device_keeper_bind(
138 &instance->manager, hub_address, hub_fun->handle);
139
140#define CHECK_RET_RELEASE(ret, message...) \
141if (ret != EOK) { \
142 usb_log_error(message); \
143 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
144 usb_device_keeper_release(&instance->manager, hub_address); \
145 return ret; \
146} else (void)0
147
148 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
149 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
150 CHECK_RET_RELEASE(ret,
151 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
152
153 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
154 CHECK_RET_RELEASE(ret,
155 "Failed to add root hub match-id: %s.\n", str_error(ret));
156
157 ret = ddf_fun_bind(hub_fun);
158 CHECK_RET_RELEASE(ret,
159 "Failed to bind root hub function: %s.\n", str_error(ret));
160
161 return EOK;
162#undef CHECK_RET_RELEASE
163}
164/*----------------------------------------------------------------------------*/
165/** Initialize OHCI hc driver structure
166 *
167 * @param[in] instance Memory place for the structure.
168 * @param[in] regs Address of the memory mapped I/O registers.
169 * @param[in] reg_size Size of the memory mapped area.
170 * @param[in] interrupts True if w interrupts should be used
171 * @return Error code
172 */
173int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
174{
175 assert(instance);
176
177#define CHECK_RET_RETURN(ret, message...) \
178if (ret != EOK) { \
179 usb_log_error(message); \
180 return ret; \
181} else (void)0
182
183 int ret =
184 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
185 CHECK_RET_RETURN(ret,
186 "Failed to gain access to device registers: %s.\n", str_error(ret));
187
188 list_initialize(&instance->pending_batches);
189 usb_device_keeper_init(&instance->manager);
190
191 ret = usb_endpoint_manager_init(&instance->ep_manager,
192 BANDWIDTH_AVAILABLE_USB11);
193 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
194 str_error(ret));
195
196 ret = hc_init_memory(instance);
197 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
198 str_error(ret));
199#undef CHECK_RET_RETURN
200
201 fibril_mutex_initialize(&instance->guard);
202
203 hc_gain_control(instance);
204
205 if (!interrupts) {
206 instance->interrupt_emulator =
207 fibril_create((int(*)(void*))interrupt_emulator, instance);
208 fibril_add_ready(instance->interrupt_emulator);
209 }
210
211 rh_init(&instance->rh, instance->registers);
212 hc_start(instance);
213
214 return EOK;
215}
216/*----------------------------------------------------------------------------*/
217/** Create and register endpoint structures.
218 *
219 * @param[in] instance OHCI driver structure.
220 * @param[in] address USB address of the device.
221 * @param[in] endpoint USB endpoint number.
222 * @param[in] speed Communication speeed of the device.
223 * @param[in] type Endpoint's transfer type.
224 * @param[in] direction Endpoint's direction.
225 * @param[in] mps Maximum packet size the endpoint accepts.
226 * @param[in] size Maximum allowed buffer size.
227 * @param[in] interval Time between transfers(interrupt transfers only).
228 * @return Error code
229 */
230int hc_add_endpoint(
231 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
232 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
233 size_t mps, size_t size, unsigned interval)
234{
235 endpoint_t *ep =
236 endpoint_get(address, endpoint, direction, type, speed, mps);
237 if (ep == NULL)
238 return ENOMEM;
239
240 hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
241 if (hcd_ep == NULL) {
242 endpoint_destroy(ep);
243 return ENOMEM;
244 }
245
246 int ret =
247 usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
248 if (ret != EOK) {
249 hcd_endpoint_clear(ep);
250 endpoint_destroy(ep);
251 return ret;
252 }
253
254 /* Enqueue hcd_ep */
255 switch (ep->transfer_type) {
256 case USB_TRANSFER_CONTROL:
257 instance->registers->control &= ~C_CLE;
258 endpoint_list_add_ep(
259 &instance->lists[ep->transfer_type], hcd_ep);
260 instance->registers->control_current = 0;
261 instance->registers->control |= C_CLE;
262 break;
263 case USB_TRANSFER_BULK:
264 instance->registers->control &= ~C_BLE;
265 endpoint_list_add_ep(
266 &instance->lists[ep->transfer_type], hcd_ep);
267 instance->registers->control |= C_BLE;
268 break;
269 case USB_TRANSFER_ISOCHRONOUS:
270 case USB_TRANSFER_INTERRUPT:
271 instance->registers->control &= (~C_PLE & ~C_IE);
272 endpoint_list_add_ep(
273 &instance->lists[ep->transfer_type], hcd_ep);
274 instance->registers->control |= C_PLE | C_IE;
275 break;
276 }
277
278 return EOK;
279}
280/*----------------------------------------------------------------------------*/
281/** Dequeue and delete endpoint structures
282 *
283 * @param[in] instance OHCI hc driver structure.
284 * @param[in] address USB address of the device.
285 * @param[in] endpoint USB endpoint number.
286 * @param[in] direction Direction of the endpoint.
287 * @return Error code
288 */
289int hc_remove_endpoint(hc_t *instance, usb_address_t address,
290 usb_endpoint_t endpoint, usb_direction_t direction)
291{
292 assert(instance);
293 fibril_mutex_lock(&instance->guard);
294 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
295 address, endpoint, direction, NULL);
296 if (ep == NULL) {
297 usb_log_error("Endpoint unregister failed: No such EP.\n");
298 fibril_mutex_unlock(&instance->guard);
299 return ENOENT;
300 }
301
302 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
303 if (hcd_ep) {
304 /* Dequeue hcd_ep */
305 switch (ep->transfer_type) {
306 case USB_TRANSFER_CONTROL:
307 instance->registers->control &= ~C_CLE;
308 endpoint_list_remove_ep(
309 &instance->lists[ep->transfer_type], hcd_ep);
310 instance->registers->control_current = 0;
311 instance->registers->control |= C_CLE;
312 break;
313 case USB_TRANSFER_BULK:
314 instance->registers->control &= ~C_BLE;
315 endpoint_list_remove_ep(
316 &instance->lists[ep->transfer_type], hcd_ep);
317 instance->registers->control |= C_BLE;
318 break;
319 case USB_TRANSFER_ISOCHRONOUS:
320 case USB_TRANSFER_INTERRUPT:
321 instance->registers->control &= (~C_PLE & ~C_IE);
322 endpoint_list_remove_ep(
323 &instance->lists[ep->transfer_type], hcd_ep);
324 instance->registers->control |= C_PLE | C_IE;
325 break;
326 default:
327 break;
328 }
329 hcd_endpoint_clear(ep);
330 } else {
331 usb_log_warning("Endpoint without hcd equivalent structure.\n");
332 }
333 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
334 address, endpoint, direction);
335 fibril_mutex_unlock(&instance->guard);
336 return ret;
337}
338/*----------------------------------------------------------------------------*/
339/** Get access to endpoint structures
340 *
341 * @param[in] instance OHCI hc driver structure.
342 * @param[in] address USB address of the device.
343 * @param[in] endpoint USB endpoint number.
344 * @param[in] direction Direction of the endpoint.
345 * @param[out] bw Reserved bandwidth.
346 * @return Error code
347 */
348endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
349 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
350{
351 assert(instance);
352 fibril_mutex_lock(&instance->guard);
353 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
354 address, endpoint, direction, bw);
355 fibril_mutex_unlock(&instance->guard);
356 return ep;
357}
358/*----------------------------------------------------------------------------*/
359/** Add USB transfer to the schedule.
360 *
361 * @param[in] instance OHCI hc driver structure.
362 * @param[in] batch Batch representing the transfer.
363 * @return Error code.
364 */
365int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
366{
367 assert(instance);
368 assert(batch);
369 assert(batch->ep);
370
371 /* Check for root hub communication */
372 if (batch->ep->address == instance->rh.address) {
373 rh_request(&instance->rh, batch);
374 return EOK;
375 }
376
377 fibril_mutex_lock(&instance->guard);
378 list_append(&batch->link, &instance->pending_batches);
379 batch_commit(batch);
380
381 /* Control and bulk schedules need a kick to start working */
382 switch (batch->ep->transfer_type)
383 {
384 case USB_TRANSFER_CONTROL:
385 instance->registers->command_status |= CS_CLF;
386 break;
387 case USB_TRANSFER_BULK:
388 instance->registers->command_status |= CS_BLF;
389 break;
390 default:
391 break;
392 }
393 fibril_mutex_unlock(&instance->guard);
394 return EOK;
395}
396/*----------------------------------------------------------------------------*/
397/** Interrupt handling routine
398 *
399 * @param[in] instance OHCI hc driver structure.
400 * @param[in] status Value of the status register at the time of interrupt.
401 */
402void hc_interrupt(hc_t *instance, uint32_t status)
403{
404 assert(instance);
405 if ((status & ~I_SF) == 0) /* ignore sof status */
406 return;
407 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
408 if (status & I_RHSC)
409 rh_interrupt(&instance->rh);
410
411 if (status & I_WDH) {
412 fibril_mutex_lock(&instance->guard);
413 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
414 instance->registers->hcca,
415 (void *) addr_to_phys(instance->hcca));
416 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
417 instance->registers->periodic_current);
418
419 link_t *current = instance->pending_batches.head.next;
420 while (current != &instance->pending_batches.head) {
421 link_t *next = current->next;
422 usb_transfer_batch_t *batch =
423 usb_transfer_batch_from_link(current);
424
425 if (batch_is_complete(batch)) {
426 list_remove(current);
427 usb_transfer_batch_finish(batch);
428 }
429
430 current = next;
431 }
432 fibril_mutex_unlock(&instance->guard);
433 }
434
435 if (status & I_UE) {
436 hc_start(instance);
437 }
438
439}
440/*----------------------------------------------------------------------------*/
441/** Check status register regularly
442 *
443 * @param[in] instance OHCI hc driver structure.
444 * @return Error code
445 */
446int interrupt_emulator(hc_t *instance)
447{
448 assert(instance);
449 usb_log_info("Started interrupt emulator.\n");
450 while (1) {
451 const uint32_t status = instance->registers->interrupt_status;
452 instance->registers->interrupt_status = status;
453 hc_interrupt(instance, status);
454 async_usleep(10000);
455 }
456 return EOK;
457}
458/*----------------------------------------------------------------------------*/
459/** Turn off any (BIOS)driver that might be in control of the device.
460 *
461 * This function implements routines described in chapter 5.1.1.3 of the OHCI
462 * specification (page 40, pdf page 54).
463 *
464 * @param[in] instance OHCI hc driver structure.
465 */
466void hc_gain_control(hc_t *instance)
467{
468 assert(instance);
469
470 usb_log_debug("Requesting OHCI control.\n");
471 if (instance->registers->revision & R_LEGACY_FLAG) {
472 /* Turn off legacy emulation, it should be enough to zero
473 * the lowest bit, but it caused problems. Thus clear all
474 * except GateA20 (causes restart on some hw).
475 * See page 145 of the specs for details.
476 */
477 volatile uint32_t *ohci_emulation_reg =
478 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
479 usb_log_debug("OHCI legacy register %p: %x.\n",
480 ohci_emulation_reg, *ohci_emulation_reg);
481 /* Zero everything but A20State */
482 *ohci_emulation_reg &= 0x100;
483 usb_log_debug(
484 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
485 ohci_emulation_reg, *ohci_emulation_reg);
486 }
487
488 /* Interrupt routing enabled => smm driver is active */
489 if (instance->registers->control & C_IR) {
490 usb_log_debug("SMM driver: request ownership change.\n");
491 instance->registers->command_status |= CS_OCR;
492 /* Hope that SMM actually knows its stuff or we can hang here */
493 while (instance->registers->control & C_IR) {
494 async_usleep(1000);
495 }
496 usb_log_info("SMM driver: Ownership taken.\n");
497 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
498 async_usleep(50000);
499 return;
500 }
501
502 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
503 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
504 if (hc_status != C_HCFS_RESET) {
505 usb_log_debug("BIOS driver found.\n");
506 if (hc_status == C_HCFS_OPERATIONAL) {
507 usb_log_info("BIOS driver: HC operational.\n");
508 return;
509 }
510 /* HC is suspended assert resume for 20ms, */
511 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
512 async_usleep(20000);
513 usb_log_info("BIOS driver: HC resumed.\n");
514 return;
515 }
516
517 /* HC is in reset (hw startup) => no other driver
518 * maintain reset for at least the time specified in USB spec (50 ms)*/
519 usb_log_debug("Host controller found in reset state.\n");
520 async_usleep(50000);
521}
522/*----------------------------------------------------------------------------*/
523/** OHCI hw initialization routine.
524 *
525 * @param[in] instance OHCI hc driver structure.
526 */
527void hc_start(hc_t *instance)
528{
529 /* OHCI guide page 42 */
530 assert(instance);
531 usb_log_debug2("Started hc initialization routine.\n");
532
533 /* Save contents of fm_interval register */
534 const uint32_t fm_interval = instance->registers->fm_interval;
535 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
536
537 /* Reset hc */
538 usb_log_debug2("HC reset.\n");
539 size_t time = 0;
540 instance->registers->command_status = CS_HCR;
541 while (instance->registers->command_status & CS_HCR) {
542 async_usleep(10);
543 time += 10;
544 }
545 usb_log_debug2("HC reset complete in %zu us.\n", time);
546
547 /* Restore fm_interval */
548 instance->registers->fm_interval = fm_interval;
549 assert((instance->registers->command_status & CS_HCR) == 0);
550
551 /* hc is now in suspend state */
552 usb_log_debug2("HC should be in suspend state(%x).\n",
553 instance->registers->control);
554
555 /* Use HCCA */
556 instance->registers->hcca = addr_to_phys(instance->hcca);
557
558 /* Use queues */
559 instance->registers->bulk_head =
560 instance->lists[USB_TRANSFER_BULK].list_head_pa;
561 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
562 instance->lists[USB_TRANSFER_BULK].list_head,
563 instance->lists[USB_TRANSFER_BULK].list_head_pa);
564
565 instance->registers->control_head =
566 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
567 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
568 instance->lists[USB_TRANSFER_CONTROL].list_head,
569 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
570
571 /* Enable queues */
572 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
573 usb_log_debug2("All queues enabled(%x).\n",
574 instance->registers->control);
575
576 /* Enable interrupts */
577 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
578 usb_log_debug2("Enabled interrupts: %x.\n",
579 instance->registers->interrupt_enable);
580 instance->registers->interrupt_enable = I_MI;
581
582 /* Set periodic start to 90% */
583 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
584 instance->registers->periodic_start = (frame_length / 10) * 9;
585 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
586 instance->registers->periodic_start,
587 instance->registers->periodic_start, frame_length);
588
589 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
590 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
591 instance->registers->control);
592}
593/*----------------------------------------------------------------------------*/
594/** Initialize schedule queues
595 *
596 * @param[in] instance OHCI hc driver structure
597 * @return Error code
598 */
599int hc_init_transfer_lists(hc_t *instance)
600{
601 assert(instance);
602#define SETUP_ENDPOINT_LIST(type) \
603do { \
604 const char *name = usb_str_transfer_type(type); \
605 int ret = endpoint_list_init(&instance->lists[type], name); \
606 if (ret != EOK) { \
607 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
608 name, str_error(ret)); \
609 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
610 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
611 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
612 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
613 return ret; \
614 } \
615} while (0)
616
617 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
618 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
619 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
620 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
621#undef SETUP_ENDPOINT_LIST
622 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
623 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
624
625 return EOK;
626}
627/*----------------------------------------------------------------------------*/
628/** Initialize memory structures used by the OHCI hcd.
629 *
630 * @param[in] instance OHCI hc driver structure.
631 * @return Error code.
632 */
633int hc_init_memory(hc_t *instance)
634{
635 assert(instance);
636
637 bzero(&instance->rh, sizeof(instance->rh));
638 /* Init queues */
639 const int ret = hc_init_transfer_lists(instance);
640 if (ret != EOK) {
641 return ret;
642 }
643
644 /*Init HCCA */
645 instance->hcca = malloc32(sizeof(hcca_t));
646 if (instance->hcca == NULL)
647 return ENOMEM;
648 bzero(instance->hcca, sizeof(hcca_t));
649 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
650
651 unsigned i = 0;
652 for (; i < 32; ++i) {
653 instance->hcca->int_ep[i] =
654 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
655 }
656 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
657 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
658 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
659
660 return EOK;
661}
662
663/**
664 * @}
665 */
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