source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 11cb0565

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 11cb0565 was 0cd8089, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

libusbhost: Change usb_device_manager interface.

Use request_address instead of get_free_address.
Explicit USB address can be requested.
  • Property mode set to 100644
File size: 19.0 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "ohci_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 /* Try to get address 1 for root hub. */
130 instance->rh.address = 1;
131 int ret = usb_device_manager_request_address(
132 &instance->generic.dev_manager, &instance->rh.address, false,
133 USB_SPEED_FULL);
134 if (ret != EOK) {
135 usb_log_error("Failed to get OHCI root hub address: %s\n",
136 str_error(ret));
137 return ret;
138 }
139 usb_device_manager_bind_address(&instance->generic.dev_manager,
140 instance->rh.address, hub_fun->handle);
141
142#define CHECK_RET_UNREG_RETURN(ret, message...) \
143if (ret != EOK) { \
144 usb_log_error(message); \
145 usb_endpoint_manager_remove_ep( \
146 &instance->generic.ep_manager, instance->rh.address, 0, \
147 USB_DIRECTION_BOTH, NULL, NULL); \
148 usb_device_manager_release_address( \
149 &instance->generic.dev_manager, instance->rh.address); \
150 return ret; \
151} else (void)0
152 ret = usb_endpoint_manager_add_ep(
153 &instance->generic.ep_manager, instance->rh.address, 0,
154 USB_DIRECTION_BOTH, USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64,
155 0, NULL, NULL);
156 CHECK_RET_UNREG_RETURN(ret,
157 "Failed to register root hub control endpoint: %s.\n",
158 str_error(ret));
159
160 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
161 CHECK_RET_UNREG_RETURN(ret,
162 "Failed to add root hub match-id: %s.\n", str_error(ret));
163
164 ret = ddf_fun_bind(hub_fun);
165 CHECK_RET_UNREG_RETURN(ret,
166 "Failed to bind root hub function: %s.\n", str_error(ret));
167
168 return EOK;
169#undef CHECK_RET_RELEASE
170}
171/*----------------------------------------------------------------------------*/
172/** Initialize OHCI hc driver structure
173 *
174 * @param[in] instance Memory place for the structure.
175 * @param[in] regs Address of the memory mapped I/O registers.
176 * @param[in] reg_size Size of the memory mapped area.
177 * @param[in] interrupts True if w interrupts should be used
178 * @return Error code
179 */
180int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
181{
182 assert(instance);
183
184#define CHECK_RET_RETURN(ret, message...) \
185if (ret != EOK) { \
186 usb_log_error(message); \
187 return ret; \
188} else (void)0
189
190 int ret =
191 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
192 CHECK_RET_RETURN(ret,
193 "Failed to gain access to device registers: %s.\n", str_error(ret));
194
195 list_initialize(&instance->pending_batches);
196
197 hcd_init(&instance->generic, USB_SPEED_FULL,
198 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11);
199 instance->generic.private_data = instance;
200 instance->generic.schedule = hc_schedule;
201 instance->generic.ep_add_hook = ohci_endpoint_init;
202 instance->generic.ep_remove_hook = ohci_endpoint_fini;
203
204 ret = hc_init_memory(instance);
205 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
206 str_error(ret));
207#undef CHECK_RET_RETURN
208
209 fibril_mutex_initialize(&instance->guard);
210
211 hc_gain_control(instance);
212
213 if (!interrupts) {
214 instance->interrupt_emulator =
215 fibril_create((int(*)(void*))interrupt_emulator, instance);
216 fibril_add_ready(instance->interrupt_emulator);
217 }
218
219 rh_init(&instance->rh, instance->registers);
220 hc_start(instance);
221
222 return EOK;
223}
224/*----------------------------------------------------------------------------*/
225void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
226{
227 assert(instance);
228 assert(ep);
229
230 endpoint_list_t *list = &instance->lists[ep->transfer_type];
231 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
232 assert(list);
233 assert(ohci_ep);
234
235 /* Enqueue ep */
236 switch (ep->transfer_type) {
237 case USB_TRANSFER_CONTROL:
238 instance->registers->control &= ~C_CLE;
239 endpoint_list_add_ep(list, ohci_ep);
240 instance->registers->control_current = 0;
241 instance->registers->control |= C_CLE;
242 break;
243 case USB_TRANSFER_BULK:
244 instance->registers->control &= ~C_BLE;
245 endpoint_list_add_ep(list, ohci_ep);
246 instance->registers->control |= C_BLE;
247 break;
248 case USB_TRANSFER_ISOCHRONOUS:
249 case USB_TRANSFER_INTERRUPT:
250 instance->registers->control &= (~C_PLE & ~C_IE);
251 endpoint_list_add_ep(list, ohci_ep);
252 instance->registers->control |= C_PLE | C_IE;
253 break;
254 }
255}
256/*----------------------------------------------------------------------------*/
257void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
258{
259 assert(instance);
260 assert(ep);
261
262 /* Dequeue ep */
263 endpoint_list_t *list = &instance->lists[ep->transfer_type];
264 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
265
266 assert(list);
267 assert(ohci_ep);
268 switch (ep->transfer_type) {
269 case USB_TRANSFER_CONTROL:
270 instance->registers->control &= ~C_CLE;
271 endpoint_list_remove_ep(list, ohci_ep);
272 instance->registers->control_current = 0;
273 instance->registers->control |= C_CLE;
274 break;
275 case USB_TRANSFER_BULK:
276 instance->registers->control &= ~C_BLE;
277 endpoint_list_remove_ep(list, ohci_ep);
278 instance->registers->control |= C_BLE;
279 break;
280 case USB_TRANSFER_ISOCHRONOUS:
281 case USB_TRANSFER_INTERRUPT:
282 instance->registers->control &= (~C_PLE & ~C_IE);
283 endpoint_list_remove_ep(list, ohci_ep);
284 instance->registers->control |= C_PLE | C_IE;
285 break;
286 default:
287 break;
288 }
289}
290/*----------------------------------------------------------------------------*/
291/** Add USB transfer to the schedule.
292 *
293 * @param[in] instance OHCI hc driver structure.
294 * @param[in] batch Batch representing the transfer.
295 * @return Error code.
296 */
297int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
298{
299 assert(hcd);
300 hc_t *instance = hcd->private_data;
301 assert(instance);
302
303 /* Check for root hub communication */
304 if (batch->ep->address == instance->rh.address) {
305 rh_request(&instance->rh, batch);
306 return EOK;
307 }
308 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
309 if (!ohci_batch)
310 return ENOMEM;
311
312 fibril_mutex_lock(&instance->guard);
313 list_append(&ohci_batch->link, &instance->pending_batches);
314 ohci_transfer_batch_commit(ohci_batch);
315
316 /* Control and bulk schedules need a kick to start working */
317 switch (batch->ep->transfer_type)
318 {
319 case USB_TRANSFER_CONTROL:
320 instance->registers->command_status |= CS_CLF;
321 break;
322 case USB_TRANSFER_BULK:
323 instance->registers->command_status |= CS_BLF;
324 break;
325 default:
326 break;
327 }
328 fibril_mutex_unlock(&instance->guard);
329 return EOK;
330}
331/*----------------------------------------------------------------------------*/
332/** Interrupt handling routine
333 *
334 * @param[in] instance OHCI hc driver structure.
335 * @param[in] status Value of the status register at the time of interrupt.
336 */
337void hc_interrupt(hc_t *instance, uint32_t status)
338{
339 assert(instance);
340 if ((status & ~I_SF) == 0) /* ignore sof status */
341 return;
342 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
343 if (status & I_RHSC)
344 rh_interrupt(&instance->rh);
345
346 if (status & I_WDH) {
347 fibril_mutex_lock(&instance->guard);
348 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
349 instance->registers->hcca,
350 (void *) addr_to_phys(instance->hcca));
351 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
352 instance->registers->periodic_current);
353
354 link_t *current = list_first(&instance->pending_batches);
355 while (current && current != &instance->pending_batches.head) {
356 link_t *next = current->next;
357 ohci_transfer_batch_t *batch =
358 ohci_transfer_batch_from_link(current);
359
360 if (ohci_transfer_batch_is_complete(batch)) {
361 list_remove(current);
362 ohci_transfer_batch_finish_dispose(batch);
363 }
364
365 current = next;
366 }
367 fibril_mutex_unlock(&instance->guard);
368 }
369
370 if (status & I_UE) {
371 usb_log_fatal("Error like no other!\n");
372 hc_start(instance);
373 }
374
375}
376/*----------------------------------------------------------------------------*/
377/** Check status register regularly
378 *
379 * @param[in] instance OHCI hc driver structure.
380 * @return Error code
381 */
382int interrupt_emulator(hc_t *instance)
383{
384 assert(instance);
385 usb_log_info("Started interrupt emulator.\n");
386 while (1) {
387 const uint32_t status = instance->registers->interrupt_status;
388 instance->registers->interrupt_status = status;
389 hc_interrupt(instance, status);
390 async_usleep(10000);
391 }
392 return EOK;
393}
394/*----------------------------------------------------------------------------*/
395/** Turn off any (BIOS)driver that might be in control of the device.
396 *
397 * This function implements routines described in chapter 5.1.1.3 of the OHCI
398 * specification (page 40, pdf page 54).
399 *
400 * @param[in] instance OHCI hc driver structure.
401 */
402void hc_gain_control(hc_t *instance)
403{
404 assert(instance);
405
406 usb_log_debug("Requesting OHCI control.\n");
407 if (instance->registers->revision & R_LEGACY_FLAG) {
408 /* Turn off legacy emulation, it should be enough to zero
409 * the lowest bit, but it caused problems. Thus clear all
410 * except GateA20 (causes restart on some hw).
411 * See page 145 of the specs for details.
412 */
413 volatile uint32_t *ohci_emulation_reg =
414 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
415 usb_log_debug("OHCI legacy register %p: %x.\n",
416 ohci_emulation_reg, *ohci_emulation_reg);
417 /* Zero everything but A20State */
418 *ohci_emulation_reg &= 0x100;
419 usb_log_debug(
420 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
421 ohci_emulation_reg, *ohci_emulation_reg);
422 }
423
424 /* Interrupt routing enabled => smm driver is active */
425 if (instance->registers->control & C_IR) {
426 usb_log_debug("SMM driver: request ownership change.\n");
427 instance->registers->command_status |= CS_OCR;
428 /* Hope that SMM actually knows its stuff or we can hang here */
429 while (instance->registers->control & C_IR) {
430 async_usleep(1000);
431 }
432 usb_log_info("SMM driver: Ownership taken.\n");
433 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
434 async_usleep(50000);
435 return;
436 }
437
438 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
439 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
440 if (hc_status != C_HCFS_RESET) {
441 usb_log_debug("BIOS driver found.\n");
442 if (hc_status == C_HCFS_OPERATIONAL) {
443 usb_log_info("BIOS driver: HC operational.\n");
444 return;
445 }
446 /* HC is suspended assert resume for 20ms, */
447 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
448 async_usleep(20000);
449 usb_log_info("BIOS driver: HC resumed.\n");
450 return;
451 }
452
453 /* HC is in reset (hw startup) => no other driver
454 * maintain reset for at least the time specified in USB spec (50 ms)*/
455 usb_log_debug("Host controller found in reset state.\n");
456 async_usleep(50000);
457}
458/*----------------------------------------------------------------------------*/
459/** OHCI hw initialization routine.
460 *
461 * @param[in] instance OHCI hc driver structure.
462 */
463void hc_start(hc_t *instance)
464{
465 /* OHCI guide page 42 */
466 assert(instance);
467 usb_log_debug2("Started hc initialization routine.\n");
468
469 /* Save contents of fm_interval register */
470 const uint32_t fm_interval = instance->registers->fm_interval;
471 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
472
473 /* Reset hc */
474 usb_log_debug2("HC reset.\n");
475 size_t time = 0;
476 instance->registers->command_status = CS_HCR;
477 while (instance->registers->command_status & CS_HCR) {
478 async_usleep(10);
479 time += 10;
480 }
481 usb_log_debug2("HC reset complete in %zu us.\n", time);
482
483 /* Restore fm_interval */
484 instance->registers->fm_interval = fm_interval;
485 assert((instance->registers->command_status & CS_HCR) == 0);
486
487 /* hc is now in suspend state */
488 usb_log_debug2("HC should be in suspend state(%x).\n",
489 instance->registers->control);
490
491 /* Use HCCA */
492 instance->registers->hcca = addr_to_phys(instance->hcca);
493
494 /* Use queues */
495 instance->registers->bulk_head =
496 instance->lists[USB_TRANSFER_BULK].list_head_pa;
497 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
498 instance->lists[USB_TRANSFER_BULK].list_head,
499 instance->lists[USB_TRANSFER_BULK].list_head_pa);
500
501 instance->registers->control_head =
502 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
503 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
504 instance->lists[USB_TRANSFER_CONTROL].list_head,
505 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
506
507 /* Enable queues */
508 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
509 usb_log_debug2("All queues enabled(%x).\n",
510 instance->registers->control);
511
512 /* Enable interrupts */
513 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
514 usb_log_debug2("Enabled interrupts: %x.\n",
515 instance->registers->interrupt_enable);
516 instance->registers->interrupt_enable = I_MI;
517
518 /* Set periodic start to 90% */
519 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
520 instance->registers->periodic_start = (frame_length / 10) * 9;
521 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
522 instance->registers->periodic_start,
523 instance->registers->periodic_start, frame_length);
524
525 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
526 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
527 instance->registers->control);
528}
529/*----------------------------------------------------------------------------*/
530/** Initialize schedule queues
531 *
532 * @param[in] instance OHCI hc driver structure
533 * @return Error code
534 */
535int hc_init_transfer_lists(hc_t *instance)
536{
537 assert(instance);
538#define SETUP_ENDPOINT_LIST(type) \
539do { \
540 const char *name = usb_str_transfer_type(type); \
541 int ret = endpoint_list_init(&instance->lists[type], name); \
542 if (ret != EOK) { \
543 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
544 name, str_error(ret)); \
545 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
546 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
547 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
548 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
549 return ret; \
550 } \
551} while (0)
552
553 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
554 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
555 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
556 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
557#undef SETUP_ENDPOINT_LIST
558 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
559 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
560
561 return EOK;
562}
563/*----------------------------------------------------------------------------*/
564/** Initialize memory structures used by the OHCI hcd.
565 *
566 * @param[in] instance OHCI hc driver structure.
567 * @return Error code.
568 */
569int hc_init_memory(hc_t *instance)
570{
571 assert(instance);
572
573 bzero(&instance->rh, sizeof(instance->rh));
574 /* Init queues */
575 const int ret = hc_init_transfer_lists(instance);
576 if (ret != EOK) {
577 return ret;
578 }
579
580 /*Init HCCA */
581 instance->hcca = hcca_get();
582 if (instance->hcca == NULL)
583 return ENOMEM;
584 bzero(instance->hcca, sizeof(hcca_t));
585 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
586
587 for (unsigned i = 0; i < 32; ++i) {
588 instance->hcca->int_ep[i] =
589 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
590 }
591 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
592 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
593 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
594
595 return EOK;
596}
597
598/**
599 * @}
600 */
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