source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 0f1586d0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0f1586d0 was 0f1586d0, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: do not create OHCI hw structures for root hub control endpoint
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File size: 18.6 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "ohci_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 const usb_address_t hub_address =
130 device_keeper_get_free_address(
131 &instance->generic.dev_manager, USB_SPEED_FULL);
132 if (hub_address <= 0) {
133 usb_log_error("Failed to get OHCI root hub address: %s\n",
134 str_error(hub_address));
135 return hub_address;
136 }
137 instance->rh.address = hub_address;
138 usb_device_keeper_bind(
139 &instance->generic.dev_manager, hub_address, hub_fun->handle);
140
141#define CHECK_RET_RETURN(ret, message...) \
142if (ret != EOK) { \
143 usb_log_error(message); \
144 return ret; \
145} else (void)0
146 int ret = usb_endpoint_manager_add_ep(
147 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH,
148 USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64, 0);
149 CHECK_RET_RETURN(ret,
150 "Failed to register root hub control endpoint: %s.\n",
151 str_error(ret));
152
153 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
154 CHECK_RET_RETURN(ret,
155 "Failed to add root hub match-id: %s.\n", str_error(ret));
156
157 ret = ddf_fun_bind(hub_fun);
158 CHECK_RET_RETURN(ret,
159 "Failed to bind root hub function: %s.\n", str_error(ret));
160
161 return EOK;
162#undef CHECK_RET_RELEASE
163}
164/*----------------------------------------------------------------------------*/
165/** Initialize OHCI hc driver structure
166 *
167 * @param[in] instance Memory place for the structure.
168 * @param[in] regs Address of the memory mapped I/O registers.
169 * @param[in] reg_size Size of the memory mapped area.
170 * @param[in] interrupts True if w interrupts should be used
171 * @return Error code
172 */
173int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
174{
175 assert(instance);
176
177#define CHECK_RET_RETURN(ret, message...) \
178if (ret != EOK) { \
179 usb_log_error(message); \
180 return ret; \
181} else (void)0
182
183 int ret =
184 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
185 CHECK_RET_RETURN(ret,
186 "Failed to gain access to device registers: %s.\n", str_error(ret));
187
188 list_initialize(&instance->pending_batches);
189
190 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
191 CHECK_RET_RETURN(ret, "Failed to initialize generic driver: %s.\n",
192 str_error(ret));
193 instance->generic.private_data = instance;
194 instance->generic.schedule = hc_schedule;
195 instance->generic.ep_add_hook = ohci_endpoint_init;
196
197 ret = hc_init_memory(instance);
198 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
199 str_error(ret));
200#undef CHECK_RET_RETURN
201
202 fibril_mutex_initialize(&instance->guard);
203
204 hc_gain_control(instance);
205
206 if (!interrupts) {
207 instance->interrupt_emulator =
208 fibril_create((int(*)(void*))interrupt_emulator, instance);
209 fibril_add_ready(instance->interrupt_emulator);
210 }
211
212 rh_init(&instance->rh, instance->registers);
213 hc_start(instance);
214
215 return EOK;
216}
217/*----------------------------------------------------------------------------*/
218void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
219{
220 endpoint_list_t *list = &instance->lists[ep->transfer_type];
221 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
222 /* Enqueue ep */
223 switch (ep->transfer_type) {
224 case USB_TRANSFER_CONTROL:
225 instance->registers->control &= ~C_CLE;
226 endpoint_list_add_ep(list, ohci_ep);
227 instance->registers->control_current = 0;
228 instance->registers->control |= C_CLE;
229 break;
230 case USB_TRANSFER_BULK:
231 instance->registers->control &= ~C_BLE;
232 endpoint_list_add_ep(list, ohci_ep);
233 instance->registers->control |= C_BLE;
234 break;
235 case USB_TRANSFER_ISOCHRONOUS:
236 case USB_TRANSFER_INTERRUPT:
237 instance->registers->control &= (~C_PLE & ~C_IE);
238 endpoint_list_add_ep(list, ohci_ep);
239 instance->registers->control |= C_PLE | C_IE;
240 break;
241 }
242}
243/*----------------------------------------------------------------------------*/
244void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
245{
246 /* Dequeue ep */
247 endpoint_list_t *list = &instance->lists[ep->transfer_type];
248 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
249 switch (ep->transfer_type) {
250 case USB_TRANSFER_CONTROL:
251 instance->registers->control &= ~C_CLE;
252 endpoint_list_remove_ep(list, ohci_ep);
253 instance->registers->control_current = 0;
254 instance->registers->control |= C_CLE;
255 break;
256 case USB_TRANSFER_BULK:
257 instance->registers->control &= ~C_BLE;
258 endpoint_list_remove_ep(list, ohci_ep);
259 instance->registers->control |= C_BLE;
260 break;
261 case USB_TRANSFER_ISOCHRONOUS:
262 case USB_TRANSFER_INTERRUPT:
263 instance->registers->control &= (~C_PLE & ~C_IE);
264 endpoint_list_remove_ep(list, ohci_ep);
265 instance->registers->control |= C_PLE | C_IE;
266 break;
267 default:
268 break;
269 }
270}
271/*----------------------------------------------------------------------------*/
272/** Add USB transfer to the schedule.
273 *
274 * @param[in] instance OHCI hc driver structure.
275 * @param[in] batch Batch representing the transfer.
276 * @return Error code.
277 */
278int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
279{
280 assert(hcd);
281 hc_t *instance = hcd->private_data;
282 assert(instance);
283
284 /* Check for root hub communication */
285 if (batch->ep->address == instance->rh.address) {
286 rh_request(&instance->rh, batch);
287 return EOK;
288 }
289 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
290 if (!ohci_batch)
291 return ENOMEM;
292
293 fibril_mutex_lock(&instance->guard);
294 list_append(&ohci_batch->link, &instance->pending_batches);
295 ohci_transfer_batch_commit(ohci_batch);
296
297 /* Control and bulk schedules need a kick to start working */
298 switch (batch->ep->transfer_type)
299 {
300 case USB_TRANSFER_CONTROL:
301 instance->registers->command_status |= CS_CLF;
302 break;
303 case USB_TRANSFER_BULK:
304 instance->registers->command_status |= CS_BLF;
305 break;
306 default:
307 break;
308 }
309 fibril_mutex_unlock(&instance->guard);
310 return EOK;
311}
312/*----------------------------------------------------------------------------*/
313/** Interrupt handling routine
314 *
315 * @param[in] instance OHCI hc driver structure.
316 * @param[in] status Value of the status register at the time of interrupt.
317 */
318void hc_interrupt(hc_t *instance, uint32_t status)
319{
320 assert(instance);
321 if ((status & ~I_SF) == 0) /* ignore sof status */
322 return;
323 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
324 if (status & I_RHSC)
325 rh_interrupt(&instance->rh);
326
327 if (status & I_WDH) {
328 fibril_mutex_lock(&instance->guard);
329 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
330 instance->registers->hcca,
331 (void *) addr_to_phys(instance->hcca));
332 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
333 instance->registers->periodic_current);
334
335 link_t *current = list_first(&instance->pending_batches);
336 while (current && current != &instance->pending_batches.head) {
337 link_t *next = current->next;
338 ohci_transfer_batch_t *batch =
339 ohci_transfer_batch_from_link(current);
340
341 if (ohci_transfer_batch_is_complete(batch)) {
342 list_remove(current);
343 ohci_transfer_batch_finish_dispose(batch);
344 }
345
346 current = next;
347 }
348 fibril_mutex_unlock(&instance->guard);
349 }
350
351 if (status & I_UE) {
352 usb_log_fatal("Error like no other!\n");
353 hc_start(instance);
354 }
355
356}
357/*----------------------------------------------------------------------------*/
358/** Check status register regularly
359 *
360 * @param[in] instance OHCI hc driver structure.
361 * @return Error code
362 */
363int interrupt_emulator(hc_t *instance)
364{
365 assert(instance);
366 usb_log_info("Started interrupt emulator.\n");
367 while (1) {
368 const uint32_t status = instance->registers->interrupt_status;
369 instance->registers->interrupt_status = status;
370 hc_interrupt(instance, status);
371 async_usleep(10000);
372 }
373 return EOK;
374}
375/*----------------------------------------------------------------------------*/
376/** Turn off any (BIOS)driver that might be in control of the device.
377 *
378 * This function implements routines described in chapter 5.1.1.3 of the OHCI
379 * specification (page 40, pdf page 54).
380 *
381 * @param[in] instance OHCI hc driver structure.
382 */
383void hc_gain_control(hc_t *instance)
384{
385 assert(instance);
386
387 usb_log_debug("Requesting OHCI control.\n");
388 if (instance->registers->revision & R_LEGACY_FLAG) {
389 /* Turn off legacy emulation, it should be enough to zero
390 * the lowest bit, but it caused problems. Thus clear all
391 * except GateA20 (causes restart on some hw).
392 * See page 145 of the specs for details.
393 */
394 volatile uint32_t *ohci_emulation_reg =
395 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
396 usb_log_debug("OHCI legacy register %p: %x.\n",
397 ohci_emulation_reg, *ohci_emulation_reg);
398 /* Zero everything but A20State */
399 *ohci_emulation_reg &= 0x100;
400 usb_log_debug(
401 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
402 ohci_emulation_reg, *ohci_emulation_reg);
403 }
404
405 /* Interrupt routing enabled => smm driver is active */
406 if (instance->registers->control & C_IR) {
407 usb_log_debug("SMM driver: request ownership change.\n");
408 instance->registers->command_status |= CS_OCR;
409 /* Hope that SMM actually knows its stuff or we can hang here */
410 while (instance->registers->control & C_IR) {
411 async_usleep(1000);
412 }
413 usb_log_info("SMM driver: Ownership taken.\n");
414 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
415 async_usleep(50000);
416 return;
417 }
418
419 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
420 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
421 if (hc_status != C_HCFS_RESET) {
422 usb_log_debug("BIOS driver found.\n");
423 if (hc_status == C_HCFS_OPERATIONAL) {
424 usb_log_info("BIOS driver: HC operational.\n");
425 return;
426 }
427 /* HC is suspended assert resume for 20ms, */
428 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
429 async_usleep(20000);
430 usb_log_info("BIOS driver: HC resumed.\n");
431 return;
432 }
433
434 /* HC is in reset (hw startup) => no other driver
435 * maintain reset for at least the time specified in USB spec (50 ms)*/
436 usb_log_debug("Host controller found in reset state.\n");
437 async_usleep(50000);
438}
439/*----------------------------------------------------------------------------*/
440/** OHCI hw initialization routine.
441 *
442 * @param[in] instance OHCI hc driver structure.
443 */
444void hc_start(hc_t *instance)
445{
446 /* OHCI guide page 42 */
447 assert(instance);
448 usb_log_debug2("Started hc initialization routine.\n");
449
450 /* Save contents of fm_interval register */
451 const uint32_t fm_interval = instance->registers->fm_interval;
452 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
453
454 /* Reset hc */
455 usb_log_debug2("HC reset.\n");
456 size_t time = 0;
457 instance->registers->command_status = CS_HCR;
458 while (instance->registers->command_status & CS_HCR) {
459 async_usleep(10);
460 time += 10;
461 }
462 usb_log_debug2("HC reset complete in %zu us.\n", time);
463
464 /* Restore fm_interval */
465 instance->registers->fm_interval = fm_interval;
466 assert((instance->registers->command_status & CS_HCR) == 0);
467
468 /* hc is now in suspend state */
469 usb_log_debug2("HC should be in suspend state(%x).\n",
470 instance->registers->control);
471
472 /* Use HCCA */
473 instance->registers->hcca = addr_to_phys(instance->hcca);
474
475 /* Use queues */
476 instance->registers->bulk_head =
477 instance->lists[USB_TRANSFER_BULK].list_head_pa;
478 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
479 instance->lists[USB_TRANSFER_BULK].list_head,
480 instance->lists[USB_TRANSFER_BULK].list_head_pa);
481
482 instance->registers->control_head =
483 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
484 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
485 instance->lists[USB_TRANSFER_CONTROL].list_head,
486 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
487
488 /* Enable queues */
489 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
490 usb_log_debug2("All queues enabled(%x).\n",
491 instance->registers->control);
492
493 /* Enable interrupts */
494 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
495 usb_log_debug2("Enabled interrupts: %x.\n",
496 instance->registers->interrupt_enable);
497 instance->registers->interrupt_enable = I_MI;
498
499 /* Set periodic start to 90% */
500 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
501 instance->registers->periodic_start = (frame_length / 10) * 9;
502 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
503 instance->registers->periodic_start,
504 instance->registers->periodic_start, frame_length);
505
506 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
507 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
508 instance->registers->control);
509}
510/*----------------------------------------------------------------------------*/
511/** Initialize schedule queues
512 *
513 * @param[in] instance OHCI hc driver structure
514 * @return Error code
515 */
516int hc_init_transfer_lists(hc_t *instance)
517{
518 assert(instance);
519#define SETUP_ENDPOINT_LIST(type) \
520do { \
521 const char *name = usb_str_transfer_type(type); \
522 int ret = endpoint_list_init(&instance->lists[type], name); \
523 if (ret != EOK) { \
524 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
525 name, str_error(ret)); \
526 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
527 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
528 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
529 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
530 return ret; \
531 } \
532} while (0)
533
534 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
535 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
536 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
537 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
538#undef SETUP_ENDPOINT_LIST
539 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
540 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
541
542 return EOK;
543}
544/*----------------------------------------------------------------------------*/
545/** Initialize memory structures used by the OHCI hcd.
546 *
547 * @param[in] instance OHCI hc driver structure.
548 * @return Error code.
549 */
550int hc_init_memory(hc_t *instance)
551{
552 assert(instance);
553
554 bzero(&instance->rh, sizeof(instance->rh));
555 /* Init queues */
556 const int ret = hc_init_transfer_lists(instance);
557 if (ret != EOK) {
558 return ret;
559 }
560
561 /*Init HCCA */
562 instance->hcca = malloc32(sizeof(hcca_t));
563 if (instance->hcca == NULL)
564 return ENOMEM;
565 bzero(instance->hcca, sizeof(hcca_t));
566 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
567
568 unsigned i = 0;
569 for (; i < 32; ++i) {
570 instance->hcca->int_ep[i] =
571 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
572 }
573 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
574 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
575 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
576
577 return EOK;
578}
579
580/**
581 * @}
582 */
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