source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 78ab6d4

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 78ab6d4 was 78ab6d4, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

OHCI: Device access fixes.

Only access Legacy support registers if their presence is indicated.
Fix setting host controller functional state, it's 2 bit value and standard
& and | operators are not enough.
Some comment fixes.

Tested on vbox.
  • Property mode set to 100644
File size: 21.1 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static int interrupt_emulator(hc_t *instance);
59static void hc_gain_control(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62/*----------------------------------------------------------------------------*/
63/** Announce OHCI root hub to the DDF
64 *
65 * @param[in] instance OHCI driver intance
66 * @param[in] hub_fun DDF fuction representing OHCI root hub
67 * @return Error code
68 */
69int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
70{
71 assert(instance);
72 assert(hub_fun);
73
74 const usb_address_t hub_address =
75 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
76 if (hub_address <= 0) {
77 usb_log_error("Failed to get OHCI root hub address: %s\n",
78 str_error(hub_address));
79 return hub_address;
80 }
81 instance->rh.address = hub_address;
82 usb_device_keeper_bind(
83 &instance->manager, hub_address, hub_fun->handle);
84
85#define CHECK_RET_RELEASE(ret, message...) \
86if (ret != EOK) { \
87 usb_log_error(message); \
88 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
89 usb_device_keeper_release(&instance->manager, hub_address); \
90 return ret; \
91} else (void)0
92
93 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
94 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
95 CHECK_RET_RELEASE(ret, "Failed(%d) to add OHCI rh endpoint 0.\n", ret);
96
97 char *match_str = NULL;
98 /* DDF needs heap allocated string */
99 ret = asprintf(&match_str, "usb&class=hub");
100 ret = ret > 0 ? 0 : ret;
101 CHECK_RET_RELEASE(ret, "Failed(%d) to create match-id string.\n", ret);
102
103 ret = ddf_fun_add_match_id(hub_fun, match_str, 100);
104 CHECK_RET_RELEASE(ret, "Failed(%d) add root hub match-id.\n", ret);
105
106 ret = ddf_fun_bind(hub_fun);
107 CHECK_RET_RELEASE(ret, "Failed(%d) to bind root hub function.\n", ret);
108
109 return EOK;
110#undef CHECK_RET_RELEASE
111}
112/*----------------------------------------------------------------------------*/
113/** Initialize OHCI hc driver structure
114 *
115 * @param[in] instance Memory place for the structure.
116 * @param[in] regs Address of the memory mapped I/O registers.
117 * @param[in] reg_size Size of the memory mapped area.
118 * @param[in] interrupts True if w interrupts should be used
119 * @return Error code
120 */
121int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
122{
123 assert(instance);
124 int ret = EOK;
125#define CHECK_RET_RETURN(ret, message...) \
126if (ret != EOK) { \
127 usb_log_error(message); \
128 return ret; \
129} else (void)0
130
131 ret = pio_enable((void*)regs, reg_size, (void**)&instance->registers);
132 CHECK_RET_RETURN(ret,
133 "Failed(%d) to gain access to device registers: %s.\n",
134 ret, str_error(ret));
135
136 list_initialize(&instance->pending_batches);
137 usb_device_keeper_init(&instance->manager);
138 ret = usb_endpoint_manager_init(&instance->ep_manager,
139 BANDWIDTH_AVAILABLE_USB11);
140 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
141 str_error(ret));
142
143 ret = hc_init_memory(instance);
144 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
145 str_error(ret));
146#undef CHECK_RET_RETURN
147
148 fibril_mutex_initialize(&instance->guard);
149
150 hc_gain_control(instance);
151
152 if (!interrupts) {
153 instance->interrupt_emulator =
154 fibril_create((int(*)(void*))interrupt_emulator, instance);
155 fibril_add_ready(instance->interrupt_emulator);
156 }
157
158 rh_init(&instance->rh, instance->registers);
159
160 return EOK;
161}
162/*----------------------------------------------------------------------------*/
163/** Get number of commands used in IRQ code.
164 * @return Number of commands.
165 */
166size_t hc_irq_cmd_count(void)
167{
168 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
169}
170/*----------------------------------------------------------------------------*/
171/** Generate IRQ code commands.
172 * @param[out] cmds Place to store the commands.
173 * @param[in] cmd_size Size of the place (bytes).
174 * @param[in] regs Physical address of device's registers.
175 * @param[in] reg_size Size of the register area (bytes).
176 *
177 * @return Error code.
178 */
179int hc_get_irq_commands(
180 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
181{
182 if (cmd_size < sizeof(ohci_irq_commands)
183 || reg_size < sizeof(ohci_regs_t))
184 return EOVERFLOW;
185
186 /* Create register mapping to use in IRQ handler.
187 * This mapping should be present in kernel only.
188 * Remove it from here when kernel knows how to create mappings
189 * and accepts physical addresses in IRQ code.
190 * TODO: remove */
191 ohci_regs_t *registers;
192 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
193
194 /* Some bogus access to force create mapping. DO NOT remove,
195 * unless whole virtual addresses in irq is replaced
196 * NOTE: Compiler won't remove this as ohci_regs_t members
197 * are declared volatile. */
198 registers->revision;
199
200 if (ret != EOK)
201 return ret;
202
203 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
204
205 void *address = (void*)&registers->interrupt_status;
206 cmds[0].addr = address;
207 cmds[3].addr = address;
208 return EOK;
209}
210/*----------------------------------------------------------------------------*/
211/** Create and register endpoint structures.
212 *
213 * @param[in] instance OHCI driver structure.
214 * @param[in] address USB address of the device.
215 * @param[in] endpoint USB endpoint number.
216 * @param[in] speed Communication speeed of the device.
217 * @param[in] type Endpoint's transfer type.
218 * @param[in] direction Endpoint's direction.
219 * @param[in] mps Maximum packet size the endpoint accepts.
220 * @param[in] size Maximum allowed buffer size.
221 * @param[in] interval Time between transfers(interrupt transfers only).
222 * @return Error code
223 */
224int hc_add_endpoint(
225 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
226 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
227 size_t mps, size_t size, unsigned interval)
228{
229 endpoint_t *ep = malloc(sizeof(endpoint_t));
230 if (ep == NULL)
231 return ENOMEM;
232 int ret =
233 endpoint_init(ep, address, endpoint, direction, type, speed, mps);
234 if (ret != EOK) {
235 free(ep);
236 return ret;
237 }
238
239 hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
240 if (hcd_ep == NULL) {
241 endpoint_destroy(ep);
242 return ENOMEM;
243 }
244
245 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
246 if (ret != EOK) {
247 hcd_endpoint_clear(ep);
248 endpoint_destroy(ep);
249 return ret;
250 }
251
252 /* Enqueue hcd_ep */
253 switch (ep->transfer_type) {
254 case USB_TRANSFER_CONTROL:
255 instance->registers->control &= ~C_CLE;
256 endpoint_list_add_ep(
257 &instance->lists[ep->transfer_type], hcd_ep);
258 instance->registers->control_current = 0;
259 instance->registers->control |= C_CLE;
260 break;
261 case USB_TRANSFER_BULK:
262 instance->registers->control &= ~C_BLE;
263 endpoint_list_add_ep(
264 &instance->lists[ep->transfer_type], hcd_ep);
265 instance->registers->control |= C_BLE;
266 break;
267 case USB_TRANSFER_ISOCHRONOUS:
268 case USB_TRANSFER_INTERRUPT:
269 instance->registers->control &= (~C_PLE & ~C_IE);
270 endpoint_list_add_ep(
271 &instance->lists[ep->transfer_type], hcd_ep);
272 instance->registers->control |= C_PLE | C_IE;
273 break;
274 default:
275 break;
276 }
277
278 return EOK;
279}
280/*----------------------------------------------------------------------------*/
281/** Dequeue and delete endpoint structures
282 *
283 * @param[in] instance OHCI hc driver structure.
284 * @param[in] address USB address of the device.
285 * @param[in] endpoint USB endpoint number.
286 * @param[in] direction Direction of the endpoint.
287 * @return Error code
288 */
289int hc_remove_endpoint(hc_t *instance, usb_address_t address,
290 usb_endpoint_t endpoint, usb_direction_t direction)
291{
292 assert(instance);
293 fibril_mutex_lock(&instance->guard);
294 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
295 address, endpoint, direction, NULL);
296 if (ep == NULL) {
297 usb_log_error("Endpoint unregister failed: No such EP.\n");
298 fibril_mutex_unlock(&instance->guard);
299 return ENOENT;
300 }
301
302 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
303 if (hcd_ep) {
304 /* Dequeue hcd_ep */
305 switch (ep->transfer_type) {
306 case USB_TRANSFER_CONTROL:
307 instance->registers->control &= ~C_CLE;
308 endpoint_list_remove_ep(
309 &instance->lists[ep->transfer_type], hcd_ep);
310 instance->registers->control_current = 0;
311 instance->registers->control |= C_CLE;
312 break;
313 case USB_TRANSFER_BULK:
314 instance->registers->control &= ~C_BLE;
315 endpoint_list_remove_ep(
316 &instance->lists[ep->transfer_type], hcd_ep);
317 instance->registers->control |= C_BLE;
318 break;
319 case USB_TRANSFER_ISOCHRONOUS:
320 case USB_TRANSFER_INTERRUPT:
321 instance->registers->control &= (~C_PLE & ~C_IE);
322 endpoint_list_remove_ep(
323 &instance->lists[ep->transfer_type], hcd_ep);
324 instance->registers->control |= C_PLE | C_IE;
325 break;
326 default:
327 break;
328 }
329 hcd_endpoint_clear(ep);
330 } else {
331 usb_log_warning("Endpoint without hcd equivalent structure.\n");
332 }
333 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
334 address, endpoint, direction);
335 fibril_mutex_unlock(&instance->guard);
336 return ret;
337}
338/*----------------------------------------------------------------------------*/
339/** Get access to endpoint structures
340 *
341 * @param[in] instance OHCI hc driver structure.
342 * @param[in] address USB address of the device.
343 * @param[in] endpoint USB endpoint number.
344 * @param[in] direction Direction of the endpoint.
345 * @param[out] bw Reserved bandwidth.
346 * @return Error code
347 */
348endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
349 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
350{
351 assert(instance);
352 fibril_mutex_lock(&instance->guard);
353 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
354 address, endpoint, direction, bw);
355 fibril_mutex_unlock(&instance->guard);
356 return ep;
357}
358/*----------------------------------------------------------------------------*/
359/** Add USB transfer to the schedule.
360 *
361 * @param[in] instance OHCI hc driver structure.
362 * @param[in] batch Batch representing the transfer.
363 * @return Error code.
364 */
365int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
366{
367 assert(instance);
368 assert(batch);
369 assert(batch->ep);
370
371 /* Check for root hub communication */
372 if (batch->ep->address == instance->rh.address) {
373 return rh_request(&instance->rh, batch);
374 }
375
376 fibril_mutex_lock(&instance->guard);
377 list_append(&batch->link, &instance->pending_batches);
378 batch_commit(batch);
379
380 /* Control and bulk schedules need a kick to start working */
381 switch (batch->ep->transfer_type)
382 {
383 case USB_TRANSFER_CONTROL:
384 instance->registers->command_status |= CS_CLF;
385 break;
386 case USB_TRANSFER_BULK:
387 instance->registers->command_status |= CS_BLF;
388 break;
389 default:
390 break;
391 }
392 fibril_mutex_unlock(&instance->guard);
393 return EOK;
394}
395/*----------------------------------------------------------------------------*/
396/** Interrupt handling routine
397 *
398 * @param[in] instance OHCI hc driver structure.
399 * @param[in] status Value of the status register at the time of interrupt.
400 */
401void hc_interrupt(hc_t *instance, uint32_t status)
402{
403 assert(instance);
404 if ((status & ~I_SF) == 0) /* ignore sof status */
405 return;
406 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
407 if (status & I_RHSC)
408 rh_interrupt(&instance->rh);
409
410 if (status & I_WDH) {
411 fibril_mutex_lock(&instance->guard);
412 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
413 instance->registers->hcca,
414 (void *) addr_to_phys(instance->hcca));
415 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
416 instance->registers->periodic_current);
417
418 link_t *current = instance->pending_batches.head.next;
419 while (current != &instance->pending_batches.head) {
420 link_t *next = current->next;
421 usb_transfer_batch_t *batch =
422 usb_transfer_batch_from_link(current);
423
424 if (batch_is_complete(batch)) {
425 list_remove(current);
426 usb_transfer_batch_finish(batch);
427 }
428
429 current = next;
430 }
431 fibril_mutex_unlock(&instance->guard);
432 }
433
434 if (status & I_UE) {
435 hc_start_hw(instance);
436 }
437
438}
439/*----------------------------------------------------------------------------*/
440/** Check status register regularly
441 *
442 * @param[in] instance OHCI hc driver structure.
443 * @return Error code
444 */
445int interrupt_emulator(hc_t *instance)
446{
447 assert(instance);
448 usb_log_info("Started interrupt emulator.\n");
449 while (1) {
450 const uint32_t status = instance->registers->interrupt_status;
451 instance->registers->interrupt_status = status;
452 hc_interrupt(instance, status);
453 async_usleep(10000);
454 }
455 return EOK;
456}
457/*----------------------------------------------------------------------------*/
458/** Turn off any (BIOS)driver that might be in control of the device.
459 *
460 * This function implements routines described in chapter 5.1.1.3 of the OHCI
461 * specification (page 40, pdf page 54).
462 *
463 * @param[in] instance OHCI hc driver structure.
464 */
465void hc_gain_control(hc_t *instance)
466{
467 assert(instance);
468
469 usb_log_debug("Requesting OHCI control.\n");
470 if (instance->registers->revision & R_LEGACY_FLAG) {
471 /* Turn off legacy emulation, it should be enough to zero
472 * the lowest bit, but it caused problems. Thus clear all
473 * except GateA20 (causes restart on some hw).
474 * See page 145 of the specs for details.
475 */
476 volatile uint32_t *ohci_emulation_reg =
477 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
478 usb_log_debug("OHCI legacy register %p: %x.\n",
479 ohci_emulation_reg, *ohci_emulation_reg);
480 /* Zero everything but A20State */
481 *ohci_emulation_reg &= 0x100;
482 usb_log_debug(
483 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
484 ohci_emulation_reg, *ohci_emulation_reg);
485 }
486
487 /* Interrupt routing enabled => smm driver is active */
488 if (instance->registers->control & C_IR) {
489 usb_log_debug("SMM driver: request ownership change.\n");
490 instance->registers->command_status |= CS_OCR;
491 /* Hope that SMM actually knows its stuff or we can hang here */
492 while (instance->registers->control & C_IR) {
493 async_usleep(1000);
494 }
495 usb_log_info("SMM driver: Ownership taken.\n");
496 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
497 async_usleep(50000);
498 return;
499 }
500
501 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
502 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
503 if (hc_status != C_HCFS_RESET) {
504 usb_log_debug("BIOS driver found.\n");
505 if (hc_status == C_HCFS_OPERATIONAL) {
506 usb_log_info("BIOS driver: HC operational.\n");
507 return;
508 }
509 /* HC is suspended assert resume for 20ms, */
510 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
511 async_usleep(20000);
512 usb_log_info("BIOS driver: HC resumed.\n");
513 return;
514 }
515
516 /* HC is in reset (hw startup) => no other driver
517 * maintain reset for at least the time specified in USB spec (50 ms)*/
518 usb_log_debug("Host controller found in reset state.\n");
519 async_usleep(50000);
520}
521/*----------------------------------------------------------------------------*/
522/** OHCI hw initialization routine.
523 *
524 * @param[in] instance OHCI hc driver structure.
525 */
526void hc_start_hw(hc_t *instance)
527{
528 /* OHCI guide page 42 */
529 assert(instance);
530 usb_log_debug2("Started hc initialization routine.\n");
531
532 /* Save contents of fm_interval register */
533 const uint32_t fm_interval = instance->registers->fm_interval;
534 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
535
536 /* Reset hc */
537 usb_log_debug2("HC reset.\n");
538 size_t time = 0;
539 instance->registers->command_status = CS_HCR;
540 while (instance->registers->command_status & CS_HCR) {
541 async_usleep(10);
542 time += 10;
543 }
544 usb_log_debug2("HC reset complete in %zu us.\n", time);
545
546 /* Restore fm_interval */
547 instance->registers->fm_interval = fm_interval;
548 assert((instance->registers->command_status & CS_HCR) == 0);
549
550 /* hc is now in suspend state */
551 usb_log_debug2("HC should be in suspend state(%x).\n",
552 instance->registers->control);
553
554 /* Use HCCA */
555 instance->registers->hcca = addr_to_phys(instance->hcca);
556
557 /* Use queues */
558 instance->registers->bulk_head =
559 instance->lists[USB_TRANSFER_BULK].list_head_pa;
560 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
561 instance->lists[USB_TRANSFER_BULK].list_head,
562 instance->lists[USB_TRANSFER_BULK].list_head_pa);
563
564 instance->registers->control_head =
565 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
566 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
567 instance->lists[USB_TRANSFER_CONTROL].list_head,
568 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
569
570 /* Enable queues */
571 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
572 usb_log_debug2("All queues enabled(%x).\n",
573 instance->registers->control);
574
575 /* Enable interrupts */
576 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
577 usb_log_debug2("Enabled interrupts: %x.\n",
578 instance->registers->interrupt_enable);
579 instance->registers->interrupt_enable = I_MI;
580
581 /* Set periodic start to 90% */
582 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
583 instance->registers->periodic_start = (frame_length / 10) * 9;
584 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
585 instance->registers->periodic_start,
586 instance->registers->periodic_start, frame_length);
587
588 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
589 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
590 instance->registers->control);
591}
592/*----------------------------------------------------------------------------*/
593/** Initialize schedule queues
594 *
595 * @param[in] instance OHCI hc driver structure
596 * @return Error code
597 */
598int hc_init_transfer_lists(hc_t *instance)
599{
600 assert(instance);
601#define SETUP_ENDPOINT_LIST(type) \
602do { \
603 const char *name = usb_str_transfer_type(type); \
604 int ret = endpoint_list_init(&instance->lists[type], name); \
605 if (ret != EOK) { \
606 usb_log_error("Failed(%d) to setup %s endpoint list.\n", \
607 ret, name); \
608 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
609 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
610 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
611 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
612 return ret; \
613 } \
614} while (0)
615
616 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
617 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
618 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
619 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
620#undef SETUP_ENDPOINT_LIST
621 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
622 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
623
624 return EOK;
625}
626/*----------------------------------------------------------------------------*/
627/** Initialize memory structures used by the OHCI hcd.
628 *
629 * @param[in] instance OHCI hc driver structure.
630 * @return Error code.
631 */
632int hc_init_memory(hc_t *instance)
633{
634 assert(instance);
635
636 bzero(&instance->rh, sizeof(instance->rh));
637 /* Init queues */
638 const int ret = hc_init_transfer_lists(instance);
639 if (ret != EOK) {
640 return ret;
641 }
642
643 /*Init HCCA */
644 instance->hcca = malloc32(sizeof(hcca_t));
645 if (instance->hcca == NULL)
646 return ENOMEM;
647 bzero(instance->hcca, sizeof(hcca_t));
648 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
649
650 unsigned i = 0;
651 for (; i < 32; ++i) {
652 instance->hcca->int_ep[i] =
653 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
654 }
655 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
656 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
657 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
658
659 return EOK;
660}
661
662/**
663 * @}
664 */
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