source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 620c710

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 620c710 was 620c710, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

libushost: promote endpoint data dtor to destruction hook

ohci: use new usb c driver architecture
  • Property mode set to 100644
File size: 21.8 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "ohci_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63/*----------------------------------------------------------------------------*/
64static int schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
65{
66 assert(hcd);
67 return hc_schedule(hcd->private_data, batch);
68}
69/*----------------------------------------------------------------------------*/
70/** Get number of commands used in IRQ code.
71 * @return Number of commands.
72 */
73size_t hc_irq_cmd_count(void)
74{
75 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
76}
77/*----------------------------------------------------------------------------*/
78/** Generate IRQ code commands.
79 * @param[out] cmds Place to store the commands.
80 * @param[in] cmd_size Size of the place (bytes).
81 * @param[in] regs Physical address of device's registers.
82 * @param[in] reg_size Size of the register area (bytes).
83 *
84 * @return Error code.
85 */
86int hc_get_irq_commands(
87 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
88{
89 if (cmd_size < sizeof(ohci_irq_commands)
90 || reg_size < sizeof(ohci_regs_t))
91 return EOVERFLOW;
92
93 /* Create register mapping to use in IRQ handler.
94 * This mapping should be present in kernel only.
95 * Remove it from here when kernel knows how to create mappings
96 * and accepts physical addresses in IRQ code.
97 * TODO: remove */
98 ohci_regs_t *registers;
99 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
100 if (ret != EOK)
101 return ret;
102
103 /* Some bogus access to force create mapping. DO NOT remove,
104 * unless whole virtual addresses in irq is replaced
105 * NOTE: Compiler won't remove this as ohci_regs_t members
106 * are declared volatile.
107 *
108 * Introducing CMD_MEM set of IRQ code commands broke
109 * assumption that IRQ code does not cause page faults.
110 * If this happens during idling (THREAD == NULL)
111 * it causes kernel panic.
112 */
113 registers->revision;
114
115 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
116
117 void *address = (void*)&registers->interrupt_status;
118 cmds[0].addr = address;
119 cmds[3].addr = address;
120 return EOK;
121}
122/*----------------------------------------------------------------------------*/
123/** Announce OHCI root hub to the DDF
124 *
125 * @param[in] instance OHCI driver intance
126 * @param[in] hub_fun DDF fuction representing OHCI root hub
127 * @return Error code
128 */
129int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
130{
131 assert(instance);
132 assert(hub_fun);
133
134 const usb_address_t hub_address =
135 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
136 if (hub_address <= 0) {
137 usb_log_error("Failed to get OHCI root hub address: %s\n",
138 str_error(hub_address));
139 return hub_address;
140 }
141 instance->rh.address = hub_address;
142 usb_device_keeper_bind(
143 &instance->manager, hub_address, hub_fun->handle);
144
145#define CHECK_RET_RELEASE(ret, message...) \
146if (ret != EOK) { \
147 usb_log_error(message); \
148 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
149 usb_device_keeper_release(&instance->manager, hub_address); \
150 return ret; \
151} else (void)0
152
153 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
154 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
155 CHECK_RET_RELEASE(ret,
156 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
157
158 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
159 CHECK_RET_RELEASE(ret,
160 "Failed to add root hub match-id: %s.\n", str_error(ret));
161
162 ret = ddf_fun_bind(hub_fun);
163 CHECK_RET_RELEASE(ret,
164 "Failed to bind root hub function: %s.\n", str_error(ret));
165
166 return EOK;
167#undef CHECK_RET_RELEASE
168}
169/*----------------------------------------------------------------------------*/
170/** Initialize OHCI hc driver structure
171 *
172 * @param[in] instance Memory place for the structure.
173 * @param[in] regs Address of the memory mapped I/O registers.
174 * @param[in] reg_size Size of the memory mapped area.
175 * @param[in] interrupts True if w interrupts should be used
176 * @return Error code
177 */
178int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
179{
180 assert(instance);
181
182#define CHECK_RET_RETURN(ret, message...) \
183if (ret != EOK) { \
184 usb_log_error(message); \
185 return ret; \
186} else (void)0
187
188 int ret =
189 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
190 CHECK_RET_RETURN(ret,
191 "Failed to gain access to device registers: %s.\n", str_error(ret));
192
193 list_initialize(&instance->pending_batches);
194 usb_device_keeper_init(&instance->manager);
195
196 ret = usb_endpoint_manager_init(&instance->ep_manager,
197 BANDWIDTH_AVAILABLE_USB11);
198 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
199 str_error(ret));
200
201 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
202 instance->generic.private_data = instance;
203 instance->generic.schedule = schedule;
204 instance->generic.ep_add_hook = ohci_endpoint_init;
205
206 ret = hc_init_memory(instance);
207 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
208 str_error(ret));
209#undef CHECK_RET_RETURN
210
211 fibril_mutex_initialize(&instance->guard);
212
213 hc_gain_control(instance);
214
215 if (!interrupts) {
216 instance->interrupt_emulator =
217 fibril_create((int(*)(void*))interrupt_emulator, instance);
218 fibril_add_ready(instance->interrupt_emulator);
219 }
220
221 rh_init(&instance->rh, instance->registers);
222 hc_start(instance);
223
224 return EOK;
225}
226/*----------------------------------------------------------------------------*/
227void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
228{
229 endpoint_list_t *list = &instance->lists[ep->transfer_type];
230 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
231 /* Enqueue ep */
232 switch (ep->transfer_type) {
233 case USB_TRANSFER_CONTROL:
234 instance->registers->control &= ~C_CLE;
235 endpoint_list_add_ep(list, ohci_ep);
236 instance->registers->control_current = 0;
237 instance->registers->control |= C_CLE;
238 break;
239 case USB_TRANSFER_BULK:
240 instance->registers->control &= ~C_BLE;
241 endpoint_list_add_ep(
242 &instance->lists[ep->transfer_type], ohci_endpoint_get(ep));
243 instance->registers->control |= C_BLE;
244 break;
245 case USB_TRANSFER_ISOCHRONOUS:
246 case USB_TRANSFER_INTERRUPT:
247 instance->registers->control &= (~C_PLE & ~C_IE);
248 endpoint_list_add_ep(
249 &instance->lists[ep->transfer_type], ohci_endpoint_get(ep));
250 instance->registers->control |= C_PLE | C_IE;
251 break;
252 }
253}
254/*----------------------------------------------------------------------------*/
255void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
256{
257 /* Dequeue ep */
258 endpoint_list_t *list = &instance->lists[ep->transfer_type];
259 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
260 switch (ep->transfer_type) {
261 case USB_TRANSFER_CONTROL:
262 instance->registers->control &= ~C_CLE;
263 endpoint_list_remove_ep(list, ohci_ep);
264 instance->registers->control_current = 0;
265 instance->registers->control |= C_CLE;
266 break;
267 case USB_TRANSFER_BULK:
268 instance->registers->control &= ~C_BLE;
269 endpoint_list_remove_ep(list, ohci_ep);
270 instance->registers->control |= C_BLE;
271 break;
272 case USB_TRANSFER_ISOCHRONOUS:
273 case USB_TRANSFER_INTERRUPT:
274 instance->registers->control &= (~C_PLE & ~C_IE);
275 endpoint_list_remove_ep(list, ohci_ep);
276 instance->registers->control |= C_PLE | C_IE;
277 break;
278 default:
279 break;
280 }
281}
282/*----------------------------------------------------------------------------*/
283/** Create and register endpoint structures.
284 *
285 * @param[in] instance OHCI driver structure.
286 * @param[in] address USB address of the device.
287 * @param[in] endpoint USB endpoint number.
288 * @param[in] speed Communication speeed of the device.
289 * @param[in] type Endpoint's transfer type.
290 * @param[in] direction Endpoint's direction.
291 * @param[in] mps Maximum packet size the endpoint accepts.
292 * @param[in] size Maximum allowed buffer size.
293 * @param[in] interval Time between transfers(interrupt transfers only).
294 * @return Error code
295 */
296int hc_add_endpoint(
297 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
298 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
299 size_t mps, size_t size, unsigned interval)
300{
301 endpoint_t *ep =
302 endpoint_get(address, endpoint, direction, type, speed, mps);
303 if (ep == NULL)
304 return ENOMEM;
305
306 int ret = ohci_endpoint_init(&instance->generic, ep);
307 if (ret != EOK) {
308 endpoint_destroy(ep);
309 return ret;
310 }
311
312 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
313 if (ret != EOK) {
314 endpoint_destroy(ep);
315 return ret;
316 }
317 hc_enqueue_endpoint(instance, ep);
318
319 return EOK;
320}
321/*----------------------------------------------------------------------------*/
322/** Dequeue and delete endpoint structures
323 *
324 * @param[in] instance OHCI hc driver structure.
325 * @param[in] address USB address of the device.
326 * @param[in] endpoint USB endpoint number.
327 * @param[in] direction Direction of the endpoint.
328 * @return Error code
329 */
330int hc_remove_endpoint(hc_t *instance, usb_address_t address,
331 usb_endpoint_t endpoint, usb_direction_t direction)
332{
333 assert(instance);
334 fibril_mutex_lock(&instance->guard);
335 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
336 address, endpoint, direction, NULL);
337 if (ep == NULL) {
338 usb_log_error("Endpoint unregister failed: No such EP.\n");
339 fibril_mutex_unlock(&instance->guard);
340 return ENOENT;
341 }
342
343 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
344 if (ohci_ep) {
345 hc_dequeue_endpoint(instance, ep);
346 } else {
347 usb_log_warning("Endpoint without hcd equivalent structure.\n");
348 }
349 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
350 address, endpoint, direction);
351 fibril_mutex_unlock(&instance->guard);
352 return ret;
353}
354/*----------------------------------------------------------------------------*/
355/** Get access to endpoint structures
356 *
357 * @param[in] instance OHCI hc driver structure.
358 * @param[in] address USB address of the device.
359 * @param[in] endpoint USB endpoint number.
360 * @param[in] direction Direction of the endpoint.
361 * @param[out] bw Reserved bandwidth.
362 * @return Error code
363 */
364endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
365 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
366{
367 assert(instance);
368 fibril_mutex_lock(&instance->guard);
369 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
370 address, endpoint, direction, bw);
371 fibril_mutex_unlock(&instance->guard);
372 return ep;
373}
374/*----------------------------------------------------------------------------*/
375/** Add USB transfer to the schedule.
376 *
377 * @param[in] instance OHCI hc driver structure.
378 * @param[in] batch Batch representing the transfer.
379 * @return Error code.
380 */
381int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
382{
383 assert(instance);
384 assert(batch);
385 assert(batch->ep);
386
387 /* Check for root hub communication */
388 if (batch->ep->address == instance->rh.address) {
389 rh_request(&instance->rh, batch);
390 return EOK;
391 }
392
393 fibril_mutex_lock(&instance->guard);
394 list_append(&batch->link, &instance->pending_batches);
395 batch_commit(batch);
396
397 /* Control and bulk schedules need a kick to start working */
398 switch (batch->ep->transfer_type)
399 {
400 case USB_TRANSFER_CONTROL:
401 instance->registers->command_status |= CS_CLF;
402 break;
403 case USB_TRANSFER_BULK:
404 instance->registers->command_status |= CS_BLF;
405 break;
406 default:
407 break;
408 }
409 fibril_mutex_unlock(&instance->guard);
410 return EOK;
411}
412/*----------------------------------------------------------------------------*/
413/** Interrupt handling routine
414 *
415 * @param[in] instance OHCI hc driver structure.
416 * @param[in] status Value of the status register at the time of interrupt.
417 */
418void hc_interrupt(hc_t *instance, uint32_t status)
419{
420 assert(instance);
421 if ((status & ~I_SF) == 0) /* ignore sof status */
422 return;
423 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
424 if (status & I_RHSC)
425 rh_interrupt(&instance->rh);
426
427 if (status & I_WDH) {
428 fibril_mutex_lock(&instance->guard);
429 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
430 instance->registers->hcca,
431 (void *) addr_to_phys(instance->hcca));
432 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
433 instance->registers->periodic_current);
434
435 link_t *current = instance->pending_batches.head.next;
436 while (current != &instance->pending_batches.head) {
437 link_t *next = current->next;
438 usb_transfer_batch_t *batch =
439 usb_transfer_batch_from_link(current);
440
441 if (batch_is_complete(batch)) {
442 list_remove(current);
443 usb_transfer_batch_finish(batch);
444 }
445
446 current = next;
447 }
448 fibril_mutex_unlock(&instance->guard);
449 }
450
451 if (status & I_UE) {
452 hc_start(instance);
453 }
454
455}
456/*----------------------------------------------------------------------------*/
457/** Check status register regularly
458 *
459 * @param[in] instance OHCI hc driver structure.
460 * @return Error code
461 */
462int interrupt_emulator(hc_t *instance)
463{
464 assert(instance);
465 usb_log_info("Started interrupt emulator.\n");
466 while (1) {
467 const uint32_t status = instance->registers->interrupt_status;
468 instance->registers->interrupt_status = status;
469 hc_interrupt(instance, status);
470 async_usleep(10000);
471 }
472 return EOK;
473}
474/*----------------------------------------------------------------------------*/
475/** Turn off any (BIOS)driver that might be in control of the device.
476 *
477 * This function implements routines described in chapter 5.1.1.3 of the OHCI
478 * specification (page 40, pdf page 54).
479 *
480 * @param[in] instance OHCI hc driver structure.
481 */
482void hc_gain_control(hc_t *instance)
483{
484 assert(instance);
485
486 usb_log_debug("Requesting OHCI control.\n");
487 if (instance->registers->revision & R_LEGACY_FLAG) {
488 /* Turn off legacy emulation, it should be enough to zero
489 * the lowest bit, but it caused problems. Thus clear all
490 * except GateA20 (causes restart on some hw).
491 * See page 145 of the specs for details.
492 */
493 volatile uint32_t *ohci_emulation_reg =
494 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
495 usb_log_debug("OHCI legacy register %p: %x.\n",
496 ohci_emulation_reg, *ohci_emulation_reg);
497 /* Zero everything but A20State */
498 *ohci_emulation_reg &= 0x100;
499 usb_log_debug(
500 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
501 ohci_emulation_reg, *ohci_emulation_reg);
502 }
503
504 /* Interrupt routing enabled => smm driver is active */
505 if (instance->registers->control & C_IR) {
506 usb_log_debug("SMM driver: request ownership change.\n");
507 instance->registers->command_status |= CS_OCR;
508 /* Hope that SMM actually knows its stuff or we can hang here */
509 while (instance->registers->control & C_IR) {
510 async_usleep(1000);
511 }
512 usb_log_info("SMM driver: Ownership taken.\n");
513 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
514 async_usleep(50000);
515 return;
516 }
517
518 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
519 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
520 if (hc_status != C_HCFS_RESET) {
521 usb_log_debug("BIOS driver found.\n");
522 if (hc_status == C_HCFS_OPERATIONAL) {
523 usb_log_info("BIOS driver: HC operational.\n");
524 return;
525 }
526 /* HC is suspended assert resume for 20ms, */
527 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
528 async_usleep(20000);
529 usb_log_info("BIOS driver: HC resumed.\n");
530 return;
531 }
532
533 /* HC is in reset (hw startup) => no other driver
534 * maintain reset for at least the time specified in USB spec (50 ms)*/
535 usb_log_debug("Host controller found in reset state.\n");
536 async_usleep(50000);
537}
538/*----------------------------------------------------------------------------*/
539/** OHCI hw initialization routine.
540 *
541 * @param[in] instance OHCI hc driver structure.
542 */
543void hc_start(hc_t *instance)
544{
545 /* OHCI guide page 42 */
546 assert(instance);
547 usb_log_debug2("Started hc initialization routine.\n");
548
549 /* Save contents of fm_interval register */
550 const uint32_t fm_interval = instance->registers->fm_interval;
551 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
552
553 /* Reset hc */
554 usb_log_debug2("HC reset.\n");
555 size_t time = 0;
556 instance->registers->command_status = CS_HCR;
557 while (instance->registers->command_status & CS_HCR) {
558 async_usleep(10);
559 time += 10;
560 }
561 usb_log_debug2("HC reset complete in %zu us.\n", time);
562
563 /* Restore fm_interval */
564 instance->registers->fm_interval = fm_interval;
565 assert((instance->registers->command_status & CS_HCR) == 0);
566
567 /* hc is now in suspend state */
568 usb_log_debug2("HC should be in suspend state(%x).\n",
569 instance->registers->control);
570
571 /* Use HCCA */
572 instance->registers->hcca = addr_to_phys(instance->hcca);
573
574 /* Use queues */
575 instance->registers->bulk_head =
576 instance->lists[USB_TRANSFER_BULK].list_head_pa;
577 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
578 instance->lists[USB_TRANSFER_BULK].list_head,
579 instance->lists[USB_TRANSFER_BULK].list_head_pa);
580
581 instance->registers->control_head =
582 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
583 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
584 instance->lists[USB_TRANSFER_CONTROL].list_head,
585 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
586
587 /* Enable queues */
588 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
589 usb_log_debug2("All queues enabled(%x).\n",
590 instance->registers->control);
591
592 /* Enable interrupts */
593 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
594 usb_log_debug2("Enabled interrupts: %x.\n",
595 instance->registers->interrupt_enable);
596 instance->registers->interrupt_enable = I_MI;
597
598 /* Set periodic start to 90% */
599 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
600 instance->registers->periodic_start = (frame_length / 10) * 9;
601 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
602 instance->registers->periodic_start,
603 instance->registers->periodic_start, frame_length);
604
605 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
606 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
607 instance->registers->control);
608}
609/*----------------------------------------------------------------------------*/
610/** Initialize schedule queues
611 *
612 * @param[in] instance OHCI hc driver structure
613 * @return Error code
614 */
615int hc_init_transfer_lists(hc_t *instance)
616{
617 assert(instance);
618#define SETUP_ENDPOINT_LIST(type) \
619do { \
620 const char *name = usb_str_transfer_type(type); \
621 int ret = endpoint_list_init(&instance->lists[type], name); \
622 if (ret != EOK) { \
623 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
624 name, str_error(ret)); \
625 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
626 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
627 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
628 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
629 return ret; \
630 } \
631} while (0)
632
633 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
634 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
635 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
636 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
637#undef SETUP_ENDPOINT_LIST
638 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
639 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
640
641 return EOK;
642}
643/*----------------------------------------------------------------------------*/
644/** Initialize memory structures used by the OHCI hcd.
645 *
646 * @param[in] instance OHCI hc driver structure.
647 * @return Error code.
648 */
649int hc_init_memory(hc_t *instance)
650{
651 assert(instance);
652
653 bzero(&instance->rh, sizeof(instance->rh));
654 /* Init queues */
655 const int ret = hc_init_transfer_lists(instance);
656 if (ret != EOK) {
657 return ret;
658 }
659
660 /*Init HCCA */
661 instance->hcca = malloc32(sizeof(hcca_t));
662 if (instance->hcca == NULL)
663 return ENOMEM;
664 bzero(instance->hcca, sizeof(hcca_t));
665 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
666
667 unsigned i = 0;
668 for (; i < 32; ++i) {
669 instance->hcca->int_ep[i] =
670 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
671 }
672 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
673 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
674 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
675
676 return EOK;
677}
678
679/**
680 * @}
681 */
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