[41b96b4] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 | /** @addtogroup drvusbohcihc
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| 29 | * @{
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| 30 | */
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| 31 | /** @file
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| 32 | * @brief OHCI Host controller driver routines
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| 33 | */
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| 34 | #include <errno.h>
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| 35 | #include <str_error.h>
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| 36 | #include <adt/list.h>
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| 37 | #include <libarch/ddi.h>
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| 38 |
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| 39 | #include <usb/debug.h>
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| 40 | #include <usb/usb.h>
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| 41 | #include <usb/ddfiface.h>
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| 42 |
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[bab71635] | 43 | #include "hc.h"
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[2759c52] | 44 | #include "hcd_endpoint.h"
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[41b96b4] | 45 |
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[561112f] | 46 | #define OHCI_USED_INTERRUPTS \
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| 47 | (I_SO | I_WDH | I_UE | I_RHSC)
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[1ecc5de] | 48 |
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| 49 | static const irq_cmd_t ohci_irq_commands[] =
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| 50 | {
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| 51 | { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
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| 52 | { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
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| 53 | { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
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| 54 | { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
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| 55 | { .cmd = CMD_ACCEPT },
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| 56 | };
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| 57 |
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[2c617b0] | 58 | static void hc_gain_control(hc_t *instance);
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[1cb4f05] | 59 | static void hc_start(hc_t *instance);
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[6b6e3ed3] | 60 | static int hc_init_transfer_lists(hc_t *instance);
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[344925c] | 61 | static int hc_init_memory(hc_t *instance);
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[1cb4f05] | 62 | static int interrupt_emulator(hc_t *instance);
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| 63 |
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| 64 | /*----------------------------------------------------------------------------*/
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| 65 | /** Get number of commands used in IRQ code.
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| 66 | * @return Number of commands.
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| 67 | */
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| 68 | size_t hc_irq_cmd_count(void)
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| 69 | {
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| 70 | return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
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| 71 | }
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| 72 | /*----------------------------------------------------------------------------*/
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| 73 | /** Generate IRQ code commands.
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| 74 | * @param[out] cmds Place to store the commands.
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| 75 | * @param[in] cmd_size Size of the place (bytes).
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| 76 | * @param[in] regs Physical address of device's registers.
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| 77 | * @param[in] reg_size Size of the register area (bytes).
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| 78 | *
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| 79 | * @return Error code.
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| 80 | */
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| 81 | int hc_get_irq_commands(
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| 82 | irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
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| 83 | {
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| 84 | if (cmd_size < sizeof(ohci_irq_commands)
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| 85 | || reg_size < sizeof(ohci_regs_t))
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| 86 | return EOVERFLOW;
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| 87 |
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| 88 | /* Create register mapping to use in IRQ handler.
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| 89 | * This mapping should be present in kernel only.
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| 90 | * Remove it from here when kernel knows how to create mappings
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| 91 | * and accepts physical addresses in IRQ code.
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| 92 | * TODO: remove */
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| 93 | ohci_regs_t *registers;
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| 94 | const int ret = pio_enable((void*)regs, reg_size, (void**)®isters);
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| 95 |
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| 96 | /* Some bogus access to force create mapping. DO NOT remove,
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| 97 | * unless whole virtual addresses in irq is replaced
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| 98 | * NOTE: Compiler won't remove this as ohci_regs_t members
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| 99 | * are declared volatile. */
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| 100 | registers->revision;
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| 101 |
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| 102 | if (ret != EOK)
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| 103 | return ret;
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| 104 |
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| 105 | memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
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| 106 |
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| 107 | void *address = (void*)®isters->interrupt_status;
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| 108 | cmds[0].addr = address;
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| 109 | cmds[3].addr = address;
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| 110 | return EOK;
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| 111 | }
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[a6d1bc1] | 112 | /*----------------------------------------------------------------------------*/
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[02cacce] | 113 | /** Announce OHCI root hub to the DDF
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| 114 | *
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| 115 | * @param[in] instance OHCI driver intance
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| 116 | * @param[in] hub_fun DDF fuction representing OHCI root hub
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| 117 | * @return Error code
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| 118 | */
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[53f1c87] | 119 | int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
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| 120 | {
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| 121 | assert(instance);
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| 122 | assert(hub_fun);
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| 123 |
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[2ff7360] | 124 | const usb_address_t hub_address =
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[53f1c87] | 125 | device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
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[8148ee3a] | 126 | if (hub_address <= 0) {
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[c4fb5ecd] | 127 | usb_log_error("Failed to get OHCI root hub address: %s\n",
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| 128 | str_error(hub_address));
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[8148ee3a] | 129 | return hub_address;
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| 130 | }
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[53f1c87] | 131 | instance->rh.address = hub_address;
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| 132 | usb_device_keeper_bind(
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| 133 | &instance->manager, hub_address, hub_fun->handle);
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| 134 |
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[2ff7360] | 135 | #define CHECK_RET_RELEASE(ret, message...) \
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| 136 | if (ret != EOK) { \
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| 137 | usb_log_error(message); \
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| 138 | hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
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| 139 | usb_device_keeper_release(&instance->manager, hub_address); \
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| 140 | return ret; \
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| 141 | } else (void)0
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| 142 |
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| 143 | int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
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[9a6fde4] | 144 | USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
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[1cb4f05] | 145 | CHECK_RET_RELEASE(ret,
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| 146 | "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
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[6bec59b] | 147 |
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[53f1c87] | 148 | char *match_str = NULL;
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[1cb4f05] | 149 | /* DDF needs heap allocated string. */
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[6bec59b] | 150 | ret = asprintf(&match_str, "usb&class=hub");
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[2ff7360] | 151 | ret = ret > 0 ? 0 : ret;
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[1cb4f05] | 152 | CHECK_RET_RELEASE(ret,
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| 153 | "Failed to create match-id string: %s.\n", str_error(ret));
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[53f1c87] | 154 |
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| 155 | ret = ddf_fun_add_match_id(hub_fun, match_str, 100);
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[1cb4f05] | 156 | CHECK_RET_RELEASE(ret,
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| 157 | "Failed to add root hub match-id: %s.\n", str_error(ret));
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[2ff7360] | 158 |
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[5d07f54] | 159 | ret = ddf_fun_bind(hub_fun);
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[1cb4f05] | 160 | CHECK_RET_RELEASE(ret,
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| 161 | "Failed to bind root hub function: %s.\n", str_error(ret));
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[2ff7360] | 162 |
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| 163 | return EOK;
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| 164 | #undef CHECK_RET_RELEASE
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[53f1c87] | 165 | }
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| 166 | /*----------------------------------------------------------------------------*/
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[02cacce] | 167 | /** Initialize OHCI hc driver structure
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| 168 | *
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| 169 | * @param[in] instance Memory place for the structure.
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| 170 | * @param[in] regs Address of the memory mapped I/O registers.
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| 171 | * @param[in] reg_size Size of the memory mapped area.
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| 172 | * @param[in] interrupts True if w interrupts should be used
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| 173 | * @return Error code
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| 174 | */
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[62265ce] | 175 | int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
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[41b96b4] | 176 | {
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| 177 | assert(instance);
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[1cb4f05] | 178 |
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[c2be0e5] | 179 | #define CHECK_RET_RETURN(ret, message...) \
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| 180 | if (ret != EOK) { \
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| 181 | usb_log_error(message); \
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| 182 | return ret; \
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| 183 | } else (void)0
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[ff582d47] | 184 |
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[1cb4f05] | 185 | int ret =
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| 186 | pio_enable((void*)regs, reg_size, (void**)&instance->registers);
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[c2be0e5] | 187 | CHECK_RET_RETURN(ret,
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[1cb4f05] | 188 | "Failed to gain access to device registers: %s.\n", str_error(ret));
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[c2be0e5] | 189 |
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[bba0dc20] | 190 | list_initialize(&instance->pending_batches);
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[68b5ed6e] | 191 | usb_device_keeper_init(&instance->manager);
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[1cb4f05] | 192 |
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[5876d36] | 193 | ret = usb_endpoint_manager_init(&instance->ep_manager,
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| 194 | BANDWIDTH_AVAILABLE_USB11);
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| 195 | CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
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[4125b7d] | 196 | str_error(ret));
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[e7bc999] | 197 |
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[8790650] | 198 | ret = hc_init_memory(instance);
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[4125b7d] | 199 | CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
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| 200 | str_error(ret));
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[bba0dc20] | 201 | #undef CHECK_RET_RETURN
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| 202 |
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[aa9ccf7] | 203 | fibril_mutex_initialize(&instance->guard);
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[2c617b0] | 204 |
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[78ab6d4] | 205 | hc_gain_control(instance);
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[ff582d47] | 206 |
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[ff0e354] | 207 | if (!interrupts) {
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| 208 | instance->interrupt_emulator =
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| 209 | fibril_create((int(*)(void*))interrupt_emulator, instance);
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| 210 | fibril_add_ready(instance->interrupt_emulator);
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| 211 | }
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[7013b14] | 212 |
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[78ab6d4] | 213 | rh_init(&instance->rh, instance->registers);
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[1ef93fa] | 214 | hc_start(instance);
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[78ab6d4] | 215 |
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[8627377] | 216 | return EOK;
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[a6d1bc1] | 217 | }
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| 218 | /*----------------------------------------------------------------------------*/
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[78ab6d4] | 219 | /** Create and register endpoint structures.
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[02cacce] | 220 | *
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| 221 | * @param[in] instance OHCI driver structure.
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| 222 | * @param[in] address USB address of the device.
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| 223 | * @param[in] endpoint USB endpoint number.
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| 224 | * @param[in] speed Communication speeed of the device.
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| 225 | * @param[in] type Endpoint's transfer type.
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| 226 | * @param[in] direction Endpoint's direction.
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| 227 | * @param[in] mps Maximum packet size the endpoint accepts.
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| 228 | * @param[in] size Maximum allowed buffer size.
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| 229 | * @param[in] interval Time between transfers(interrupt transfers only).
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| 230 | * @return Error code
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| 231 | */
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[6bb0f43] | 232 | int hc_add_endpoint(
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| 233 | hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
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| 234 | usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
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| 235 | size_t mps, size_t size, unsigned interval)
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| 236 | {
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[aa81adc] | 237 | endpoint_t *ep =
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| 238 | endpoint_get(address, endpoint, direction, type, speed, mps);
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[6bb0f43] | 239 | if (ep == NULL)
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| 240 | return ENOMEM;
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| 241 |
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[2759c52] | 242 | hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
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| 243 | if (hcd_ep == NULL) {
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[592369ae] | 244 | endpoint_destroy(ep);
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[2759c52] | 245 | return ENOMEM;
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| 246 | }
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| 247 |
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[aa81adc] | 248 | int ret =
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| 249 | usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
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[6bb0f43] | 250 | if (ret != EOK) {
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[592369ae] | 251 | hcd_endpoint_clear(ep);
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[6bb0f43] | 252 | endpoint_destroy(ep);
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[5a2c42b] | 253 | return ret;
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| 254 | }
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| 255 |
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| 256 | /* Enqueue hcd_ep */
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| 257 | switch (ep->transfer_type) {
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| 258 | case USB_TRANSFER_CONTROL:
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| 259 | instance->registers->control &= ~C_CLE;
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| 260 | endpoint_list_add_ep(
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| 261 | &instance->lists[ep->transfer_type], hcd_ep);
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| 262 | instance->registers->control_current = 0;
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| 263 | instance->registers->control |= C_CLE;
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| 264 | break;
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| 265 | case USB_TRANSFER_BULK:
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| 266 | instance->registers->control &= ~C_BLE;
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| 267 | endpoint_list_add_ep(
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| 268 | &instance->lists[ep->transfer_type], hcd_ep);
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| 269 | instance->registers->control |= C_BLE;
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| 270 | break;
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| 271 | case USB_TRANSFER_ISOCHRONOUS:
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| 272 | case USB_TRANSFER_INTERRUPT:
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| 273 | instance->registers->control &= (~C_PLE & ~C_IE);
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| 274 | endpoint_list_add_ep(
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| 275 | &instance->lists[ep->transfer_type], hcd_ep);
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| 276 | instance->registers->control |= C_PLE | C_IE;
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| 277 | break;
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[6bb0f43] | 278 | }
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[5a2c42b] | 279 |
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[592369ae] | 280 | return EOK;
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[6bb0f43] | 281 | }
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| 282 | /*----------------------------------------------------------------------------*/
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[02cacce] | 283 | /** Dequeue and delete endpoint structures
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| 284 | *
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| 285 | * @param[in] instance OHCI hc driver structure.
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| 286 | * @param[in] address USB address of the device.
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| 287 | * @param[in] endpoint USB endpoint number.
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| 288 | * @param[in] direction Direction of the endpoint.
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| 289 | * @return Error code
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| 290 | */
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[6bb0f43] | 291 | int hc_remove_endpoint(hc_t *instance, usb_address_t address,
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| 292 | usb_endpoint_t endpoint, usb_direction_t direction)
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| 293 | {
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[592369ae] | 294 | assert(instance);
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| 295 | fibril_mutex_lock(&instance->guard);
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[2759c52] | 296 | endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
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| 297 | address, endpoint, direction, NULL);
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| 298 | if (ep == NULL) {
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[592369ae] | 299 | usb_log_error("Endpoint unregister failed: No such EP.\n");
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| 300 | fibril_mutex_unlock(&instance->guard);
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[2759c52] | 301 | return ENOENT;
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| 302 | }
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| 303 |
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| 304 | hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
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| 305 | if (hcd_ep) {
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[5a2c42b] | 306 | /* Dequeue hcd_ep */
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| 307 | switch (ep->transfer_type) {
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| 308 | case USB_TRANSFER_CONTROL:
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| 309 | instance->registers->control &= ~C_CLE;
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| 310 | endpoint_list_remove_ep(
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| 311 | &instance->lists[ep->transfer_type], hcd_ep);
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| 312 | instance->registers->control_current = 0;
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| 313 | instance->registers->control |= C_CLE;
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| 314 | break;
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| 315 | case USB_TRANSFER_BULK:
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| 316 | instance->registers->control &= ~C_BLE;
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| 317 | endpoint_list_remove_ep(
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| 318 | &instance->lists[ep->transfer_type], hcd_ep);
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| 319 | instance->registers->control |= C_BLE;
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| 320 | break;
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| 321 | case USB_TRANSFER_ISOCHRONOUS:
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| 322 | case USB_TRANSFER_INTERRUPT:
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| 323 | instance->registers->control &= (~C_PLE & ~C_IE);
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| 324 | endpoint_list_remove_ep(
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| 325 | &instance->lists[ep->transfer_type], hcd_ep);
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| 326 | instance->registers->control |= C_PLE | C_IE;
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| 327 | break;
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| 328 | default:
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| 329 | break;
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| 330 | }
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[2759c52] | 331 | hcd_endpoint_clear(ep);
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| 332 | } else {
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| 333 | usb_log_warning("Endpoint without hcd equivalent structure.\n");
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| 334 | }
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[592369ae] | 335 | int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
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[6bb0f43] | 336 | address, endpoint, direction);
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[592369ae] | 337 | fibril_mutex_unlock(&instance->guard);
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| 338 | return ret;
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| 339 | }
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| 340 | /*----------------------------------------------------------------------------*/
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[02cacce] | 341 | /** Get access to endpoint structures
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| 342 | *
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| 343 | * @param[in] instance OHCI hc driver structure.
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| 344 | * @param[in] address USB address of the device.
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| 345 | * @param[in] endpoint USB endpoint number.
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| 346 | * @param[in] direction Direction of the endpoint.
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| 347 | * @param[out] bw Reserved bandwidth.
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| 348 | * @return Error code
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| 349 | */
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[592369ae] | 350 | endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
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| 351 | usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
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| 352 | {
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| 353 | assert(instance);
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| 354 | fibril_mutex_lock(&instance->guard);
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| 355 | endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
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| 356 | address, endpoint, direction, bw);
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| 357 | fibril_mutex_unlock(&instance->guard);
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| 358 | return ep;
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[6bb0f43] | 359 | }
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| 360 | /*----------------------------------------------------------------------------*/
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[02cacce] | 361 | /** Add USB transfer to the schedule.
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| 362 | *
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| 363 | * @param[in] instance OHCI hc driver structure.
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| 364 | * @param[in] batch Batch representing the transfer.
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| 365 | * @return Error code.
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| 366 | */
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[1387692] | 367 | int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
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[41b96b4] | 368 | {
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| 369 | assert(instance);
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| 370 | assert(batch);
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[d017cea] | 371 | assert(batch->ep);
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[9ff5ff82] | 372 |
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[02cacce] | 373 | /* Check for root hub communication */
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[d017cea] | 374 | if (batch->ep->address == instance->rh.address) {
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---|
[7d5708d] | 375 | rh_request(&instance->rh, batch);
|
---|
| 376 | return EOK;
|
---|
[41b96b4] | 377 | }
|
---|
[7013b14] | 378 |
|
---|
[aa9ccf7] | 379 | fibril_mutex_lock(&instance->guard);
|
---|
[7013b14] | 380 | list_append(&batch->link, &instance->pending_batches);
|
---|
| 381 | batch_commit(batch);
|
---|
[02cacce] | 382 |
|
---|
| 383 | /* Control and bulk schedules need a kick to start working */
|
---|
| 384 | switch (batch->ep->transfer_type)
|
---|
| 385 | {
|
---|
[9ff5ff82] | 386 | case USB_TRANSFER_CONTROL:
|
---|
| 387 | instance->registers->command_status |= CS_CLF;
|
---|
| 388 | break;
|
---|
| 389 | case USB_TRANSFER_BULK:
|
---|
| 390 | instance->registers->command_status |= CS_BLF;
|
---|
| 391 | break;
|
---|
| 392 | default:
|
---|
| 393 | break;
|
---|
| 394 | }
|
---|
[aa9ccf7] | 395 | fibril_mutex_unlock(&instance->guard);
|
---|
[4c28d17] | 396 | return EOK;
|
---|
[41b96b4] | 397 | }
|
---|
| 398 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 399 | /** Interrupt handling routine
|
---|
| 400 | *
|
---|
| 401 | * @param[in] instance OHCI hc driver structure.
|
---|
| 402 | * @param[in] status Value of the status register at the time of interrupt.
|
---|
| 403 | */
|
---|
[7d6a676] | 404 | void hc_interrupt(hc_t *instance, uint32_t status)
|
---|
[41b96b4] | 405 | {
|
---|
| 406 | assert(instance);
|
---|
[561112f] | 407 | if ((status & ~I_SF) == 0) /* ignore sof status */
|
---|
[eaf1e3d] | 408 | return;
|
---|
[2df648c2] | 409 | usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
|
---|
[561112f] | 410 | if (status & I_RHSC)
|
---|
[7d6a676] | 411 | rh_interrupt(&instance->rh);
|
---|
| 412 |
|
---|
[561112f] | 413 | if (status & I_WDH) {
|
---|
[aa9ccf7] | 414 | fibril_mutex_lock(&instance->guard);
|
---|
[4125b7d] | 415 | usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
|
---|
| 416 | instance->registers->hcca,
|
---|
| 417 | (void *) addr_to_phys(instance->hcca));
|
---|
| 418 | usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
|
---|
[aa9ccf7] | 419 | instance->registers->periodic_current);
|
---|
[eaf1e3d] | 420 |
|
---|
[b72efe8] | 421 | link_t *current = instance->pending_batches.head.next;
|
---|
| 422 | while (current != &instance->pending_batches.head) {
|
---|
[7013b14] | 423 | link_t *next = current->next;
|
---|
[eaf1e3d] | 424 | usb_transfer_batch_t *batch =
|
---|
[7013b14] | 425 | usb_transfer_batch_from_link(current);
|
---|
| 426 |
|
---|
| 427 | if (batch_is_complete(batch)) {
|
---|
[d6522dd] | 428 | list_remove(current);
|
---|
[7013b14] | 429 | usb_transfer_batch_finish(batch);
|
---|
| 430 | }
|
---|
[b72efe8] | 431 |
|
---|
[7013b14] | 432 | current = next;
|
---|
[eaf1e3d] | 433 | }
|
---|
[aa9ccf7] | 434 | fibril_mutex_unlock(&instance->guard);
|
---|
[4c28d17] | 435 | }
|
---|
[68b9f148] | 436 |
|
---|
| 437 | if (status & I_UE) {
|
---|
[1ef93fa] | 438 | hc_start(instance);
|
---|
[68b9f148] | 439 | }
|
---|
| 440 |
|
---|
[41b96b4] | 441 | }
|
---|
[7d6a676] | 442 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 443 | /** Check status register regularly
|
---|
| 444 | *
|
---|
| 445 | * @param[in] instance OHCI hc driver structure.
|
---|
| 446 | * @return Error code
|
---|
| 447 | */
|
---|
[53f1c87] | 448 | int interrupt_emulator(hc_t *instance)
|
---|
[7d6a676] | 449 | {
|
---|
| 450 | assert(instance);
|
---|
| 451 | usb_log_info("Started interrupt emulator.\n");
|
---|
| 452 | while (1) {
|
---|
[2c617b0] | 453 | const uint32_t status = instance->registers->interrupt_status;
|
---|
[7d6a676] | 454 | instance->registers->interrupt_status = status;
|
---|
| 455 | hc_interrupt(instance, status);
|
---|
[02cacce] | 456 | async_usleep(10000);
|
---|
[7d6a676] | 457 | }
|
---|
| 458 | return EOK;
|
---|
| 459 | }
|
---|
[2c617b0] | 460 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 461 | /** Turn off any (BIOS)driver that might be in control of the device.
|
---|
[78ab6d4] | 462 | *
|
---|
| 463 | * This function implements routines described in chapter 5.1.1.3 of the OHCI
|
---|
| 464 | * specification (page 40, pdf page 54).
|
---|
[02cacce] | 465 | *
|
---|
| 466 | * @param[in] instance OHCI hc driver structure.
|
---|
| 467 | */
|
---|
[2c617b0] | 468 | void hc_gain_control(hc_t *instance)
|
---|
| 469 | {
|
---|
| 470 | assert(instance);
|
---|
[78ab6d4] | 471 |
|
---|
[c8eddf4] | 472 | usb_log_debug("Requesting OHCI control.\n");
|
---|
[78ab6d4] | 473 | if (instance->registers->revision & R_LEGACY_FLAG) {
|
---|
| 474 | /* Turn off legacy emulation, it should be enough to zero
|
---|
| 475 | * the lowest bit, but it caused problems. Thus clear all
|
---|
| 476 | * except GateA20 (causes restart on some hw).
|
---|
| 477 | * See page 145 of the specs for details.
|
---|
| 478 | */
|
---|
| 479 | volatile uint32_t *ohci_emulation_reg =
|
---|
| 480 | (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
|
---|
| 481 | usb_log_debug("OHCI legacy register %p: %x.\n",
|
---|
| 482 | ohci_emulation_reg, *ohci_emulation_reg);
|
---|
| 483 | /* Zero everything but A20State */
|
---|
| 484 | *ohci_emulation_reg &= 0x100;
|
---|
| 485 | usb_log_debug(
|
---|
| 486 | "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
|
---|
| 487 | ohci_emulation_reg, *ohci_emulation_reg);
|
---|
| 488 | }
|
---|
[112d159] | 489 |
|
---|
[2c617b0] | 490 | /* Interrupt routing enabled => smm driver is active */
|
---|
| 491 | if (instance->registers->control & C_IR) {
|
---|
[112d159] | 492 | usb_log_debug("SMM driver: request ownership change.\n");
|
---|
[2c617b0] | 493 | instance->registers->command_status |= CS_OCR;
|
---|
[78ab6d4] | 494 | /* Hope that SMM actually knows its stuff or we can hang here */
|
---|
[2c617b0] | 495 | while (instance->registers->control & C_IR) {
|
---|
| 496 | async_usleep(1000);
|
---|
| 497 | }
|
---|
[112d159] | 498 | usb_log_info("SMM driver: Ownership taken.\n");
|
---|
[78ab6d4] | 499 | C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
|
---|
[5d07f54] | 500 | async_usleep(50000);
|
---|
[2c617b0] | 501 | return;
|
---|
| 502 | }
|
---|
| 503 |
|
---|
[78ab6d4] | 504 | const unsigned hc_status = C_HCFS_GET(instance->registers->control);
|
---|
[2c617b0] | 505 | /* Interrupt routing disabled && status != USB_RESET => BIOS active */
|
---|
| 506 | if (hc_status != C_HCFS_RESET) {
|
---|
[112d159] | 507 | usb_log_debug("BIOS driver found.\n");
|
---|
[2c617b0] | 508 | if (hc_status == C_HCFS_OPERATIONAL) {
|
---|
[112d159] | 509 | usb_log_info("BIOS driver: HC operational.\n");
|
---|
[2c617b0] | 510 | return;
|
---|
| 511 | }
|
---|
[78ab6d4] | 512 | /* HC is suspended assert resume for 20ms, */
|
---|
| 513 | C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
|
---|
[2c617b0] | 514 | async_usleep(20000);
|
---|
[112d159] | 515 | usb_log_info("BIOS driver: HC resumed.\n");
|
---|
[2c617b0] | 516 | return;
|
---|
| 517 | }
|
---|
| 518 |
|
---|
| 519 | /* HC is in reset (hw startup) => no other driver
|
---|
| 520 | * maintain reset for at least the time specified in USB spec (50 ms)*/
|
---|
[c4fb5ecd] | 521 | usb_log_debug("Host controller found in reset state.\n");
|
---|
[2c617b0] | 522 | async_usleep(50000);
|
---|
| 523 | }
|
---|
| 524 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 525 | /** OHCI hw initialization routine.
|
---|
| 526 | *
|
---|
| 527 | * @param[in] instance OHCI hc driver structure.
|
---|
| 528 | */
|
---|
[1ef93fa] | 529 | void hc_start(hc_t *instance)
|
---|
[2c617b0] | 530 | {
|
---|
[112d159] | 531 | /* OHCI guide page 42 */
|
---|
[2c617b0] | 532 | assert(instance);
|
---|
[112d159] | 533 | usb_log_debug2("Started hc initialization routine.\n");
|
---|
| 534 |
|
---|
| 535 | /* Save contents of fm_interval register */
|
---|
[2c617b0] | 536 | const uint32_t fm_interval = instance->registers->fm_interval;
|
---|
[112d159] | 537 | usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
|
---|
[344925c] | 538 |
|
---|
[112d159] | 539 | /* Reset hc */
|
---|
| 540 | usb_log_debug2("HC reset.\n");
|
---|
| 541 | size_t time = 0;
|
---|
[2c617b0] | 542 | instance->registers->command_status = CS_HCR;
|
---|
[112d159] | 543 | while (instance->registers->command_status & CS_HCR) {
|
---|
| 544 | async_usleep(10);
|
---|
| 545 | time += 10;
|
---|
| 546 | }
|
---|
| 547 | usb_log_debug2("HC reset complete in %zu us.\n", time);
|
---|
[344925c] | 548 |
|
---|
[112d159] | 549 | /* Restore fm_interval */
|
---|
[2c617b0] | 550 | instance->registers->fm_interval = fm_interval;
|
---|
| 551 | assert((instance->registers->command_status & CS_HCR) == 0);
|
---|
[344925c] | 552 |
|
---|
[2c617b0] | 553 | /* hc is now in suspend state */
|
---|
[112d159] | 554 | usb_log_debug2("HC should be in suspend state(%x).\n",
|
---|
| 555 | instance->registers->control);
|
---|
[344925c] | 556 |
|
---|
[78d4e1f] | 557 | /* Use HCCA */
|
---|
| 558 | instance->registers->hcca = addr_to_phys(instance->hcca);
|
---|
| 559 |
|
---|
| 560 | /* Use queues */
|
---|
[5a2c42b] | 561 | instance->registers->bulk_head =
|
---|
| 562 | instance->lists[USB_TRANSFER_BULK].list_head_pa;
|
---|
[4125b7d] | 563 | usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 564 | instance->lists[USB_TRANSFER_BULK].list_head,
|
---|
| 565 | instance->lists[USB_TRANSFER_BULK].list_head_pa);
|
---|
[78d4e1f] | 566 |
|
---|
| 567 | instance->registers->control_head =
|
---|
[5a2c42b] | 568 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
|
---|
[4125b7d] | 569 | usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 570 | instance->lists[USB_TRANSFER_CONTROL].list_head,
|
---|
| 571 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
|
---|
[78d4e1f] | 572 |
|
---|
[112d159] | 573 | /* Enable queues */
|
---|
[344925c] | 574 | instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
|
---|
[112d159] | 575 | usb_log_debug2("All queues enabled(%x).\n",
|
---|
| 576 | instance->registers->control);
|
---|
| 577 |
|
---|
[561112f] | 578 | /* Enable interrupts */
|
---|
| 579 | instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
|
---|
[112d159] | 580 | usb_log_debug2("Enabled interrupts: %x.\n",
|
---|
| 581 | instance->registers->interrupt_enable);
|
---|
[561112f] | 582 | instance->registers->interrupt_enable = I_MI;
|
---|
[112d159] | 583 |
|
---|
| 584 | /* Set periodic start to 90% */
|
---|
| 585 | uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
|
---|
| 586 | instance->registers->periodic_start = (frame_length / 10) * 9;
|
---|
| 587 | usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
|
---|
| 588 | instance->registers->periodic_start,
|
---|
| 589 | instance->registers->periodic_start, frame_length);
|
---|
[2c617b0] | 590 |
|
---|
[78ab6d4] | 591 | C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
|
---|
[c4fb5ecd] | 592 | usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
|
---|
[112d159] | 593 | instance->registers->control);
|
---|
[2c617b0] | 594 | }
|
---|
[6b6e3ed3] | 595 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 596 | /** Initialize schedule queues
|
---|
| 597 | *
|
---|
| 598 | * @param[in] instance OHCI hc driver structure
|
---|
| 599 | * @return Error code
|
---|
| 600 | */
|
---|
[6b6e3ed3] | 601 | int hc_init_transfer_lists(hc_t *instance)
|
---|
| 602 | {
|
---|
| 603 | assert(instance);
|
---|
[5a2c42b] | 604 | #define SETUP_ENDPOINT_LIST(type) \
|
---|
[344925c] | 605 | do { \
|
---|
[5a2c42b] | 606 | const char *name = usb_str_transfer_type(type); \
|
---|
| 607 | int ret = endpoint_list_init(&instance->lists[type], name); \
|
---|
[6b6e3ed3] | 608 | if (ret != EOK) { \
|
---|
[1cb4f05] | 609 | usb_log_error("Failed to setup %s endpoint list: %s.\n", \
|
---|
| 610 | name, str_error(ret)); \
|
---|
[68b9f148] | 611 | endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
|
---|
[5a2c42b] | 612 | endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
|
---|
| 613 | endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
|
---|
| 614 | endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
|
---|
[70c85320] | 615 | return ret; \
|
---|
[344925c] | 616 | } \
|
---|
| 617 | } while (0)
|
---|
[6b6e3ed3] | 618 |
|
---|
[5a2c42b] | 619 | SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
|
---|
| 620 | SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
|
---|
| 621 | SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
|
---|
| 622 | SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
|
---|
| 623 | #undef SETUP_ENDPOINT_LIST
|
---|
| 624 | endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
|
---|
| 625 | &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
|
---|
[6b6e3ed3] | 626 |
|
---|
| 627 | return EOK;
|
---|
| 628 | }
|
---|
[344925c] | 629 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 630 | /** Initialize memory structures used by the OHCI hcd.
|
---|
| 631 | *
|
---|
| 632 | * @param[in] instance OHCI hc driver structure.
|
---|
| 633 | * @return Error code.
|
---|
| 634 | */
|
---|
[344925c] | 635 | int hc_init_memory(hc_t *instance)
|
---|
| 636 | {
|
---|
| 637 | assert(instance);
|
---|
[5d07f54] | 638 |
|
---|
| 639 | bzero(&instance->rh, sizeof(instance->rh));
|
---|
[8790650] | 640 | /* Init queues */
|
---|
[8953514] | 641 | const int ret = hc_init_transfer_lists(instance);
|
---|
| 642 | if (ret != EOK) {
|
---|
| 643 | return ret;
|
---|
| 644 | }
|
---|
[344925c] | 645 |
|
---|
[8790650] | 646 | /*Init HCCA */
|
---|
[344925c] | 647 | instance->hcca = malloc32(sizeof(hcca_t));
|
---|
| 648 | if (instance->hcca == NULL)
|
---|
| 649 | return ENOMEM;
|
---|
| 650 | bzero(instance->hcca, sizeof(hcca_t));
|
---|
[78d4e1f] | 651 | usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
|
---|
[344925c] | 652 |
|
---|
| 653 | unsigned i = 0;
|
---|
| 654 | for (; i < 32; ++i) {
|
---|
| 655 | instance->hcca->int_ep[i] =
|
---|
[5a2c42b] | 656 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
|
---|
[344925c] | 657 | }
|
---|
[4125b7d] | 658 | usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 659 | instance->lists[USB_TRANSFER_INTERRUPT].list_head,
|
---|
| 660 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
|
---|
[344925c] | 661 |
|
---|
| 662 | return EOK;
|
---|
| 663 | }
|
---|
[1ecc5de] | 664 |
|
---|
[41b96b4] | 665 | /**
|
---|
| 666 | * @}
|
---|
| 667 | */
|
---|