source: mainline/uspace/drv/bus/usb/ohci/hc.c@ db2cb04

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since db2cb04 was 8b54fe6, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

usb: Rename device_keeper ⇒ sub-device_manager to match the rest of the library

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File size: 18.8 KB
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[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
[bab71635]43#include "hc.h"
[e20eaed]44#include "ohci_endpoint.h"
[41b96b4]45
[561112f]46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
[1ecc5de]48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
[2c617b0]58static void hc_gain_control(hc_t *instance);
[1cb4f05]59static void hc_start(hc_t *instance);
[6b6e3ed3]60static int hc_init_transfer_lists(hc_t *instance);
[344925c]61static int hc_init_memory(hc_t *instance);
[1cb4f05]62static int interrupt_emulator(hc_t *instance);
[09ace19]63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
[1cb4f05]64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
[5d36062]95 if (ret != EOK)
96 return ret;
[1cb4f05]97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
[eb212e70]101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
[1cb4f05]108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
[a6d1bc1]117/*----------------------------------------------------------------------------*/
[02cacce]118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
[53f1c87]124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
[2ff7360]129 const usb_address_t hub_address =
[8b54fe6]130 usb_device_manager_get_free_address(
[961c29e8]131 &instance->generic.dev_manager, USB_SPEED_FULL);
[8148ee3a]132 if (hub_address <= 0) {
[c4fb5ecd]133 usb_log_error("Failed to get OHCI root hub address: %s\n",
134 str_error(hub_address));
[8148ee3a]135 return hub_address;
136 }
[53f1c87]137 instance->rh.address = hub_address;
[8b54fe6]138 usb_device_manager_bind(
[961c29e8]139 &instance->generic.dev_manager, hub_address, hub_fun->handle);
[53f1c87]140
[5ec492b]141#define CHECK_RET_UNREG_RETURN(ret, message...) \
[2ff7360]142if (ret != EOK) { \
143 usb_log_error(message); \
[5ec492b]144 usb_endpoint_manager_unregister_ep( \
145 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH);\
[8b54fe6]146 usb_device_manager_release( \
[5ec492b]147 &instance->generic.dev_manager, hub_address); \
[2ff7360]148 return ret; \
149} else (void)0
[0f1586d0]150 int ret = usb_endpoint_manager_add_ep(
151 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH,
152 USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64, 0);
[5ec492b]153 CHECK_RET_UNREG_RETURN(ret,
[0f1586d0]154 "Failed to register root hub control endpoint: %s.\n",
155 str_error(ret));
[6bec59b]156
[ef9460b]157 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
[5ec492b]158 CHECK_RET_UNREG_RETURN(ret,
[1cb4f05]159 "Failed to add root hub match-id: %s.\n", str_error(ret));
[2ff7360]160
[5d07f54]161 ret = ddf_fun_bind(hub_fun);
[5ec492b]162 CHECK_RET_UNREG_RETURN(ret,
[1cb4f05]163 "Failed to bind root hub function: %s.\n", str_error(ret));
[2ff7360]164
165 return EOK;
166#undef CHECK_RET_RELEASE
[53f1c87]167}
168/*----------------------------------------------------------------------------*/
[02cacce]169/** Initialize OHCI hc driver structure
170 *
171 * @param[in] instance Memory place for the structure.
172 * @param[in] regs Address of the memory mapped I/O registers.
173 * @param[in] reg_size Size of the memory mapped area.
174 * @param[in] interrupts True if w interrupts should be used
175 * @return Error code
176 */
[62265ce]177int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
[41b96b4]178{
179 assert(instance);
[1cb4f05]180
[c2be0e5]181#define CHECK_RET_RETURN(ret, message...) \
182if (ret != EOK) { \
183 usb_log_error(message); \
184 return ret; \
185} else (void)0
[ff582d47]186
[1cb4f05]187 int ret =
188 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
[c2be0e5]189 CHECK_RET_RETURN(ret,
[1cb4f05]190 "Failed to gain access to device registers: %s.\n", str_error(ret));
[c2be0e5]191
[bba0dc20]192 list_initialize(&instance->pending_batches);
[e7bc999]193
[933b0d7]194 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11,
195 bandwidth_count_usb11);
[cc34f5f0]196 CHECK_RET_RETURN(ret, "Failed to initialize generic driver: %s.\n",
[961c29e8]197 str_error(ret));
[90dd59dc]198 instance->generic.private_data = instance;
[09ace19]199 instance->generic.schedule = hc_schedule;
[620c710]200 instance->generic.ep_add_hook = ohci_endpoint_init;
[e2976bb]201
[8790650]202 ret = hc_init_memory(instance);
[4125b7d]203 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
204 str_error(ret));
[bba0dc20]205#undef CHECK_RET_RETURN
206
[aa9ccf7]207 fibril_mutex_initialize(&instance->guard);
[2c617b0]208
[78ab6d4]209 hc_gain_control(instance);
[ff582d47]210
[ff0e354]211 if (!interrupts) {
212 instance->interrupt_emulator =
213 fibril_create((int(*)(void*))interrupt_emulator, instance);
214 fibril_add_ready(instance->interrupt_emulator);
215 }
[7013b14]216
[78ab6d4]217 rh_init(&instance->rh, instance->registers);
[1ef93fa]218 hc_start(instance);
[78ab6d4]219
[8627377]220 return EOK;
[a6d1bc1]221}
222/*----------------------------------------------------------------------------*/
[620c710]223void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
224{
225 endpoint_list_t *list = &instance->lists[ep->transfer_type];
226 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
227 /* Enqueue ep */
228 switch (ep->transfer_type) {
229 case USB_TRANSFER_CONTROL:
230 instance->registers->control &= ~C_CLE;
231 endpoint_list_add_ep(list, ohci_ep);
232 instance->registers->control_current = 0;
233 instance->registers->control |= C_CLE;
234 break;
235 case USB_TRANSFER_BULK:
236 instance->registers->control &= ~C_BLE;
[f974519]237 endpoint_list_add_ep(list, ohci_ep);
[620c710]238 instance->registers->control |= C_BLE;
239 break;
240 case USB_TRANSFER_ISOCHRONOUS:
241 case USB_TRANSFER_INTERRUPT:
242 instance->registers->control &= (~C_PLE & ~C_IE);
[f974519]243 endpoint_list_add_ep(list, ohci_ep);
[620c710]244 instance->registers->control |= C_PLE | C_IE;
245 break;
246 }
247}
248/*----------------------------------------------------------------------------*/
249void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
250{
251 /* Dequeue ep */
252 endpoint_list_t *list = &instance->lists[ep->transfer_type];
253 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
254 switch (ep->transfer_type) {
255 case USB_TRANSFER_CONTROL:
256 instance->registers->control &= ~C_CLE;
257 endpoint_list_remove_ep(list, ohci_ep);
258 instance->registers->control_current = 0;
259 instance->registers->control |= C_CLE;
260 break;
261 case USB_TRANSFER_BULK:
262 instance->registers->control &= ~C_BLE;
263 endpoint_list_remove_ep(list, ohci_ep);
264 instance->registers->control |= C_BLE;
265 break;
266 case USB_TRANSFER_ISOCHRONOUS:
267 case USB_TRANSFER_INTERRUPT:
268 instance->registers->control &= (~C_PLE & ~C_IE);
269 endpoint_list_remove_ep(list, ohci_ep);
270 instance->registers->control |= C_PLE | C_IE;
271 break;
272 default:
273 break;
274 }
275}
276/*----------------------------------------------------------------------------*/
[02cacce]277/** Add USB transfer to the schedule.
278 *
279 * @param[in] instance OHCI hc driver structure.
280 * @param[in] batch Batch representing the transfer.
281 * @return Error code.
282 */
[09ace19]283int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
[41b96b4]284{
[09ace19]285 assert(hcd);
286 hc_t *instance = hcd->private_data;
[41b96b4]287 assert(instance);
[9ff5ff82]288
[02cacce]289 /* Check for root hub communication */
[d017cea]290 if (batch->ep->address == instance->rh.address) {
[7d5708d]291 rh_request(&instance->rh, batch);
292 return EOK;
[41b96b4]293 }
[9c10e51]294 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
295 if (!ohci_batch)
296 return ENOMEM;
[7013b14]297
[aa9ccf7]298 fibril_mutex_lock(&instance->guard);
[9c10e51]299 list_append(&ohci_batch->link, &instance->pending_batches);
300 ohci_transfer_batch_commit(ohci_batch);
[02cacce]301
302 /* Control and bulk schedules need a kick to start working */
303 switch (batch->ep->transfer_type)
304 {
[9ff5ff82]305 case USB_TRANSFER_CONTROL:
306 instance->registers->command_status |= CS_CLF;
307 break;
308 case USB_TRANSFER_BULK:
309 instance->registers->command_status |= CS_BLF;
310 break;
311 default:
312 break;
313 }
[aa9ccf7]314 fibril_mutex_unlock(&instance->guard);
[4c28d17]315 return EOK;
[41b96b4]316}
317/*----------------------------------------------------------------------------*/
[02cacce]318/** Interrupt handling routine
319 *
320 * @param[in] instance OHCI hc driver structure.
321 * @param[in] status Value of the status register at the time of interrupt.
322 */
[7d6a676]323void hc_interrupt(hc_t *instance, uint32_t status)
[41b96b4]324{
325 assert(instance);
[561112f]326 if ((status & ~I_SF) == 0) /* ignore sof status */
[eaf1e3d]327 return;
[2df648c2]328 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
[561112f]329 if (status & I_RHSC)
[7d6a676]330 rh_interrupt(&instance->rh);
331
[561112f]332 if (status & I_WDH) {
[aa9ccf7]333 fibril_mutex_lock(&instance->guard);
[4125b7d]334 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
335 instance->registers->hcca,
336 (void *) addr_to_phys(instance->hcca));
337 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
[aa9ccf7]338 instance->registers->periodic_current);
[eaf1e3d]339
[9c10e51]340 link_t *current = list_first(&instance->pending_batches);
341 while (current && current != &instance->pending_batches.head) {
[7013b14]342 link_t *next = current->next;
[9c10e51]343 ohci_transfer_batch_t *batch =
344 ohci_transfer_batch_from_link(current);
[7013b14]345
[9c10e51]346 if (ohci_transfer_batch_is_complete(batch)) {
[d6522dd]347 list_remove(current);
[9c10e51]348 ohci_transfer_batch_finish_dispose(batch);
[7013b14]349 }
[b72efe8]350
[7013b14]351 current = next;
[eaf1e3d]352 }
[aa9ccf7]353 fibril_mutex_unlock(&instance->guard);
[4c28d17]354 }
[68b9f148]355
356 if (status & I_UE) {
[f974519]357 usb_log_fatal("Error like no other!\n");
[1ef93fa]358 hc_start(instance);
[68b9f148]359 }
360
[41b96b4]361}
[7d6a676]362/*----------------------------------------------------------------------------*/
[02cacce]363/** Check status register regularly
364 *
365 * @param[in] instance OHCI hc driver structure.
366 * @return Error code
367 */
[53f1c87]368int interrupt_emulator(hc_t *instance)
[7d6a676]369{
370 assert(instance);
371 usb_log_info("Started interrupt emulator.\n");
372 while (1) {
[2c617b0]373 const uint32_t status = instance->registers->interrupt_status;
[7d6a676]374 instance->registers->interrupt_status = status;
375 hc_interrupt(instance, status);
[02cacce]376 async_usleep(10000);
[7d6a676]377 }
378 return EOK;
379}
[2c617b0]380/*----------------------------------------------------------------------------*/
[02cacce]381/** Turn off any (BIOS)driver that might be in control of the device.
[78ab6d4]382 *
383 * This function implements routines described in chapter 5.1.1.3 of the OHCI
384 * specification (page 40, pdf page 54).
[02cacce]385 *
386 * @param[in] instance OHCI hc driver structure.
387 */
[2c617b0]388void hc_gain_control(hc_t *instance)
389{
390 assert(instance);
[78ab6d4]391
[c8eddf4]392 usb_log_debug("Requesting OHCI control.\n");
[78ab6d4]393 if (instance->registers->revision & R_LEGACY_FLAG) {
394 /* Turn off legacy emulation, it should be enough to zero
395 * the lowest bit, but it caused problems. Thus clear all
396 * except GateA20 (causes restart on some hw).
397 * See page 145 of the specs for details.
398 */
399 volatile uint32_t *ohci_emulation_reg =
400 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
401 usb_log_debug("OHCI legacy register %p: %x.\n",
402 ohci_emulation_reg, *ohci_emulation_reg);
403 /* Zero everything but A20State */
404 *ohci_emulation_reg &= 0x100;
405 usb_log_debug(
406 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
407 ohci_emulation_reg, *ohci_emulation_reg);
408 }
[112d159]409
[2c617b0]410 /* Interrupt routing enabled => smm driver is active */
411 if (instance->registers->control & C_IR) {
[112d159]412 usb_log_debug("SMM driver: request ownership change.\n");
[2c617b0]413 instance->registers->command_status |= CS_OCR;
[78ab6d4]414 /* Hope that SMM actually knows its stuff or we can hang here */
[2c617b0]415 while (instance->registers->control & C_IR) {
416 async_usleep(1000);
417 }
[112d159]418 usb_log_info("SMM driver: Ownership taken.\n");
[78ab6d4]419 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
[5d07f54]420 async_usleep(50000);
[2c617b0]421 return;
422 }
423
[78ab6d4]424 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
[2c617b0]425 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
426 if (hc_status != C_HCFS_RESET) {
[112d159]427 usb_log_debug("BIOS driver found.\n");
[2c617b0]428 if (hc_status == C_HCFS_OPERATIONAL) {
[112d159]429 usb_log_info("BIOS driver: HC operational.\n");
[2c617b0]430 return;
431 }
[78ab6d4]432 /* HC is suspended assert resume for 20ms, */
433 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
[2c617b0]434 async_usleep(20000);
[112d159]435 usb_log_info("BIOS driver: HC resumed.\n");
[2c617b0]436 return;
437 }
438
439 /* HC is in reset (hw startup) => no other driver
440 * maintain reset for at least the time specified in USB spec (50 ms)*/
[c4fb5ecd]441 usb_log_debug("Host controller found in reset state.\n");
[2c617b0]442 async_usleep(50000);
443}
444/*----------------------------------------------------------------------------*/
[02cacce]445/** OHCI hw initialization routine.
446 *
447 * @param[in] instance OHCI hc driver structure.
448 */
[1ef93fa]449void hc_start(hc_t *instance)
[2c617b0]450{
[112d159]451 /* OHCI guide page 42 */
[2c617b0]452 assert(instance);
[112d159]453 usb_log_debug2("Started hc initialization routine.\n");
454
455 /* Save contents of fm_interval register */
[2c617b0]456 const uint32_t fm_interval = instance->registers->fm_interval;
[112d159]457 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
[344925c]458
[112d159]459 /* Reset hc */
460 usb_log_debug2("HC reset.\n");
461 size_t time = 0;
[2c617b0]462 instance->registers->command_status = CS_HCR;
[112d159]463 while (instance->registers->command_status & CS_HCR) {
464 async_usleep(10);
465 time += 10;
466 }
467 usb_log_debug2("HC reset complete in %zu us.\n", time);
[344925c]468
[112d159]469 /* Restore fm_interval */
[2c617b0]470 instance->registers->fm_interval = fm_interval;
471 assert((instance->registers->command_status & CS_HCR) == 0);
[344925c]472
[2c617b0]473 /* hc is now in suspend state */
[112d159]474 usb_log_debug2("HC should be in suspend state(%x).\n",
475 instance->registers->control);
[344925c]476
[78d4e1f]477 /* Use HCCA */
478 instance->registers->hcca = addr_to_phys(instance->hcca);
479
480 /* Use queues */
[5a2c42b]481 instance->registers->bulk_head =
482 instance->lists[USB_TRANSFER_BULK].list_head_pa;
[4125b7d]483 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]484 instance->lists[USB_TRANSFER_BULK].list_head,
485 instance->lists[USB_TRANSFER_BULK].list_head_pa);
[78d4e1f]486
487 instance->registers->control_head =
[5a2c42b]488 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
[4125b7d]489 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]490 instance->lists[USB_TRANSFER_CONTROL].list_head,
491 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
[78d4e1f]492
[112d159]493 /* Enable queues */
[344925c]494 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
[112d159]495 usb_log_debug2("All queues enabled(%x).\n",
496 instance->registers->control);
497
[561112f]498 /* Enable interrupts */
499 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
[112d159]500 usb_log_debug2("Enabled interrupts: %x.\n",
501 instance->registers->interrupt_enable);
[561112f]502 instance->registers->interrupt_enable = I_MI;
[112d159]503
504 /* Set periodic start to 90% */
505 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
506 instance->registers->periodic_start = (frame_length / 10) * 9;
507 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
508 instance->registers->periodic_start,
509 instance->registers->periodic_start, frame_length);
[2c617b0]510
[78ab6d4]511 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
[c4fb5ecd]512 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
[112d159]513 instance->registers->control);
[2c617b0]514}
[6b6e3ed3]515/*----------------------------------------------------------------------------*/
[02cacce]516/** Initialize schedule queues
517 *
518 * @param[in] instance OHCI hc driver structure
519 * @return Error code
520 */
[6b6e3ed3]521int hc_init_transfer_lists(hc_t *instance)
522{
523 assert(instance);
[5a2c42b]524#define SETUP_ENDPOINT_LIST(type) \
[344925c]525do { \
[5a2c42b]526 const char *name = usb_str_transfer_type(type); \
527 int ret = endpoint_list_init(&instance->lists[type], name); \
[6b6e3ed3]528 if (ret != EOK) { \
[1cb4f05]529 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
530 name, str_error(ret)); \
[68b9f148]531 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
[5a2c42b]532 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
533 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
534 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
[70c85320]535 return ret; \
[344925c]536 } \
537} while (0)
[6b6e3ed3]538
[5a2c42b]539 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
540 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
541 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
542 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
543#undef SETUP_ENDPOINT_LIST
544 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
545 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
[6b6e3ed3]546
547 return EOK;
548}
[344925c]549/*----------------------------------------------------------------------------*/
[02cacce]550/** Initialize memory structures used by the OHCI hcd.
551 *
552 * @param[in] instance OHCI hc driver structure.
553 * @return Error code.
554 */
[344925c]555int hc_init_memory(hc_t *instance)
556{
557 assert(instance);
[5d07f54]558
559 bzero(&instance->rh, sizeof(instance->rh));
[8790650]560 /* Init queues */
[8953514]561 const int ret = hc_init_transfer_lists(instance);
562 if (ret != EOK) {
563 return ret;
564 }
[344925c]565
[8790650]566 /*Init HCCA */
[344925c]567 instance->hcca = malloc32(sizeof(hcca_t));
568 if (instance->hcca == NULL)
569 return ENOMEM;
570 bzero(instance->hcca, sizeof(hcca_t));
[78d4e1f]571 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
[344925c]572
573 unsigned i = 0;
574 for (; i < 32; ++i) {
575 instance->hcca->int_ep[i] =
[5a2c42b]576 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
[344925c]577 }
[4125b7d]578 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
[5a2c42b]579 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
580 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
[344925c]581
582 return EOK;
583}
[1ecc5de]584
[41b96b4]585/**
586 * @}
587 */
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