source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 9a790ad1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9a790ad1 was 9c10e51, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: use driver specific structure instead of the generic one

ohci: do not create hw structures if communicating with root hub

  • Property mode set to 100644
File size: 18.9 KB
RevLine 
[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
[bab71635]43#include "hc.h"
[e20eaed]44#include "ohci_endpoint.h"
[41b96b4]45
[561112f]46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
[1ecc5de]48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
[2c617b0]58static void hc_gain_control(hc_t *instance);
[1cb4f05]59static void hc_start(hc_t *instance);
[6b6e3ed3]60static int hc_init_transfer_lists(hc_t *instance);
[344925c]61static int hc_init_memory(hc_t *instance);
[1cb4f05]62static int interrupt_emulator(hc_t *instance);
[09ace19]63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
[1cb4f05]64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
[5d36062]95 if (ret != EOK)
96 return ret;
[1cb4f05]97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
[eb212e70]101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
[1cb4f05]108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
[a6d1bc1]117/*----------------------------------------------------------------------------*/
[02cacce]118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
[53f1c87]124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
[2ff7360]129 const usb_address_t hub_address =
[961c29e8]130 device_keeper_get_free_address(
131 &instance->generic.dev_manager, USB_SPEED_FULL);
[8148ee3a]132 if (hub_address <= 0) {
[c4fb5ecd]133 usb_log_error("Failed to get OHCI root hub address: %s\n",
134 str_error(hub_address));
[8148ee3a]135 return hub_address;
136 }
[53f1c87]137 instance->rh.address = hub_address;
138 usb_device_keeper_bind(
[961c29e8]139 &instance->generic.dev_manager, hub_address, hub_fun->handle);
[53f1c87]140
[f974519]141#define CHECK_RET_DESTROY(ret, message...) \
[2ff7360]142if (ret != EOK) { \
143 usb_log_error(message); \
[f974519]144 endpoint_destroy(ep); \
145 usb_endpoint_manager_unregister_ep(&instance->generic.ep_manager, \
146 hub_address, 0, USB_DIRECTION_BOTH); \
[2ff7360]147 return ret; \
148} else (void)0
[cc34f5f0]149 endpoint_t *ep =
150 endpoint_get(hub_address, 0, USB_DIRECTION_BOTH,
151 USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64);
152 if (ep == NULL)
153 return ENOMEM;
154
155 int ret = ohci_endpoint_init(&instance->generic, ep);
[f974519]156 CHECK_RET_DESTROY(ret, "Failed to initialize rh OHCI ep structures.\n");
[cc34f5f0]157
[f974519]158 ret = usb_endpoint_manager_register_ep(
159 &instance->generic.ep_manager, ep, 0);
160 CHECK_RET_DESTROY(ret, "Failed to initialize rh control ep.\n");
161 ep = NULL;
[6bec59b]162
[ef9460b]163 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
[f974519]164 CHECK_RET_DESTROY(ret,
[1cb4f05]165 "Failed to add root hub match-id: %s.\n", str_error(ret));
[2ff7360]166
[5d07f54]167 ret = ddf_fun_bind(hub_fun);
[f974519]168 CHECK_RET_DESTROY(ret,
[1cb4f05]169 "Failed to bind root hub function: %s.\n", str_error(ret));
[2ff7360]170
171 return EOK;
172#undef CHECK_RET_RELEASE
[53f1c87]173}
174/*----------------------------------------------------------------------------*/
[02cacce]175/** Initialize OHCI hc driver structure
176 *
177 * @param[in] instance Memory place for the structure.
178 * @param[in] regs Address of the memory mapped I/O registers.
179 * @param[in] reg_size Size of the memory mapped area.
180 * @param[in] interrupts True if w interrupts should be used
181 * @return Error code
182 */
[62265ce]183int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
[41b96b4]184{
185 assert(instance);
[1cb4f05]186
[c2be0e5]187#define CHECK_RET_RETURN(ret, message...) \
188if (ret != EOK) { \
189 usb_log_error(message); \
190 return ret; \
191} else (void)0
[ff582d47]192
[1cb4f05]193 int ret =
194 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
[c2be0e5]195 CHECK_RET_RETURN(ret,
[1cb4f05]196 "Failed to gain access to device registers: %s.\n", str_error(ret));
[c2be0e5]197
[bba0dc20]198 list_initialize(&instance->pending_batches);
[e7bc999]199
[e2976bb]200 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
[cc34f5f0]201 CHECK_RET_RETURN(ret, "Failed to initialize generic driver: %s.\n",
[961c29e8]202 str_error(ret));
[90dd59dc]203 instance->generic.private_data = instance;
[09ace19]204 instance->generic.schedule = hc_schedule;
[620c710]205 instance->generic.ep_add_hook = ohci_endpoint_init;
[e2976bb]206
[8790650]207 ret = hc_init_memory(instance);
[4125b7d]208 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
209 str_error(ret));
[bba0dc20]210#undef CHECK_RET_RETURN
211
[aa9ccf7]212 fibril_mutex_initialize(&instance->guard);
[2c617b0]213
[78ab6d4]214 hc_gain_control(instance);
[ff582d47]215
[ff0e354]216 if (!interrupts) {
217 instance->interrupt_emulator =
218 fibril_create((int(*)(void*))interrupt_emulator, instance);
219 fibril_add_ready(instance->interrupt_emulator);
220 }
[7013b14]221
[78ab6d4]222 rh_init(&instance->rh, instance->registers);
[1ef93fa]223 hc_start(instance);
[78ab6d4]224
[8627377]225 return EOK;
[a6d1bc1]226}
227/*----------------------------------------------------------------------------*/
[620c710]228void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
229{
230 endpoint_list_t *list = &instance->lists[ep->transfer_type];
231 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
232 /* Enqueue ep */
233 switch (ep->transfer_type) {
234 case USB_TRANSFER_CONTROL:
235 instance->registers->control &= ~C_CLE;
236 endpoint_list_add_ep(list, ohci_ep);
237 instance->registers->control_current = 0;
238 instance->registers->control |= C_CLE;
239 break;
240 case USB_TRANSFER_BULK:
241 instance->registers->control &= ~C_BLE;
[f974519]242 endpoint_list_add_ep(list, ohci_ep);
[620c710]243 instance->registers->control |= C_BLE;
244 break;
245 case USB_TRANSFER_ISOCHRONOUS:
246 case USB_TRANSFER_INTERRUPT:
247 instance->registers->control &= (~C_PLE & ~C_IE);
[f974519]248 endpoint_list_add_ep(list, ohci_ep);
[620c710]249 instance->registers->control |= C_PLE | C_IE;
250 break;
251 }
252}
253/*----------------------------------------------------------------------------*/
254void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
255{
256 /* Dequeue ep */
257 endpoint_list_t *list = &instance->lists[ep->transfer_type];
258 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
259 switch (ep->transfer_type) {
260 case USB_TRANSFER_CONTROL:
261 instance->registers->control &= ~C_CLE;
262 endpoint_list_remove_ep(list, ohci_ep);
263 instance->registers->control_current = 0;
264 instance->registers->control |= C_CLE;
265 break;
266 case USB_TRANSFER_BULK:
267 instance->registers->control &= ~C_BLE;
268 endpoint_list_remove_ep(list, ohci_ep);
269 instance->registers->control |= C_BLE;
270 break;
271 case USB_TRANSFER_ISOCHRONOUS:
272 case USB_TRANSFER_INTERRUPT:
273 instance->registers->control &= (~C_PLE & ~C_IE);
274 endpoint_list_remove_ep(list, ohci_ep);
275 instance->registers->control |= C_PLE | C_IE;
276 break;
277 default:
278 break;
279 }
280}
281/*----------------------------------------------------------------------------*/
[02cacce]282/** Add USB transfer to the schedule.
283 *
284 * @param[in] instance OHCI hc driver structure.
285 * @param[in] batch Batch representing the transfer.
286 * @return Error code.
287 */
[09ace19]288int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
[41b96b4]289{
[09ace19]290 assert(hcd);
291 hc_t *instance = hcd->private_data;
[41b96b4]292 assert(instance);
[9ff5ff82]293
[02cacce]294 /* Check for root hub communication */
[d017cea]295 if (batch->ep->address == instance->rh.address) {
[7d5708d]296 rh_request(&instance->rh, batch);
297 return EOK;
[41b96b4]298 }
[9c10e51]299 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
300 if (!ohci_batch)
301 return ENOMEM;
[7013b14]302
[aa9ccf7]303 fibril_mutex_lock(&instance->guard);
[9c10e51]304 list_append(&ohci_batch->link, &instance->pending_batches);
305 ohci_transfer_batch_commit(ohci_batch);
[02cacce]306
307 /* Control and bulk schedules need a kick to start working */
308 switch (batch->ep->transfer_type)
309 {
[9ff5ff82]310 case USB_TRANSFER_CONTROL:
311 instance->registers->command_status |= CS_CLF;
312 break;
313 case USB_TRANSFER_BULK:
314 instance->registers->command_status |= CS_BLF;
315 break;
316 default:
317 break;
318 }
[aa9ccf7]319 fibril_mutex_unlock(&instance->guard);
[4c28d17]320 return EOK;
[41b96b4]321}
322/*----------------------------------------------------------------------------*/
[02cacce]323/** Interrupt handling routine
324 *
325 * @param[in] instance OHCI hc driver structure.
326 * @param[in] status Value of the status register at the time of interrupt.
327 */
[7d6a676]328void hc_interrupt(hc_t *instance, uint32_t status)
[41b96b4]329{
330 assert(instance);
[561112f]331 if ((status & ~I_SF) == 0) /* ignore sof status */
[eaf1e3d]332 return;
[2df648c2]333 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
[561112f]334 if (status & I_RHSC)
[7d6a676]335 rh_interrupt(&instance->rh);
336
[561112f]337 if (status & I_WDH) {
[aa9ccf7]338 fibril_mutex_lock(&instance->guard);
[4125b7d]339 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
340 instance->registers->hcca,
341 (void *) addr_to_phys(instance->hcca));
342 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
[aa9ccf7]343 instance->registers->periodic_current);
[eaf1e3d]344
[9c10e51]345 link_t *current = list_first(&instance->pending_batches);
346 while (current && current != &instance->pending_batches.head) {
[7013b14]347 link_t *next = current->next;
[9c10e51]348 ohci_transfer_batch_t *batch =
349 ohci_transfer_batch_from_link(current);
[7013b14]350
[9c10e51]351 if (ohci_transfer_batch_is_complete(batch)) {
[d6522dd]352 list_remove(current);
[9c10e51]353 ohci_transfer_batch_finish_dispose(batch);
[7013b14]354 }
[b72efe8]355
[7013b14]356 current = next;
[eaf1e3d]357 }
[aa9ccf7]358 fibril_mutex_unlock(&instance->guard);
[4c28d17]359 }
[68b9f148]360
361 if (status & I_UE) {
[f974519]362 usb_log_fatal("Error like no other!\n");
[1ef93fa]363 hc_start(instance);
[68b9f148]364 }
365
[41b96b4]366}
[7d6a676]367/*----------------------------------------------------------------------------*/
[02cacce]368/** Check status register regularly
369 *
370 * @param[in] instance OHCI hc driver structure.
371 * @return Error code
372 */
[53f1c87]373int interrupt_emulator(hc_t *instance)
[7d6a676]374{
375 assert(instance);
376 usb_log_info("Started interrupt emulator.\n");
377 while (1) {
[2c617b0]378 const uint32_t status = instance->registers->interrupt_status;
[7d6a676]379 instance->registers->interrupt_status = status;
380 hc_interrupt(instance, status);
[02cacce]381 async_usleep(10000);
[7d6a676]382 }
383 return EOK;
384}
[2c617b0]385/*----------------------------------------------------------------------------*/
[02cacce]386/** Turn off any (BIOS)driver that might be in control of the device.
[78ab6d4]387 *
388 * This function implements routines described in chapter 5.1.1.3 of the OHCI
389 * specification (page 40, pdf page 54).
[02cacce]390 *
391 * @param[in] instance OHCI hc driver structure.
392 */
[2c617b0]393void hc_gain_control(hc_t *instance)
394{
395 assert(instance);
[78ab6d4]396
[c8eddf4]397 usb_log_debug("Requesting OHCI control.\n");
[78ab6d4]398 if (instance->registers->revision & R_LEGACY_FLAG) {
399 /* Turn off legacy emulation, it should be enough to zero
400 * the lowest bit, but it caused problems. Thus clear all
401 * except GateA20 (causes restart on some hw).
402 * See page 145 of the specs for details.
403 */
404 volatile uint32_t *ohci_emulation_reg =
405 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
406 usb_log_debug("OHCI legacy register %p: %x.\n",
407 ohci_emulation_reg, *ohci_emulation_reg);
408 /* Zero everything but A20State */
409 *ohci_emulation_reg &= 0x100;
410 usb_log_debug(
411 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
412 ohci_emulation_reg, *ohci_emulation_reg);
413 }
[112d159]414
[2c617b0]415 /* Interrupt routing enabled => smm driver is active */
416 if (instance->registers->control & C_IR) {
[112d159]417 usb_log_debug("SMM driver: request ownership change.\n");
[2c617b0]418 instance->registers->command_status |= CS_OCR;
[78ab6d4]419 /* Hope that SMM actually knows its stuff or we can hang here */
[2c617b0]420 while (instance->registers->control & C_IR) {
421 async_usleep(1000);
422 }
[112d159]423 usb_log_info("SMM driver: Ownership taken.\n");
[78ab6d4]424 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
[5d07f54]425 async_usleep(50000);
[2c617b0]426 return;
427 }
428
[78ab6d4]429 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
[2c617b0]430 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
431 if (hc_status != C_HCFS_RESET) {
[112d159]432 usb_log_debug("BIOS driver found.\n");
[2c617b0]433 if (hc_status == C_HCFS_OPERATIONAL) {
[112d159]434 usb_log_info("BIOS driver: HC operational.\n");
[2c617b0]435 return;
436 }
[78ab6d4]437 /* HC is suspended assert resume for 20ms, */
438 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
[2c617b0]439 async_usleep(20000);
[112d159]440 usb_log_info("BIOS driver: HC resumed.\n");
[2c617b0]441 return;
442 }
443
444 /* HC is in reset (hw startup) => no other driver
445 * maintain reset for at least the time specified in USB spec (50 ms)*/
[c4fb5ecd]446 usb_log_debug("Host controller found in reset state.\n");
[2c617b0]447 async_usleep(50000);
448}
449/*----------------------------------------------------------------------------*/
[02cacce]450/** OHCI hw initialization routine.
451 *
452 * @param[in] instance OHCI hc driver structure.
453 */
[1ef93fa]454void hc_start(hc_t *instance)
[2c617b0]455{
[112d159]456 /* OHCI guide page 42 */
[2c617b0]457 assert(instance);
[112d159]458 usb_log_debug2("Started hc initialization routine.\n");
459
460 /* Save contents of fm_interval register */
[2c617b0]461 const uint32_t fm_interval = instance->registers->fm_interval;
[112d159]462 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
[344925c]463
[112d159]464 /* Reset hc */
465 usb_log_debug2("HC reset.\n");
466 size_t time = 0;
[2c617b0]467 instance->registers->command_status = CS_HCR;
[112d159]468 while (instance->registers->command_status & CS_HCR) {
469 async_usleep(10);
470 time += 10;
471 }
472 usb_log_debug2("HC reset complete in %zu us.\n", time);
[344925c]473
[112d159]474 /* Restore fm_interval */
[2c617b0]475 instance->registers->fm_interval = fm_interval;
476 assert((instance->registers->command_status & CS_HCR) == 0);
[344925c]477
[2c617b0]478 /* hc is now in suspend state */
[112d159]479 usb_log_debug2("HC should be in suspend state(%x).\n",
480 instance->registers->control);
[344925c]481
[78d4e1f]482 /* Use HCCA */
483 instance->registers->hcca = addr_to_phys(instance->hcca);
484
485 /* Use queues */
[5a2c42b]486 instance->registers->bulk_head =
487 instance->lists[USB_TRANSFER_BULK].list_head_pa;
[4125b7d]488 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]489 instance->lists[USB_TRANSFER_BULK].list_head,
490 instance->lists[USB_TRANSFER_BULK].list_head_pa);
[78d4e1f]491
492 instance->registers->control_head =
[5a2c42b]493 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
[4125b7d]494 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]495 instance->lists[USB_TRANSFER_CONTROL].list_head,
496 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
[78d4e1f]497
[112d159]498 /* Enable queues */
[344925c]499 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
[112d159]500 usb_log_debug2("All queues enabled(%x).\n",
501 instance->registers->control);
502
[561112f]503 /* Enable interrupts */
504 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
[112d159]505 usb_log_debug2("Enabled interrupts: %x.\n",
506 instance->registers->interrupt_enable);
[561112f]507 instance->registers->interrupt_enable = I_MI;
[112d159]508
509 /* Set periodic start to 90% */
510 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
511 instance->registers->periodic_start = (frame_length / 10) * 9;
512 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
513 instance->registers->periodic_start,
514 instance->registers->periodic_start, frame_length);
[2c617b0]515
[78ab6d4]516 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
[c4fb5ecd]517 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
[112d159]518 instance->registers->control);
[2c617b0]519}
[6b6e3ed3]520/*----------------------------------------------------------------------------*/
[02cacce]521/** Initialize schedule queues
522 *
523 * @param[in] instance OHCI hc driver structure
524 * @return Error code
525 */
[6b6e3ed3]526int hc_init_transfer_lists(hc_t *instance)
527{
528 assert(instance);
[5a2c42b]529#define SETUP_ENDPOINT_LIST(type) \
[344925c]530do { \
[5a2c42b]531 const char *name = usb_str_transfer_type(type); \
532 int ret = endpoint_list_init(&instance->lists[type], name); \
[6b6e3ed3]533 if (ret != EOK) { \
[1cb4f05]534 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
535 name, str_error(ret)); \
[68b9f148]536 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
[5a2c42b]537 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
538 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
539 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
[70c85320]540 return ret; \
[344925c]541 } \
542} while (0)
[6b6e3ed3]543
[5a2c42b]544 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
545 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
546 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
547 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
548#undef SETUP_ENDPOINT_LIST
549 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
550 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
[6b6e3ed3]551
552 return EOK;
553}
[344925c]554/*----------------------------------------------------------------------------*/
[02cacce]555/** Initialize memory structures used by the OHCI hcd.
556 *
557 * @param[in] instance OHCI hc driver structure.
558 * @return Error code.
559 */
[344925c]560int hc_init_memory(hc_t *instance)
561{
562 assert(instance);
[5d07f54]563
564 bzero(&instance->rh, sizeof(instance->rh));
[8790650]565 /* Init queues */
[8953514]566 const int ret = hc_init_transfer_lists(instance);
567 if (ret != EOK) {
568 return ret;
569 }
[344925c]570
[8790650]571 /*Init HCCA */
[344925c]572 instance->hcca = malloc32(sizeof(hcca_t));
573 if (instance->hcca == NULL)
574 return ENOMEM;
575 bzero(instance->hcca, sizeof(hcca_t));
[78d4e1f]576 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
[344925c]577
578 unsigned i = 0;
579 for (; i < 32; ++i) {
580 instance->hcca->int_ep[i] =
[5a2c42b]581 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
[344925c]582 }
[4125b7d]583 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
[5a2c42b]584 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
585 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
[344925c]586
587 return EOK;
588}
[1ecc5de]589
[41b96b4]590/**
591 * @}
592 */
Note: See TracBrowser for help on using the repository browser.