source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 57e06ef

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 57e06ef was 57e06ef, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: Minor improvements.

Remove unused member.
Fix comments.
Add const qualifiers and asserts.

  • Property mode set to 100644
File size: 19.0 KB
RevLine 
[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
[bab71635]43#include "hc.h"
[e20eaed]44#include "ohci_endpoint.h"
[41b96b4]45
[561112f]46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
[1ecc5de]48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
[2c617b0]58static void hc_gain_control(hc_t *instance);
[1cb4f05]59static void hc_start(hc_t *instance);
[6b6e3ed3]60static int hc_init_transfer_lists(hc_t *instance);
[344925c]61static int hc_init_memory(hc_t *instance);
[1cb4f05]62static int interrupt_emulator(hc_t *instance);
[09ace19]63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
[1cb4f05]64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
[5d36062]95 if (ret != EOK)
96 return ret;
[1cb4f05]97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
[eb212e70]101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
[1cb4f05]108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
[a6d1bc1]117/*----------------------------------------------------------------------------*/
[02cacce]118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
[53f1c87]124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
[2ff7360]129 const usb_address_t hub_address =
[8b54fe6]130 usb_device_manager_get_free_address(
[961c29e8]131 &instance->generic.dev_manager, USB_SPEED_FULL);
[8148ee3a]132 if (hub_address <= 0) {
[c4fb5ecd]133 usb_log_error("Failed to get OHCI root hub address: %s\n",
134 str_error(hub_address));
[8148ee3a]135 return hub_address;
136 }
[53f1c87]137 instance->rh.address = hub_address;
[8b54fe6]138 usb_device_manager_bind(
[961c29e8]139 &instance->generic.dev_manager, hub_address, hub_fun->handle);
[53f1c87]140
[5ec492b]141#define CHECK_RET_UNREG_RETURN(ret, message...) \
[2ff7360]142if (ret != EOK) { \
143 usb_log_error(message); \
[48ae3ef]144 usb_endpoint_manager_remove_ep( \
145 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH, \
146 NULL, NULL);\
[8b54fe6]147 usb_device_manager_release( \
[5ec492b]148 &instance->generic.dev_manager, hub_address); \
[2ff7360]149 return ret; \
150} else (void)0
[0f1586d0]151 int ret = usb_endpoint_manager_add_ep(
152 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH,
[48ae3ef]153 USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64, 0, NULL, NULL);
[5ec492b]154 CHECK_RET_UNREG_RETURN(ret,
[0f1586d0]155 "Failed to register root hub control endpoint: %s.\n",
156 str_error(ret));
[6bec59b]157
[ef9460b]158 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
[5ec492b]159 CHECK_RET_UNREG_RETURN(ret,
[1cb4f05]160 "Failed to add root hub match-id: %s.\n", str_error(ret));
[2ff7360]161
[5d07f54]162 ret = ddf_fun_bind(hub_fun);
[5ec492b]163 CHECK_RET_UNREG_RETURN(ret,
[1cb4f05]164 "Failed to bind root hub function: %s.\n", str_error(ret));
[2ff7360]165
166 return EOK;
167#undef CHECK_RET_RELEASE
[53f1c87]168}
169/*----------------------------------------------------------------------------*/
[02cacce]170/** Initialize OHCI hc driver structure
171 *
172 * @param[in] instance Memory place for the structure.
173 * @param[in] regs Address of the memory mapped I/O registers.
174 * @param[in] reg_size Size of the memory mapped area.
175 * @param[in] interrupts True if w interrupts should be used
176 * @return Error code
177 */
[62265ce]178int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
[41b96b4]179{
180 assert(instance);
[1cb4f05]181
[c2be0e5]182#define CHECK_RET_RETURN(ret, message...) \
183if (ret != EOK) { \
184 usb_log_error(message); \
185 return ret; \
186} else (void)0
[ff582d47]187
[1cb4f05]188 int ret =
189 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
[c2be0e5]190 CHECK_RET_RETURN(ret,
[1cb4f05]191 "Failed to gain access to device registers: %s.\n", str_error(ret));
[c2be0e5]192
[bba0dc20]193 list_initialize(&instance->pending_batches);
[e7bc999]194
[7265558]195 hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11,
[933b0d7]196 bandwidth_count_usb11);
[90dd59dc]197 instance->generic.private_data = instance;
[09ace19]198 instance->generic.schedule = hc_schedule;
[620c710]199 instance->generic.ep_add_hook = ohci_endpoint_init;
[48ae3ef]200 instance->generic.ep_remove_hook = ohci_endpoint_fini;
[e2976bb]201
[8790650]202 ret = hc_init_memory(instance);
[4125b7d]203 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
204 str_error(ret));
[bba0dc20]205#undef CHECK_RET_RETURN
206
[aa9ccf7]207 fibril_mutex_initialize(&instance->guard);
[2c617b0]208
[78ab6d4]209 hc_gain_control(instance);
[ff582d47]210
[ff0e354]211 if (!interrupts) {
212 instance->interrupt_emulator =
213 fibril_create((int(*)(void*))interrupt_emulator, instance);
214 fibril_add_ready(instance->interrupt_emulator);
215 }
[7013b14]216
[78ab6d4]217 rh_init(&instance->rh, instance->registers);
[1ef93fa]218 hc_start(instance);
[78ab6d4]219
[8627377]220 return EOK;
[a6d1bc1]221}
222/*----------------------------------------------------------------------------*/
[57e06ef]223void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
[620c710]224{
[57e06ef]225 assert(instance);
226 assert(ep);
227
[620c710]228 endpoint_list_t *list = &instance->lists[ep->transfer_type];
229 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
[57e06ef]230 assert(list);
231 assert(ohci_ep);
232
[620c710]233 /* Enqueue ep */
234 switch (ep->transfer_type) {
235 case USB_TRANSFER_CONTROL:
236 instance->registers->control &= ~C_CLE;
237 endpoint_list_add_ep(list, ohci_ep);
238 instance->registers->control_current = 0;
239 instance->registers->control |= C_CLE;
240 break;
241 case USB_TRANSFER_BULK:
242 instance->registers->control &= ~C_BLE;
[f974519]243 endpoint_list_add_ep(list, ohci_ep);
[620c710]244 instance->registers->control |= C_BLE;
245 break;
246 case USB_TRANSFER_ISOCHRONOUS:
247 case USB_TRANSFER_INTERRUPT:
248 instance->registers->control &= (~C_PLE & ~C_IE);
[f974519]249 endpoint_list_add_ep(list, ohci_ep);
[620c710]250 instance->registers->control |= C_PLE | C_IE;
251 break;
252 }
253}
254/*----------------------------------------------------------------------------*/
[57e06ef]255void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
[620c710]256{
[57e06ef]257 assert(instance);
258 assert(ep);
259
[620c710]260 /* Dequeue ep */
261 endpoint_list_t *list = &instance->lists[ep->transfer_type];
262 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
[57e06ef]263
264 assert(list);
265 assert(ohci_ep);
[620c710]266 switch (ep->transfer_type) {
267 case USB_TRANSFER_CONTROL:
268 instance->registers->control &= ~C_CLE;
269 endpoint_list_remove_ep(list, ohci_ep);
270 instance->registers->control_current = 0;
271 instance->registers->control |= C_CLE;
272 break;
273 case USB_TRANSFER_BULK:
274 instance->registers->control &= ~C_BLE;
275 endpoint_list_remove_ep(list, ohci_ep);
276 instance->registers->control |= C_BLE;
277 break;
278 case USB_TRANSFER_ISOCHRONOUS:
279 case USB_TRANSFER_INTERRUPT:
280 instance->registers->control &= (~C_PLE & ~C_IE);
281 endpoint_list_remove_ep(list, ohci_ep);
282 instance->registers->control |= C_PLE | C_IE;
283 break;
284 default:
285 break;
286 }
287}
288/*----------------------------------------------------------------------------*/
[02cacce]289/** Add USB transfer to the schedule.
290 *
291 * @param[in] instance OHCI hc driver structure.
292 * @param[in] batch Batch representing the transfer.
293 * @return Error code.
294 */
[09ace19]295int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
[41b96b4]296{
[09ace19]297 assert(hcd);
298 hc_t *instance = hcd->private_data;
[41b96b4]299 assert(instance);
[9ff5ff82]300
[02cacce]301 /* Check for root hub communication */
[d017cea]302 if (batch->ep->address == instance->rh.address) {
[7d5708d]303 rh_request(&instance->rh, batch);
304 return EOK;
[41b96b4]305 }
[9c10e51]306 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
307 if (!ohci_batch)
308 return ENOMEM;
[7013b14]309
[aa9ccf7]310 fibril_mutex_lock(&instance->guard);
[9c10e51]311 list_append(&ohci_batch->link, &instance->pending_batches);
312 ohci_transfer_batch_commit(ohci_batch);
[02cacce]313
314 /* Control and bulk schedules need a kick to start working */
315 switch (batch->ep->transfer_type)
316 {
[9ff5ff82]317 case USB_TRANSFER_CONTROL:
318 instance->registers->command_status |= CS_CLF;
319 break;
320 case USB_TRANSFER_BULK:
321 instance->registers->command_status |= CS_BLF;
322 break;
323 default:
324 break;
325 }
[aa9ccf7]326 fibril_mutex_unlock(&instance->guard);
[4c28d17]327 return EOK;
[41b96b4]328}
329/*----------------------------------------------------------------------------*/
[02cacce]330/** Interrupt handling routine
331 *
332 * @param[in] instance OHCI hc driver structure.
333 * @param[in] status Value of the status register at the time of interrupt.
334 */
[7d6a676]335void hc_interrupt(hc_t *instance, uint32_t status)
[41b96b4]336{
337 assert(instance);
[561112f]338 if ((status & ~I_SF) == 0) /* ignore sof status */
[eaf1e3d]339 return;
[2df648c2]340 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
[561112f]341 if (status & I_RHSC)
[7d6a676]342 rh_interrupt(&instance->rh);
343
[561112f]344 if (status & I_WDH) {
[aa9ccf7]345 fibril_mutex_lock(&instance->guard);
[4125b7d]346 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
347 instance->registers->hcca,
348 (void *) addr_to_phys(instance->hcca));
349 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
[aa9ccf7]350 instance->registers->periodic_current);
[eaf1e3d]351
[9c10e51]352 link_t *current = list_first(&instance->pending_batches);
353 while (current && current != &instance->pending_batches.head) {
[7013b14]354 link_t *next = current->next;
[9c10e51]355 ohci_transfer_batch_t *batch =
356 ohci_transfer_batch_from_link(current);
[7013b14]357
[9c10e51]358 if (ohci_transfer_batch_is_complete(batch)) {
[d6522dd]359 list_remove(current);
[9c10e51]360 ohci_transfer_batch_finish_dispose(batch);
[7013b14]361 }
[b72efe8]362
[7013b14]363 current = next;
[eaf1e3d]364 }
[aa9ccf7]365 fibril_mutex_unlock(&instance->guard);
[4c28d17]366 }
[68b9f148]367
368 if (status & I_UE) {
[f974519]369 usb_log_fatal("Error like no other!\n");
[1ef93fa]370 hc_start(instance);
[68b9f148]371 }
372
[41b96b4]373}
[7d6a676]374/*----------------------------------------------------------------------------*/
[02cacce]375/** Check status register regularly
376 *
377 * @param[in] instance OHCI hc driver structure.
378 * @return Error code
379 */
[53f1c87]380int interrupt_emulator(hc_t *instance)
[7d6a676]381{
382 assert(instance);
383 usb_log_info("Started interrupt emulator.\n");
384 while (1) {
[2c617b0]385 const uint32_t status = instance->registers->interrupt_status;
[7d6a676]386 instance->registers->interrupt_status = status;
387 hc_interrupt(instance, status);
[02cacce]388 async_usleep(10000);
[7d6a676]389 }
390 return EOK;
391}
[2c617b0]392/*----------------------------------------------------------------------------*/
[02cacce]393/** Turn off any (BIOS)driver that might be in control of the device.
[78ab6d4]394 *
395 * This function implements routines described in chapter 5.1.1.3 of the OHCI
396 * specification (page 40, pdf page 54).
[02cacce]397 *
398 * @param[in] instance OHCI hc driver structure.
399 */
[2c617b0]400void hc_gain_control(hc_t *instance)
401{
402 assert(instance);
[78ab6d4]403
[c8eddf4]404 usb_log_debug("Requesting OHCI control.\n");
[78ab6d4]405 if (instance->registers->revision & R_LEGACY_FLAG) {
406 /* Turn off legacy emulation, it should be enough to zero
407 * the lowest bit, but it caused problems. Thus clear all
408 * except GateA20 (causes restart on some hw).
409 * See page 145 of the specs for details.
410 */
411 volatile uint32_t *ohci_emulation_reg =
412 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
413 usb_log_debug("OHCI legacy register %p: %x.\n",
414 ohci_emulation_reg, *ohci_emulation_reg);
415 /* Zero everything but A20State */
416 *ohci_emulation_reg &= 0x100;
417 usb_log_debug(
418 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
419 ohci_emulation_reg, *ohci_emulation_reg);
420 }
[112d159]421
[2c617b0]422 /* Interrupt routing enabled => smm driver is active */
423 if (instance->registers->control & C_IR) {
[112d159]424 usb_log_debug("SMM driver: request ownership change.\n");
[2c617b0]425 instance->registers->command_status |= CS_OCR;
[78ab6d4]426 /* Hope that SMM actually knows its stuff or we can hang here */
[2c617b0]427 while (instance->registers->control & C_IR) {
428 async_usleep(1000);
429 }
[112d159]430 usb_log_info("SMM driver: Ownership taken.\n");
[78ab6d4]431 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
[5d07f54]432 async_usleep(50000);
[2c617b0]433 return;
434 }
435
[78ab6d4]436 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
[2c617b0]437 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
438 if (hc_status != C_HCFS_RESET) {
[112d159]439 usb_log_debug("BIOS driver found.\n");
[2c617b0]440 if (hc_status == C_HCFS_OPERATIONAL) {
[112d159]441 usb_log_info("BIOS driver: HC operational.\n");
[2c617b0]442 return;
443 }
[78ab6d4]444 /* HC is suspended assert resume for 20ms, */
445 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
[2c617b0]446 async_usleep(20000);
[112d159]447 usb_log_info("BIOS driver: HC resumed.\n");
[2c617b0]448 return;
449 }
450
451 /* HC is in reset (hw startup) => no other driver
452 * maintain reset for at least the time specified in USB spec (50 ms)*/
[c4fb5ecd]453 usb_log_debug("Host controller found in reset state.\n");
[2c617b0]454 async_usleep(50000);
455}
456/*----------------------------------------------------------------------------*/
[02cacce]457/** OHCI hw initialization routine.
458 *
459 * @param[in] instance OHCI hc driver structure.
460 */
[1ef93fa]461void hc_start(hc_t *instance)
[2c617b0]462{
[112d159]463 /* OHCI guide page 42 */
[2c617b0]464 assert(instance);
[112d159]465 usb_log_debug2("Started hc initialization routine.\n");
466
467 /* Save contents of fm_interval register */
[2c617b0]468 const uint32_t fm_interval = instance->registers->fm_interval;
[112d159]469 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
[344925c]470
[112d159]471 /* Reset hc */
472 usb_log_debug2("HC reset.\n");
473 size_t time = 0;
[2c617b0]474 instance->registers->command_status = CS_HCR;
[112d159]475 while (instance->registers->command_status & CS_HCR) {
476 async_usleep(10);
477 time += 10;
478 }
479 usb_log_debug2("HC reset complete in %zu us.\n", time);
[344925c]480
[112d159]481 /* Restore fm_interval */
[2c617b0]482 instance->registers->fm_interval = fm_interval;
483 assert((instance->registers->command_status & CS_HCR) == 0);
[344925c]484
[2c617b0]485 /* hc is now in suspend state */
[112d159]486 usb_log_debug2("HC should be in suspend state(%x).\n",
487 instance->registers->control);
[344925c]488
[78d4e1f]489 /* Use HCCA */
490 instance->registers->hcca = addr_to_phys(instance->hcca);
491
492 /* Use queues */
[5a2c42b]493 instance->registers->bulk_head =
494 instance->lists[USB_TRANSFER_BULK].list_head_pa;
[4125b7d]495 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]496 instance->lists[USB_TRANSFER_BULK].list_head,
497 instance->lists[USB_TRANSFER_BULK].list_head_pa);
[78d4e1f]498
499 instance->registers->control_head =
[5a2c42b]500 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
[4125b7d]501 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]502 instance->lists[USB_TRANSFER_CONTROL].list_head,
503 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
[78d4e1f]504
[112d159]505 /* Enable queues */
[344925c]506 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
[112d159]507 usb_log_debug2("All queues enabled(%x).\n",
508 instance->registers->control);
509
[561112f]510 /* Enable interrupts */
511 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
[112d159]512 usb_log_debug2("Enabled interrupts: %x.\n",
513 instance->registers->interrupt_enable);
[561112f]514 instance->registers->interrupt_enable = I_MI;
[112d159]515
516 /* Set periodic start to 90% */
517 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
518 instance->registers->periodic_start = (frame_length / 10) * 9;
519 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
520 instance->registers->periodic_start,
521 instance->registers->periodic_start, frame_length);
[2c617b0]522
[78ab6d4]523 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
[c4fb5ecd]524 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
[112d159]525 instance->registers->control);
[2c617b0]526}
[6b6e3ed3]527/*----------------------------------------------------------------------------*/
[02cacce]528/** Initialize schedule queues
529 *
530 * @param[in] instance OHCI hc driver structure
531 * @return Error code
532 */
[6b6e3ed3]533int hc_init_transfer_lists(hc_t *instance)
534{
535 assert(instance);
[5a2c42b]536#define SETUP_ENDPOINT_LIST(type) \
[344925c]537do { \
[5a2c42b]538 const char *name = usb_str_transfer_type(type); \
539 int ret = endpoint_list_init(&instance->lists[type], name); \
[6b6e3ed3]540 if (ret != EOK) { \
[1cb4f05]541 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
542 name, str_error(ret)); \
[68b9f148]543 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
[5a2c42b]544 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
545 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
546 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
[70c85320]547 return ret; \
[344925c]548 } \
549} while (0)
[6b6e3ed3]550
[5a2c42b]551 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
552 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
553 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
554 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
555#undef SETUP_ENDPOINT_LIST
556 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
557 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
[6b6e3ed3]558
559 return EOK;
560}
[344925c]561/*----------------------------------------------------------------------------*/
[02cacce]562/** Initialize memory structures used by the OHCI hcd.
563 *
564 * @param[in] instance OHCI hc driver structure.
565 * @return Error code.
566 */
[344925c]567int hc_init_memory(hc_t *instance)
568{
569 assert(instance);
[5d07f54]570
571 bzero(&instance->rh, sizeof(instance->rh));
[8790650]572 /* Init queues */
[8953514]573 const int ret = hc_init_transfer_lists(instance);
574 if (ret != EOK) {
575 return ret;
576 }
[344925c]577
[8790650]578 /*Init HCCA */
[f8dfb40]579 instance->hcca = hcca_get();
[344925c]580 if (instance->hcca == NULL)
581 return ENOMEM;
582 bzero(instance->hcca, sizeof(hcca_t));
[78d4e1f]583 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
[344925c]584
[9b8958b]585 for (unsigned i = 0; i < 32; ++i) {
[344925c]586 instance->hcca->int_ep[i] =
[5a2c42b]587 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
[344925c]588 }
[4125b7d]589 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
[5a2c42b]590 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
591 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
[344925c]592
593 return EOK;
594}
[1ecc5de]595
[41b96b4]596/**
597 * @}
598 */
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