[41b96b4] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 | /** @addtogroup drvusbohcihc
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| 29 | * @{
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| 30 | */
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| 31 | /** @file
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| 32 | * @brief OHCI Host controller driver routines
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| 33 | */
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| 34 | #include <errno.h>
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| 35 | #include <str_error.h>
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| 36 | #include <adt/list.h>
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| 37 | #include <libarch/ddi.h>
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| 38 |
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| 39 | #include <usb/debug.h>
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| 40 | #include <usb/usb.h>
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| 41 | #include <usb/ddfiface.h>
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| 42 |
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[bab71635] | 43 | #include "hc.h"
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[e20eaed] | 44 | #include "ohci_endpoint.h"
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[41b96b4] | 45 |
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[561112f] | 46 | #define OHCI_USED_INTERRUPTS \
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| 47 | (I_SO | I_WDH | I_UE | I_RHSC)
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[1ecc5de] | 48 |
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| 49 | static const irq_cmd_t ohci_irq_commands[] =
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| 50 | {
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| 51 | { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
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| 52 | { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
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| 53 | { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
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| 54 | { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
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| 55 | { .cmd = CMD_ACCEPT },
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| 56 | };
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| 57 |
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[2c617b0] | 58 | static void hc_gain_control(hc_t *instance);
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[1cb4f05] | 59 | static void hc_start(hc_t *instance);
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[6b6e3ed3] | 60 | static int hc_init_transfer_lists(hc_t *instance);
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[344925c] | 61 | static int hc_init_memory(hc_t *instance);
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[1cb4f05] | 62 | static int interrupt_emulator(hc_t *instance);
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[09ace19] | 63 | static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
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[1cb4f05] | 64 | /*----------------------------------------------------------------------------*/
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| 65 | /** Get number of commands used in IRQ code.
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| 66 | * @return Number of commands.
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| 67 | */
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| 68 | size_t hc_irq_cmd_count(void)
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| 69 | {
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| 70 | return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
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| 71 | }
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| 72 | /*----------------------------------------------------------------------------*/
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| 73 | /** Generate IRQ code commands.
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| 74 | * @param[out] cmds Place to store the commands.
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| 75 | * @param[in] cmd_size Size of the place (bytes).
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| 76 | * @param[in] regs Physical address of device's registers.
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| 77 | * @param[in] reg_size Size of the register area (bytes).
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| 78 | *
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| 79 | * @return Error code.
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| 80 | */
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| 81 | int hc_get_irq_commands(
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| 82 | irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
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| 83 | {
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| 84 | if (cmd_size < sizeof(ohci_irq_commands)
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| 85 | || reg_size < sizeof(ohci_regs_t))
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| 86 | return EOVERFLOW;
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| 87 |
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| 88 | /* Create register mapping to use in IRQ handler.
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| 89 | * This mapping should be present in kernel only.
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| 90 | * Remove it from here when kernel knows how to create mappings
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| 91 | * and accepts physical addresses in IRQ code.
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| 92 | * TODO: remove */
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| 93 | ohci_regs_t *registers;
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| 94 | const int ret = pio_enable((void*)regs, reg_size, (void**)®isters);
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[5d36062] | 95 | if (ret != EOK)
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| 96 | return ret;
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[1cb4f05] | 97 |
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| 98 | /* Some bogus access to force create mapping. DO NOT remove,
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| 99 | * unless whole virtual addresses in irq is replaced
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| 100 | * NOTE: Compiler won't remove this as ohci_regs_t members
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[eb212e70] | 101 | * are declared volatile.
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| 102 | *
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| 103 | * Introducing CMD_MEM set of IRQ code commands broke
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| 104 | * assumption that IRQ code does not cause page faults.
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| 105 | * If this happens during idling (THREAD == NULL)
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| 106 | * it causes kernel panic.
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| 107 | */
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[1cb4f05] | 108 | registers->revision;
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| 109 |
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| 110 | memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
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| 111 |
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| 112 | void *address = (void*)®isters->interrupt_status;
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| 113 | cmds[0].addr = address;
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| 114 | cmds[3].addr = address;
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| 115 | return EOK;
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| 116 | }
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[a6d1bc1] | 117 | /*----------------------------------------------------------------------------*/
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[02cacce] | 118 | /** Announce OHCI root hub to the DDF
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| 119 | *
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| 120 | * @param[in] instance OHCI driver intance
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| 121 | * @param[in] hub_fun DDF fuction representing OHCI root hub
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| 122 | * @return Error code
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| 123 | */
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[53f1c87] | 124 | int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
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| 125 | {
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| 126 | assert(instance);
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| 127 | assert(hub_fun);
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| 128 |
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[2ff7360] | 129 | const usb_address_t hub_address =
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[961c29e8] | 130 | device_keeper_get_free_address(
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| 131 | &instance->generic.dev_manager, USB_SPEED_FULL);
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[8148ee3a] | 132 | if (hub_address <= 0) {
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[c4fb5ecd] | 133 | usb_log_error("Failed to get OHCI root hub address: %s\n",
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| 134 | str_error(hub_address));
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[8148ee3a] | 135 | return hub_address;
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| 136 | }
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[53f1c87] | 137 | instance->rh.address = hub_address;
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| 138 | usb_device_keeper_bind(
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[961c29e8] | 139 | &instance->generic.dev_manager, hub_address, hub_fun->handle);
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[53f1c87] | 140 |
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[2ff7360] | 141 | #define CHECK_RET_RELEASE(ret, message...) \
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| 142 | if (ret != EOK) { \
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| 143 | usb_log_error(message); \
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| 144 | return ret; \
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| 145 | } else (void)0
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[cc34f5f0] | 146 | endpoint_t *ep =
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| 147 | endpoint_get(hub_address, 0, USB_DIRECTION_BOTH,
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| 148 | USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64);
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| 149 | if (ep == NULL)
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| 150 | return ENOMEM;
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| 151 |
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| 152 | int ret = ohci_endpoint_init(&instance->generic, ep);
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| 153 | if (ret != EOK) {
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| 154 | endpoint_destroy(ep);
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| 155 | return ret;
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| 156 | }
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| 157 |
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| 158 | ret = usb_endpoint_manager_register_ep(&instance->generic.ep_manager, ep, 0);
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| 159 | if (ret != EOK) {
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| 160 | endpoint_destroy(ep);
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| 161 | return ret;
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| 162 | }
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| 163 | hc_enqueue_endpoint(instance, ep);
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[2ff7360] | 164 |
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[cc34f5f0] | 165 |
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| 166 | // int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
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| 167 | // USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
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| 168 | // CHECK_RET_RELEASE(ret,
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| 169 | // "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
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[6bec59b] | 170 |
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[ef9460b] | 171 | ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
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[1cb4f05] | 172 | CHECK_RET_RELEASE(ret,
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| 173 | "Failed to add root hub match-id: %s.\n", str_error(ret));
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[2ff7360] | 174 |
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[5d07f54] | 175 | ret = ddf_fun_bind(hub_fun);
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[1cb4f05] | 176 | CHECK_RET_RELEASE(ret,
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| 177 | "Failed to bind root hub function: %s.\n", str_error(ret));
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[2ff7360] | 178 |
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| 179 | return EOK;
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| 180 | #undef CHECK_RET_RELEASE
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[53f1c87] | 181 | }
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| 182 | /*----------------------------------------------------------------------------*/
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[02cacce] | 183 | /** Initialize OHCI hc driver structure
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| 184 | *
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| 185 | * @param[in] instance Memory place for the structure.
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| 186 | * @param[in] regs Address of the memory mapped I/O registers.
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| 187 | * @param[in] reg_size Size of the memory mapped area.
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| 188 | * @param[in] interrupts True if w interrupts should be used
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| 189 | * @return Error code
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| 190 | */
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[62265ce] | 191 | int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
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[41b96b4] | 192 | {
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| 193 | assert(instance);
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[1cb4f05] | 194 |
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[c2be0e5] | 195 | #define CHECK_RET_RETURN(ret, message...) \
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| 196 | if (ret != EOK) { \
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| 197 | usb_log_error(message); \
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| 198 | return ret; \
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| 199 | } else (void)0
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[ff582d47] | 200 |
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[1cb4f05] | 201 | int ret =
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| 202 | pio_enable((void*)regs, reg_size, (void**)&instance->registers);
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[c2be0e5] | 203 | CHECK_RET_RETURN(ret,
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[1cb4f05] | 204 | "Failed to gain access to device registers: %s.\n", str_error(ret));
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[c2be0e5] | 205 |
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[bba0dc20] | 206 | list_initialize(&instance->pending_batches);
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[e7bc999] | 207 |
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[e2976bb] | 208 | ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
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[cc34f5f0] | 209 | CHECK_RET_RETURN(ret, "Failed to initialize generic driver: %s.\n",
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[961c29e8] | 210 | str_error(ret));
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[90dd59dc] | 211 | instance->generic.private_data = instance;
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[09ace19] | 212 | instance->generic.schedule = hc_schedule;
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[620c710] | 213 | instance->generic.ep_add_hook = ohci_endpoint_init;
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[e2976bb] | 214 |
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[8790650] | 215 | ret = hc_init_memory(instance);
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[4125b7d] | 216 | CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
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| 217 | str_error(ret));
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[bba0dc20] | 218 | #undef CHECK_RET_RETURN
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| 219 |
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[aa9ccf7] | 220 | fibril_mutex_initialize(&instance->guard);
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[2c617b0] | 221 |
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[78ab6d4] | 222 | hc_gain_control(instance);
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[ff582d47] | 223 |
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[ff0e354] | 224 | if (!interrupts) {
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| 225 | instance->interrupt_emulator =
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| 226 | fibril_create((int(*)(void*))interrupt_emulator, instance);
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| 227 | fibril_add_ready(instance->interrupt_emulator);
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| 228 | }
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[7013b14] | 229 |
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[78ab6d4] | 230 | rh_init(&instance->rh, instance->registers);
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[1ef93fa] | 231 | hc_start(instance);
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[78ab6d4] | 232 |
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[8627377] | 233 | return EOK;
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[a6d1bc1] | 234 | }
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| 235 | /*----------------------------------------------------------------------------*/
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[620c710] | 236 | void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
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| 237 | {
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| 238 | endpoint_list_t *list = &instance->lists[ep->transfer_type];
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| 239 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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| 240 | /* Enqueue ep */
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| 241 | switch (ep->transfer_type) {
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| 242 | case USB_TRANSFER_CONTROL:
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| 243 | instance->registers->control &= ~C_CLE;
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| 244 | endpoint_list_add_ep(list, ohci_ep);
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| 245 | instance->registers->control_current = 0;
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| 246 | instance->registers->control |= C_CLE;
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| 247 | break;
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| 248 | case USB_TRANSFER_BULK:
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| 249 | instance->registers->control &= ~C_BLE;
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| 250 | endpoint_list_add_ep(
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| 251 | &instance->lists[ep->transfer_type], ohci_endpoint_get(ep));
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| 252 | instance->registers->control |= C_BLE;
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| 253 | break;
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| 254 | case USB_TRANSFER_ISOCHRONOUS:
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| 255 | case USB_TRANSFER_INTERRUPT:
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| 256 | instance->registers->control &= (~C_PLE & ~C_IE);
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| 257 | endpoint_list_add_ep(
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| 258 | &instance->lists[ep->transfer_type], ohci_endpoint_get(ep));
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| 259 | instance->registers->control |= C_PLE | C_IE;
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| 260 | break;
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| 261 | }
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| 262 | }
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| 263 | /*----------------------------------------------------------------------------*/
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| 264 | void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
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| 265 | {
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| 266 | /* Dequeue ep */
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| 267 | endpoint_list_t *list = &instance->lists[ep->transfer_type];
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| 268 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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| 269 | switch (ep->transfer_type) {
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| 270 | case USB_TRANSFER_CONTROL:
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| 271 | instance->registers->control &= ~C_CLE;
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| 272 | endpoint_list_remove_ep(list, ohci_ep);
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| 273 | instance->registers->control_current = 0;
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| 274 | instance->registers->control |= C_CLE;
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| 275 | break;
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| 276 | case USB_TRANSFER_BULK:
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| 277 | instance->registers->control &= ~C_BLE;
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| 278 | endpoint_list_remove_ep(list, ohci_ep);
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| 279 | instance->registers->control |= C_BLE;
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| 280 | break;
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| 281 | case USB_TRANSFER_ISOCHRONOUS:
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| 282 | case USB_TRANSFER_INTERRUPT:
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| 283 | instance->registers->control &= (~C_PLE & ~C_IE);
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| 284 | endpoint_list_remove_ep(list, ohci_ep);
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| 285 | instance->registers->control |= C_PLE | C_IE;
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| 286 | break;
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| 287 | default:
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| 288 | break;
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| 289 | }
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| 290 | }
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| 291 | /*----------------------------------------------------------------------------*/
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[02cacce] | 292 | /** Add USB transfer to the schedule.
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| 293 | *
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| 294 | * @param[in] instance OHCI hc driver structure.
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| 295 | * @param[in] batch Batch representing the transfer.
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| 296 | * @return Error code.
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| 297 | */
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[09ace19] | 298 | int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
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[41b96b4] | 299 | {
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[09ace19] | 300 | assert(hcd);
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| 301 | batch_init_ohci(batch);
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| 302 | hc_t *instance = hcd->private_data;
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[41b96b4] | 303 | assert(instance);
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[9ff5ff82] | 304 |
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[02cacce] | 305 | /* Check for root hub communication */
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[d017cea] | 306 | if (batch->ep->address == instance->rh.address) {
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[7d5708d] | 307 | rh_request(&instance->rh, batch);
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| 308 | return EOK;
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[41b96b4] | 309 | }
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[7013b14] | 310 |
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[aa9ccf7] | 311 | fibril_mutex_lock(&instance->guard);
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[7013b14] | 312 | list_append(&batch->link, &instance->pending_batches);
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| 313 | batch_commit(batch);
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[02cacce] | 314 |
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| 315 | /* Control and bulk schedules need a kick to start working */
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| 316 | switch (batch->ep->transfer_type)
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| 317 | {
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[9ff5ff82] | 318 | case USB_TRANSFER_CONTROL:
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| 319 | instance->registers->command_status |= CS_CLF;
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| 320 | break;
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| 321 | case USB_TRANSFER_BULK:
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| 322 | instance->registers->command_status |= CS_BLF;
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| 323 | break;
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| 324 | default:
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| 325 | break;
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| 326 | }
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[aa9ccf7] | 327 | fibril_mutex_unlock(&instance->guard);
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[4c28d17] | 328 | return EOK;
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[41b96b4] | 329 | }
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| 330 | /*----------------------------------------------------------------------------*/
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[02cacce] | 331 | /** Interrupt handling routine
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| 332 | *
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| 333 | * @param[in] instance OHCI hc driver structure.
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| 334 | * @param[in] status Value of the status register at the time of interrupt.
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| 335 | */
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[7d6a676] | 336 | void hc_interrupt(hc_t *instance, uint32_t status)
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[41b96b4] | 337 | {
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| 338 | assert(instance);
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[561112f] | 339 | if ((status & ~I_SF) == 0) /* ignore sof status */
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[eaf1e3d] | 340 | return;
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[2df648c2] | 341 | usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
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[561112f] | 342 | if (status & I_RHSC)
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[7d6a676] | 343 | rh_interrupt(&instance->rh);
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| 344 |
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[561112f] | 345 | if (status & I_WDH) {
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[aa9ccf7] | 346 | fibril_mutex_lock(&instance->guard);
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[4125b7d] | 347 | usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
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| 348 | instance->registers->hcca,
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| 349 | (void *) addr_to_phys(instance->hcca));
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| 350 | usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
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[aa9ccf7] | 351 | instance->registers->periodic_current);
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[eaf1e3d] | 352 |
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[b72efe8] | 353 | link_t *current = instance->pending_batches.head.next;
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| 354 | while (current != &instance->pending_batches.head) {
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[7013b14] | 355 | link_t *next = current->next;
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[eaf1e3d] | 356 | usb_transfer_batch_t *batch =
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[7013b14] | 357 | usb_transfer_batch_from_link(current);
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| 358 |
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| 359 | if (batch_is_complete(batch)) {
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[d6522dd] | 360 | list_remove(current);
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[7013b14] | 361 | usb_transfer_batch_finish(batch);
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| 362 | }
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[b72efe8] | 363 |
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[7013b14] | 364 | current = next;
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[eaf1e3d] | 365 | }
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[aa9ccf7] | 366 | fibril_mutex_unlock(&instance->guard);
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[4c28d17] | 367 | }
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[68b9f148] | 368 |
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| 369 | if (status & I_UE) {
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[1ef93fa] | 370 | hc_start(instance);
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[68b9f148] | 371 | }
|
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| 372 |
|
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[41b96b4] | 373 | }
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[7d6a676] | 374 | /*----------------------------------------------------------------------------*/
|
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[02cacce] | 375 | /** Check status register regularly
|
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| 376 | *
|
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| 377 | * @param[in] instance OHCI hc driver structure.
|
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| 378 | * @return Error code
|
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| 379 | */
|
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[53f1c87] | 380 | int interrupt_emulator(hc_t *instance)
|
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[7d6a676] | 381 | {
|
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| 382 | assert(instance);
|
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| 383 | usb_log_info("Started interrupt emulator.\n");
|
---|
| 384 | while (1) {
|
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[2c617b0] | 385 | const uint32_t status = instance->registers->interrupt_status;
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[7d6a676] | 386 | instance->registers->interrupt_status = status;
|
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| 387 | hc_interrupt(instance, status);
|
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[02cacce] | 388 | async_usleep(10000);
|
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[7d6a676] | 389 | }
|
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| 390 | return EOK;
|
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| 391 | }
|
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[2c617b0] | 392 | /*----------------------------------------------------------------------------*/
|
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[02cacce] | 393 | /** Turn off any (BIOS)driver that might be in control of the device.
|
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[78ab6d4] | 394 | *
|
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| 395 | * This function implements routines described in chapter 5.1.1.3 of the OHCI
|
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| 396 | * specification (page 40, pdf page 54).
|
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[02cacce] | 397 | *
|
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| 398 | * @param[in] instance OHCI hc driver structure.
|
---|
| 399 | */
|
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[2c617b0] | 400 | void hc_gain_control(hc_t *instance)
|
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| 401 | {
|
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| 402 | assert(instance);
|
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[78ab6d4] | 403 |
|
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[c8eddf4] | 404 | usb_log_debug("Requesting OHCI control.\n");
|
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[78ab6d4] | 405 | if (instance->registers->revision & R_LEGACY_FLAG) {
|
---|
| 406 | /* Turn off legacy emulation, it should be enough to zero
|
---|
| 407 | * the lowest bit, but it caused problems. Thus clear all
|
---|
| 408 | * except GateA20 (causes restart on some hw).
|
---|
| 409 | * See page 145 of the specs for details.
|
---|
| 410 | */
|
---|
| 411 | volatile uint32_t *ohci_emulation_reg =
|
---|
| 412 | (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
|
---|
| 413 | usb_log_debug("OHCI legacy register %p: %x.\n",
|
---|
| 414 | ohci_emulation_reg, *ohci_emulation_reg);
|
---|
| 415 | /* Zero everything but A20State */
|
---|
| 416 | *ohci_emulation_reg &= 0x100;
|
---|
| 417 | usb_log_debug(
|
---|
| 418 | "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
|
---|
| 419 | ohci_emulation_reg, *ohci_emulation_reg);
|
---|
| 420 | }
|
---|
[112d159] | 421 |
|
---|
[2c617b0] | 422 | /* Interrupt routing enabled => smm driver is active */
|
---|
| 423 | if (instance->registers->control & C_IR) {
|
---|
[112d159] | 424 | usb_log_debug("SMM driver: request ownership change.\n");
|
---|
[2c617b0] | 425 | instance->registers->command_status |= CS_OCR;
|
---|
[78ab6d4] | 426 | /* Hope that SMM actually knows its stuff or we can hang here */
|
---|
[2c617b0] | 427 | while (instance->registers->control & C_IR) {
|
---|
| 428 | async_usleep(1000);
|
---|
| 429 | }
|
---|
[112d159] | 430 | usb_log_info("SMM driver: Ownership taken.\n");
|
---|
[78ab6d4] | 431 | C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
|
---|
[5d07f54] | 432 | async_usleep(50000);
|
---|
[2c617b0] | 433 | return;
|
---|
| 434 | }
|
---|
| 435 |
|
---|
[78ab6d4] | 436 | const unsigned hc_status = C_HCFS_GET(instance->registers->control);
|
---|
[2c617b0] | 437 | /* Interrupt routing disabled && status != USB_RESET => BIOS active */
|
---|
| 438 | if (hc_status != C_HCFS_RESET) {
|
---|
[112d159] | 439 | usb_log_debug("BIOS driver found.\n");
|
---|
[2c617b0] | 440 | if (hc_status == C_HCFS_OPERATIONAL) {
|
---|
[112d159] | 441 | usb_log_info("BIOS driver: HC operational.\n");
|
---|
[2c617b0] | 442 | return;
|
---|
| 443 | }
|
---|
[78ab6d4] | 444 | /* HC is suspended assert resume for 20ms, */
|
---|
| 445 | C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
|
---|
[2c617b0] | 446 | async_usleep(20000);
|
---|
[112d159] | 447 | usb_log_info("BIOS driver: HC resumed.\n");
|
---|
[2c617b0] | 448 | return;
|
---|
| 449 | }
|
---|
| 450 |
|
---|
| 451 | /* HC is in reset (hw startup) => no other driver
|
---|
| 452 | * maintain reset for at least the time specified in USB spec (50 ms)*/
|
---|
[c4fb5ecd] | 453 | usb_log_debug("Host controller found in reset state.\n");
|
---|
[2c617b0] | 454 | async_usleep(50000);
|
---|
| 455 | }
|
---|
| 456 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 457 | /** OHCI hw initialization routine.
|
---|
| 458 | *
|
---|
| 459 | * @param[in] instance OHCI hc driver structure.
|
---|
| 460 | */
|
---|
[1ef93fa] | 461 | void hc_start(hc_t *instance)
|
---|
[2c617b0] | 462 | {
|
---|
[112d159] | 463 | /* OHCI guide page 42 */
|
---|
[2c617b0] | 464 | assert(instance);
|
---|
[112d159] | 465 | usb_log_debug2("Started hc initialization routine.\n");
|
---|
| 466 |
|
---|
| 467 | /* Save contents of fm_interval register */
|
---|
[2c617b0] | 468 | const uint32_t fm_interval = instance->registers->fm_interval;
|
---|
[112d159] | 469 | usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
|
---|
[344925c] | 470 |
|
---|
[112d159] | 471 | /* Reset hc */
|
---|
| 472 | usb_log_debug2("HC reset.\n");
|
---|
| 473 | size_t time = 0;
|
---|
[2c617b0] | 474 | instance->registers->command_status = CS_HCR;
|
---|
[112d159] | 475 | while (instance->registers->command_status & CS_HCR) {
|
---|
| 476 | async_usleep(10);
|
---|
| 477 | time += 10;
|
---|
| 478 | }
|
---|
| 479 | usb_log_debug2("HC reset complete in %zu us.\n", time);
|
---|
[344925c] | 480 |
|
---|
[112d159] | 481 | /* Restore fm_interval */
|
---|
[2c617b0] | 482 | instance->registers->fm_interval = fm_interval;
|
---|
| 483 | assert((instance->registers->command_status & CS_HCR) == 0);
|
---|
[344925c] | 484 |
|
---|
[2c617b0] | 485 | /* hc is now in suspend state */
|
---|
[112d159] | 486 | usb_log_debug2("HC should be in suspend state(%x).\n",
|
---|
| 487 | instance->registers->control);
|
---|
[344925c] | 488 |
|
---|
[78d4e1f] | 489 | /* Use HCCA */
|
---|
| 490 | instance->registers->hcca = addr_to_phys(instance->hcca);
|
---|
| 491 |
|
---|
| 492 | /* Use queues */
|
---|
[5a2c42b] | 493 | instance->registers->bulk_head =
|
---|
| 494 | instance->lists[USB_TRANSFER_BULK].list_head_pa;
|
---|
[4125b7d] | 495 | usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 496 | instance->lists[USB_TRANSFER_BULK].list_head,
|
---|
| 497 | instance->lists[USB_TRANSFER_BULK].list_head_pa);
|
---|
[78d4e1f] | 498 |
|
---|
| 499 | instance->registers->control_head =
|
---|
[5a2c42b] | 500 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
|
---|
[4125b7d] | 501 | usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 502 | instance->lists[USB_TRANSFER_CONTROL].list_head,
|
---|
| 503 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
|
---|
[78d4e1f] | 504 |
|
---|
[112d159] | 505 | /* Enable queues */
|
---|
[344925c] | 506 | instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
|
---|
[112d159] | 507 | usb_log_debug2("All queues enabled(%x).\n",
|
---|
| 508 | instance->registers->control);
|
---|
| 509 |
|
---|
[561112f] | 510 | /* Enable interrupts */
|
---|
| 511 | instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
|
---|
[112d159] | 512 | usb_log_debug2("Enabled interrupts: %x.\n",
|
---|
| 513 | instance->registers->interrupt_enable);
|
---|
[561112f] | 514 | instance->registers->interrupt_enable = I_MI;
|
---|
[112d159] | 515 |
|
---|
| 516 | /* Set periodic start to 90% */
|
---|
| 517 | uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
|
---|
| 518 | instance->registers->periodic_start = (frame_length / 10) * 9;
|
---|
| 519 | usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
|
---|
| 520 | instance->registers->periodic_start,
|
---|
| 521 | instance->registers->periodic_start, frame_length);
|
---|
[2c617b0] | 522 |
|
---|
[78ab6d4] | 523 | C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
|
---|
[c4fb5ecd] | 524 | usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
|
---|
[112d159] | 525 | instance->registers->control);
|
---|
[2c617b0] | 526 | }
|
---|
[6b6e3ed3] | 527 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 528 | /** Initialize schedule queues
|
---|
| 529 | *
|
---|
| 530 | * @param[in] instance OHCI hc driver structure
|
---|
| 531 | * @return Error code
|
---|
| 532 | */
|
---|
[6b6e3ed3] | 533 | int hc_init_transfer_lists(hc_t *instance)
|
---|
| 534 | {
|
---|
| 535 | assert(instance);
|
---|
[5a2c42b] | 536 | #define SETUP_ENDPOINT_LIST(type) \
|
---|
[344925c] | 537 | do { \
|
---|
[5a2c42b] | 538 | const char *name = usb_str_transfer_type(type); \
|
---|
| 539 | int ret = endpoint_list_init(&instance->lists[type], name); \
|
---|
[6b6e3ed3] | 540 | if (ret != EOK) { \
|
---|
[1cb4f05] | 541 | usb_log_error("Failed to setup %s endpoint list: %s.\n", \
|
---|
| 542 | name, str_error(ret)); \
|
---|
[68b9f148] | 543 | endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
|
---|
[5a2c42b] | 544 | endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
|
---|
| 545 | endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
|
---|
| 546 | endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
|
---|
[70c85320] | 547 | return ret; \
|
---|
[344925c] | 548 | } \
|
---|
| 549 | } while (0)
|
---|
[6b6e3ed3] | 550 |
|
---|
[5a2c42b] | 551 | SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
|
---|
| 552 | SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
|
---|
| 553 | SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
|
---|
| 554 | SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
|
---|
| 555 | #undef SETUP_ENDPOINT_LIST
|
---|
| 556 | endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
|
---|
| 557 | &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
|
---|
[6b6e3ed3] | 558 |
|
---|
| 559 | return EOK;
|
---|
| 560 | }
|
---|
[344925c] | 561 | /*----------------------------------------------------------------------------*/
|
---|
[02cacce] | 562 | /** Initialize memory structures used by the OHCI hcd.
|
---|
| 563 | *
|
---|
| 564 | * @param[in] instance OHCI hc driver structure.
|
---|
| 565 | * @return Error code.
|
---|
| 566 | */
|
---|
[344925c] | 567 | int hc_init_memory(hc_t *instance)
|
---|
| 568 | {
|
---|
| 569 | assert(instance);
|
---|
[5d07f54] | 570 |
|
---|
| 571 | bzero(&instance->rh, sizeof(instance->rh));
|
---|
[8790650] | 572 | /* Init queues */
|
---|
[8953514] | 573 | const int ret = hc_init_transfer_lists(instance);
|
---|
| 574 | if (ret != EOK) {
|
---|
| 575 | return ret;
|
---|
| 576 | }
|
---|
[344925c] | 577 |
|
---|
[8790650] | 578 | /*Init HCCA */
|
---|
[344925c] | 579 | instance->hcca = malloc32(sizeof(hcca_t));
|
---|
| 580 | if (instance->hcca == NULL)
|
---|
| 581 | return ENOMEM;
|
---|
| 582 | bzero(instance->hcca, sizeof(hcca_t));
|
---|
[78d4e1f] | 583 | usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
|
---|
[344925c] | 584 |
|
---|
| 585 | unsigned i = 0;
|
---|
| 586 | for (; i < 32; ++i) {
|
---|
| 587 | instance->hcca->int_ep[i] =
|
---|
[5a2c42b] | 588 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
|
---|
[344925c] | 589 | }
|
---|
[4125b7d] | 590 | usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
|
---|
[5a2c42b] | 591 | instance->lists[USB_TRANSFER_INTERRUPT].list_head,
|
---|
| 592 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
|
---|
[344925c] | 593 |
|
---|
| 594 | return EOK;
|
---|
| 595 | }
|
---|
[1ecc5de] | 596 |
|
---|
[41b96b4] | 597 | /**
|
---|
| 598 | * @}
|
---|
| 599 | */
|
---|