1 | /*
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2 | * Copyright (c) 2013 Jan Vesely
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 | /** @addtogroup drvusbehci
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29 | * @{
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30 | */
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31 | /** @file
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32 | * @brief EHCI driver
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33 | */
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34 | #ifndef DRV_EHCI_HW_STRUCT_QH_H
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35 | #define DRV_EHCI_HW_STRUCT_QH_H
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36 |
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37 | #include <assert.h>
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38 | #include <stdint.h>
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39 | #include <usb/host/endpoint.h>
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40 | #include <usb/host/utils/malloc32.h>
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41 |
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42 | #include "link_pointer.h"
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43 | #include "transfer_descriptor.h"
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44 | #include "mem_access.h"
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45 |
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46 | /** This structure is defined in EHCI design guide p. 46 */
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47 | typedef struct queue_head {
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48 | link_pointer_t horizontal;
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49 |
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50 | volatile uint32_t ep_char;
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51 | volatile uint32_t ep_cap;
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52 |
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53 | link_pointer_t current;
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54 | /* Transfer overlay starts here */
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55 | link_pointer_t next;
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56 | link_pointer_t alternate;
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57 | volatile uint32_t status;
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58 | volatile uint32_t buffer_pointer[5];
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59 |
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60 | /* 64 bit struct only */
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61 | volatile uint32_t extended_bp[5];
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62 | } __attribute__((packed, aligned(32))) qh_t;
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63 |
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64 | /*
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65 | * qh_t.ep_char
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66 | */
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67 | #define QH_EP_CHAR_RL_MASK 0xf
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68 | #define QH_EP_CHAR_RL_SHIFT 28
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69 | #define QH_EP_CHAR_C_FLAG (1 << 27)
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70 | #define QH_EP_CHAR_MAX_LENGTH_MASK 0x7ff
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71 | #define QH_EP_CHAR_MAX_LENGTH_SHIFT 16
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72 | #define QH_EP_CHAR_MAX_LENGTH_SET(len) \
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73 | (((len) & QH_EP_CHAR_MAX_LENGTH_MASK) << QH_EP_CHAR_MAX_LENGTH_SHIFT)
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74 | #define QH_EP_CHAR_MAX_LENGTH_GET(val) \
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75 | (((val) >> QH_EP_CHAR_MAX_LENGTH_SHIFT) & QH_EP_CHAR_MAX_LENGTH_MASK)
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76 | #define QH_EP_CHAR_H_FLAG (1 << 15)
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77 | #define QH_EP_CHAR_DTC_FLAG (1 << 14)
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78 | #define QH_EP_CHAR_EPS_FS (0x0 << 12)
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79 | #define QH_EP_CHAR_EPS_LS (0x1 << 12)
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80 | #define QH_EP_CHAR_EPS_HS (0x2 << 12)
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81 | #define QH_EP_CHAR_EPS_MASK (0x3 << 12)
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82 | #define QH_EP_CHAR_EP_MASK 0xf
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83 | #define QH_EP_CHAR_EP_SHIFT 8
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84 | #define QH_EP_CHAR_EP_SET(num) \
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85 | (((num) & QH_EP_CHAR_EP_MASK) << QH_EP_CHAR_EP_SHIFT)
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86 | #define QH_EP_CHAR_ADDR_GET(val) \
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87 | (((val) >> QH_EP_CHAR_ADDR_SHIFT) & QH_EP_CHAR_ADDR_MASK)
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88 | #define QH_EP_CHAR_INACT_FLAG (1 << 7)
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89 | #define QH_EP_CHAR_ADDR_MASK 0x3f
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90 | #define QH_EP_CHAR_ADDR_SHIFT 0
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91 | #define QH_EP_CHAR_ADDR_SET(addr) \
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92 | (((addr) & QH_EP_CHAR_ADDR_MASK) << QH_EP_CHAR_ADDR_SHIFT)
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93 | #define QH_EP_CHAR_ADDR_GET(val) \
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94 | (((val) >> QH_EP_CHAR_ADDR_SHIFT) & QH_EP_CHAR_ADDR_MASK)
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95 |
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96 | /*
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97 | * qh_t.ep_cap
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98 | */
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99 | #define QH_EP_CAP_MULTI_MASK 0x3
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100 | #define QH_EP_CAP_MULTI_SHIFT 30
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101 | #define QH_EP_CAP_MULTI_SET(count) \
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102 | (((count) & QH_EP_CAP_MULTI_MASK) << QH_EP_CAP_MULTI_SHIFT)
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103 | #define QH_EP_CAP_PORT_MASK 0x7f
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104 | #define QH_EP_CAP_PORT_SHIFT 23
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105 | #define QH_EP_CAP_TT_PORT_SET(addr) \
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106 | (((addr) & QH_EP_CAP_HUB_MASK) << QH_EP_CAP_HUB_SHIFT)
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107 | #define QH_EP_CAP_HUB_MASK 0x7f
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108 | #define QH_EP_CAP_HUB_SHIFT 16
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109 | #define QH_EP_CAP_TT_ADDR_SET(addr) \
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110 | (((addr) & QH_EP_CAP_HUB_MASK) << QH_EP_CAP_HUB_SHIFT)
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111 | #define QH_EP_CAP_C_MASK_MASK 0xff
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112 | #define QH_EP_CAP_C_MASK_SHIFT 8
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113 | #define QH_EP_CAP_C_MASK_SET(val) \
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114 | (((val) & QH_EP_CAP_C_MASK_MASK) << QH_EP_CAP_C_MASK_SHIFT)
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115 | #define QH_EP_CAP_S_MASK_MASK 0xff
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116 | #define QH_EP_CAP_S_MASK_SHIFT 0
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117 | #define QH_EP_CAP_S_MASK_SET(val) \
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118 | (((val) & QH_EP_CAP_S_MASK_MASK) << QH_EP_CAP_S_MASK_SHIFT)
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119 |
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120 | /*
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121 | * qh_t.alternate
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122 | */
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123 | #define QH_ALTERNATE_NACK_CNT_MASK 0x7
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124 | #define QH_ALTERNATE_NACK_CNT_SHIFT 1
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125 |
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126 | /*
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127 | * qh_t.status
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128 | */
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129 | #define QH_STATUS_TOGGLE_FLAG (1 << 31)
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130 | #define QH_STATUS_TOTAL_MASK 0x7fff
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131 | #define QH_STATUS_TOTAL_SHIFT 16
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132 | #define QH_STATUS_IOC_FLAG (1 << 15)
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133 | #define QH_STATUS_C_PAGE_MASK 0x7
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134 | #define QH_STATUS_C_PAGE_SHIFT 12
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135 | #define QH_STATUS_CERR_MASK 0x3
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136 | #define QH_STATUS_CERR_SHIFT 10
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137 | #define QH_STATUS_PID_MASK 0x3
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138 | #define QH_STATUS_PID_SHIFT 8
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139 | #define QH_STATUS_ACTIVE_FLAG (1 << 7)
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140 | #define QH_STATUS_HALTED_FLAG (1 << 6)
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141 | #define QH_STATUS_BUFF_ERROR_FLAG (1 << 5)
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142 | #define QH_STATUS_BABBLE_FLAG (1 << 4)
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143 | #define QH_STATUS_TRANS_ERR_FLAG (1 << 3)
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144 | #define QH_STATUS_MISSED_FLAG (1 << 2)
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145 | #define QH_STATUS_SPLIT_FLAG (1 << 1)
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146 | #define QH_STATUS_PING_FLAG (1 << 0)
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147 |
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148 | /*
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149 | * qh_t.buffer_pointer
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150 | */
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151 | #define QH_BUFFER_POINTER_MASK 0xfffff000
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152 | /* Only the first buffer pointer */
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153 | #define QH_BUFFER_POINTER_OFFSET_MASK 0xfff
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154 | #define QH_BUFFER_POINTER_OFFSET_SHIFT 0
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155 | /* Only the second buffer pointer */
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156 | #define QH_BUFFER_POINTER_C_MASK_MASK 0xff
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157 | #define QH_BUFFER_POINTER_C_MASK_SHIFFT 0
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158 | /* Only the third buffer pointer */
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159 | #define QH_BUFFER_POINTER_S_MASK 0x7f
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160 | #define QH_BUFFER_POINTER_S_SHIFT 5
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161 | #define QH_BUFFER_POINTER_FTAG_MASK 0x1f
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162 | #define QH_BUFFER_POINTER_FTAG_SHIFT 0
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163 |
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164 | static inline void qh_append_qh(qh_t *qh, const qh_t *next)
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165 | {
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166 | assert(qh);
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167 | assert(next);
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168 | const uint32_t pa = addr_to_phys(next);
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169 | assert((pa & LINK_POINTER_ADDRESS_MASK) == pa);
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170 | EHCI_MEM32_WR(qh->horizontal, LINK_POINTER_QH(pa));
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171 | }
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172 |
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173 | static inline uintptr_t qh_next(const qh_t *qh)
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174 | {
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175 | assert(qh);
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176 | return (EHCI_MEM32_RD(qh->horizontal) & LINK_POINTER_ADDRESS_MASK);
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177 | }
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178 |
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179 | static inline bool qh_toggle_from_td(const qh_t *qh)
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180 | {
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181 | assert(qh);
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182 | return (EHCI_MEM32_RD(qh->ep_cap) & QH_EP_CHAR_DTC_FLAG);
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183 | }
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184 |
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185 | static inline void qh_toggle_set(qh_t *qh, int toggle)
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186 | {
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187 | assert(qh);
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188 | if (toggle)
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189 | EHCI_MEM32_SET(qh->status, QH_STATUS_TOGGLE_FLAG);
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190 | else
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191 | EHCI_MEM32_CLR(qh->status, QH_STATUS_TOGGLE_FLAG);
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192 | }
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193 |
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194 | static inline int qh_toggle_get(const qh_t *qh)
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195 | {
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196 | assert(qh);
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197 | return (EHCI_MEM32_RD(qh->status) & QH_STATUS_TOGGLE_FLAG) ? 1 : 0;
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198 | }
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199 |
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200 | static inline bool qh_halted(const qh_t *qh)
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201 | {
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202 | assert(qh);
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203 | return (EHCI_MEM32_RD(qh->status) & QH_STATUS_HALTED_FLAG);
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204 | }
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205 |
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206 | static inline void qh_clear_halt(qh_t *qh)
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207 | {
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208 | assert(qh);
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209 | EHCI_MEM32_CLR(qh->status, QH_STATUS_HALTED_FLAG);
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210 | }
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211 |
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212 | static inline void qh_set_next_td(qh_t *qh, uintptr_t td)
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213 | {
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214 | assert(qh);
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215 | assert(td);
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216 | EHCI_MEM32_WR(qh->next, LINK_POINTER_TD(td));
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217 | }
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218 |
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219 | static inline bool qh_transfer_active(const qh_t *qh)
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220 | {
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221 | assert(qh);
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222 | return (EHCI_MEM32_RD(qh->status) & QH_STATUS_ACTIVE_FLAG);
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223 | }
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224 |
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225 | static inline bool qh_transfer_pending(const qh_t *qh)
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226 | {
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227 | assert(qh);
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228 | return !(EHCI_MEM32_RD(qh->next) & LINK_POINTER_TERMINATE_FLAG);
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229 | }
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230 |
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231 | extern void qh_init(qh_t *instance, const endpoint_t *ep);
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232 |
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233 | #endif
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234 | /**
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235 | * @}
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236 | */
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