source: mainline/uspace/drv/bus/usb/ehci/hc.h@ 3e200736

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3e200736 was 3e200736, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

uhci,ohci, ehci: Move interrupt replacement fibril to libusbhost

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbehci
29 * @{
30 */
31/** @file
32 * @brief EHCI host controller driver structure
33 */
34#ifndef DRV_EHCI_HC_H
35#define DRV_EHCI_HC_H
36
37#include <adt/list.h>
38#include <ddi.h>
39#include <ddf/driver.h>
40#include <device/hw_res_parsed.h>
41#include <fibril.h>
42#include <fibril_synch.h>
43#include <stdbool.h>
44#include <sys/types.h>
45
46#include <usb/host/hcd.h>
47#include <usb/host/endpoint.h>
48#include <usb/host/usb_transfer_batch.h>
49
50#include "ehci_regs.h"
51#include "ehci_rh.h"
52//#include "endpoint_list.h"
53
54/** Main EHCI driver structure */
55typedef struct hc {
56 /** Memory mapped CAPS register area */
57 ehci_caps_regs_t *caps;
58 /** Memory mapped I/O registers area */
59 ehci_regs_t *registers;
60
61 /** Transfer schedules */
62// endpoint_list_t lists[4];
63 /** List of active transfers */
64 list_t pending_batches;
65
66 /** Guards schedule and endpoint manipulation */
67 fibril_mutex_t guard;
68
69 /** USB hub emulation structure */
70 ehci_rh_t rh;
71} hc_t;
72
73int hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res);
74int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun);
75int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interrupts);
76void hc_fini(hc_t *instance);
77
78void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep);
79void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep);
80int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
81
82void hc_interrupt(hc_t *instance, uint32_t status);
83#endif
84/**
85 * @}
86 */
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