source: mainline/uspace/drv/bus/usb/ehci/hc.c@ ba4a03a5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ba4a03a5 was ba4a03a5, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

usb host: Use all hw resources when generating irq code.

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File size: 7.3 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehcihc
30 * @{
31 */
32/** @file
33 * @brief EHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <str_error.h>
43#include <sys/types.h>
44
45#include <usb/debug.h>
46#include <usb/usb.h>
47
48//#include "ehci_endpoint.h"
49//#include "ehci_batch.h"
50#include "utils/malloc32.h"
51
52#include "hc.h"
53
54#define EHCI_USED_INTERRUPTS \
55 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG)
56
57static const irq_pio_range_t ehci_pio_ranges[] = {
58 {
59 .base = 0,
60 .size = sizeof(ehci_regs_t)
61 }
62};
63
64static const irq_cmd_t ehci_irq_commands[] = {
65 {
66 .cmd = CMD_PIO_READ_32,
67 .dstarg = 1,
68 .addr = NULL
69 },
70 {
71 .cmd = CMD_AND,
72 .srcarg = 1,
73 .dstarg = 2,
74 .value = 0
75 },
76 {
77 .cmd = CMD_PREDICATE,
78 .srcarg = 2,
79 .value = 2
80 },
81 {
82 .cmd = CMD_PIO_WRITE_A_32,
83 .srcarg = 1,
84 .addr = NULL
85 },
86 {
87 .cmd = CMD_ACCEPT
88 }
89};
90
91static void hc_gain_control(hc_t *instance);
92static void hc_start(hc_t *instance);
93static int hc_init_memory(hc_t *instance);
94static int interrupt_emulator(hc_t *instance);
95
96/** Generate IRQ code.
97 * @param[out] ranges PIO ranges buffer.
98 * @param[in] ranges_size Size of the ranges buffer (bytes).
99 * @param[out] cmds Commands buffer.
100 * @param[in] cmds_size Size of the commands buffer (bytes).
101 * @param[in] hw_res Device's resources.
102 *
103 * @return Error code.
104 */
105int hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res)
106{
107 assert(code);
108 assert(hw_res);
109
110 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
111 return EINVAL;
112
113 addr_range_t regs = hw_res->mem_ranges.ranges[0];
114
115 if (RNGSZ(regs) < sizeof(ehci_regs_t))
116 return EOVERFLOW;
117
118 code->ranges = malloc(sizeof(ehci_pio_ranges));
119 if (code->ranges == NULL)
120 return ENOMEM;
121
122 code->cmds = malloc(sizeof(ehci_irq_commands));
123 if (code->cmds == NULL) {
124 free(code->ranges);
125 return ENOMEM;
126 }
127
128 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
129 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
130
131 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
132 code->ranges[0].base = RNGABS(regs);
133
134 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
135 ehci_caps_regs_t *caps = NULL;
136 int ret = pio_enable_range(&regs, (void**)&caps);
137 if (ret != EOK) {
138 return ret;
139 }
140 ehci_regs_t *registers =
141 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(caps->caplength));
142 code->cmds[0].addr = (void *) &registers->usbsts;
143 code->cmds[3].addr = (void *) &registers->usbsts;
144 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
145
146 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
147 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
148
149 return hw_res->irqs.irqs[0];
150}
151
152/** Initialize EHCI hc driver structure
153 *
154 * @param[in] instance Memory place for the structure.
155 * @param[in] regs Device's I/O registers range.
156 * @param[in] interrupts True if w interrupts should be used
157 * @return Error code
158 */
159int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts)
160{
161 assert(instance);
162
163 int ret = pio_enable_range(regs, (void **) &instance->caps);
164 if (ret != EOK) {
165 usb_log_error("Failed to gain access to device registers: %s.\n",
166 str_error(ret));
167 return ret;
168 }
169 instance->registers =
170 (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
171
172 list_initialize(&instance->pending_batches);
173 fibril_mutex_initialize(&instance->guard);
174
175 ret = hc_init_memory(instance);
176 if (ret != EOK) {
177 usb_log_error("Failed to create EHCI memory structures: %s.\n",
178 str_error(ret));
179 return ret;
180 }
181
182 hc_gain_control(instance);
183
184 if (!interrupts) {
185 instance->interrupt_emulator =
186 fibril_create((int(*)(void*))interrupt_emulator, instance);
187 fibril_add_ready(instance->interrupt_emulator);
188 }
189
190 ehci_rh_init(
191 &instance->rh, instance->caps, instance->registers, "ehci rh");
192 hc_start(instance);
193
194 return EOK;
195}
196
197void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
198{
199}
200
201void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
202{
203}
204
205/** Add USB transfer to the schedule.
206 *
207 * @param[in] instance EHCI hc driver structure.
208 * @param[in] batch Batch representing the transfer.
209 * @return Error code.
210 */
211int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
212{
213 assert(hcd);
214 hc_t *instance = hcd->driver.data;
215 assert(instance);
216
217 /* Check for root hub communication */
218 if (batch->ep->address == ehci_rh_get_address(&instance->rh)) {
219 usb_log_debug("EHCI root hub request.\n");
220 return ehci_rh_schedule(&instance->rh, batch);
221 }
222 return ENOTSUP;
223}
224
225/** Interrupt handling routine
226 *
227 * @param[in] instance EHCI hc driver structure.
228 * @param[in] status Value of the status register at the time of interrupt.
229 */
230void hc_interrupt(hc_t *instance, uint32_t status)
231{
232 status = EHCI_RD(status);
233 assert(instance);
234 if (status & USB_STS_PORT_CHANGE_FLAG) {
235 ehci_rh_interrupt(&instance->rh);
236 }
237}
238
239/** Check status register regularly
240 *
241 * @param[in] instance EHCI hc driver structure.
242 * @return Error code
243 */
244int interrupt_emulator(hc_t *instance)
245{
246 assert(instance);
247 usb_log_info("Started interrupt emulator.\n");
248 while (1) {
249// const uint32_t status = instance->registers->interrupt_status;
250// instance->registers->interrupt_status = status;
251// hc_interrupt(instance, status);
252 async_usleep(10000);
253 }
254 return EOK;
255}
256
257/** Turn off any (BIOS)driver that might be in control of the device.
258 *
259 * This function implements routines described in chapter 5.1.1.3 of the EHCI
260 * specification (page 40, pdf page 54).
261 *
262 * @param[in] instance EHCI hc driver structure.
263 */
264void hc_gain_control(hc_t *instance)
265{
266 assert(instance);
267}
268
269/** EHCI hw initialization routine.
270 *
271 * @param[in] instance EHCI hc driver structure.
272 */
273void hc_start(hc_t *instance)
274{
275}
276
277/** Initialize memory structures used by the EHCI hcd.
278 *
279 * @param[in] instance EHCI hc driver structure.
280 * @return Error code.
281 */
282int hc_init_memory(hc_t *instance)
283{
284 return EOK;
285}
286
287/**
288 * @}
289 */
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