source: mainline/uspace/drv/bus/usb/ehci/hc.c@ 3e200736

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3e200736 was 3e200736, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

uhci,ohci, ehci: Move interrupt replacement fibril to libusbhost

  • Property mode set to 100644
File size: 7.2 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehcihc
30 * @{
31 */
32/** @file
33 * @brief EHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <str_error.h>
43#include <sys/types.h>
44
45#include <usb/debug.h>
46#include <usb/usb.h>
47
48//#include "ehci_endpoint.h"
49//#include "ehci_batch.h"
50#include "utils/malloc32.h"
51
52#include "hc.h"
53
54#define EHCI_USED_INTERRUPTS \
55 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG)
56
57static const irq_pio_range_t ehci_pio_ranges[] = {
58 {
59 .base = 0,
60 .size = sizeof(ehci_regs_t)
61 }
62};
63
64static const irq_cmd_t ehci_irq_commands[] = {
65 {
66 .cmd = CMD_PIO_READ_32,
67 .dstarg = 1,
68 .addr = NULL
69 },
70 {
71 .cmd = CMD_AND,
72 .srcarg = 1,
73 .dstarg = 2,
74 .value = 0
75 },
76 {
77 .cmd = CMD_PREDICATE,
78 .srcarg = 2,
79 .value = 2
80 },
81 {
82 .cmd = CMD_PIO_WRITE_A_32,
83 .srcarg = 1,
84 .addr = NULL
85 },
86 {
87 .cmd = CMD_ACCEPT
88 }
89};
90
91static void hc_gain_control(hc_t *instance);
92static void hc_start(hc_t *instance);
93static int hc_init_memory(hc_t *instance);
94
95/** Generate IRQ code.
96 * @param[out] ranges PIO ranges buffer.
97 * @param[in] ranges_size Size of the ranges buffer (bytes).
98 * @param[out] cmds Commands buffer.
99 * @param[in] cmds_size Size of the commands buffer (bytes).
100 * @param[in] hw_res Device's resources.
101 *
102 * @return Error code.
103 */
104int hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res)
105{
106 assert(code);
107 assert(hw_res);
108
109 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
110 return EINVAL;
111
112 addr_range_t regs = hw_res->mem_ranges.ranges[0];
113
114 if (RNGSZ(regs) < sizeof(ehci_regs_t))
115 return EOVERFLOW;
116
117 code->ranges = malloc(sizeof(ehci_pio_ranges));
118 if (code->ranges == NULL)
119 return ENOMEM;
120
121 code->cmds = malloc(sizeof(ehci_irq_commands));
122 if (code->cmds == NULL) {
123 free(code->ranges);
124 return ENOMEM;
125 }
126
127 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
128 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
129
130 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
131 code->ranges[0].base = RNGABS(regs);
132
133 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
134 ehci_caps_regs_t *caps = NULL;
135 int ret = pio_enable_range(&regs, (void**)&caps);
136 if (ret != EOK) {
137 return ret;
138 }
139 ehci_regs_t *registers =
140 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(caps->caplength));
141 code->cmds[0].addr = (void *) &registers->usbsts;
142 code->cmds[3].addr = (void *) &registers->usbsts;
143 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
144
145 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
146 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
147
148 return hw_res->irqs.irqs[0];
149}
150
151/** Initialize EHCI hc driver structure
152 *
153 * @param[in] instance Memory place for the structure.
154 * @param[in] regs Device's I/O registers range.
155 * @param[in] interrupts True if w interrupts should be used
156 * @return Error code
157 */
158int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interrupts)
159{
160 assert(instance);
161 assert(hw_res);
162 if (hw_res->mem_ranges.count != 1 ||
163 hw_res->mem_ranges.ranges[0].size <
164 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
165 return EINVAL;
166
167 int ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
168 (void **)&instance->caps);
169 if (ret != EOK) {
170 usb_log_error("Failed to gain access to device registers: %s.\n",
171 str_error(ret));
172 return ret;
173 }
174 usb_log_debug("Device registers at %" PRIx64 " (%zuB) accessible.\n",
175 hw_res->mem_ranges.ranges[0].address.absolute,
176 hw_res->mem_ranges.ranges[0].size);
177 instance->registers =
178 (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
179
180 list_initialize(&instance->pending_batches);
181 fibril_mutex_initialize(&instance->guard);
182
183 ret = hc_init_memory(instance);
184 if (ret != EOK) {
185 usb_log_error("Failed to create EHCI memory structures: %s.\n",
186 str_error(ret));
187 return ret;
188 }
189
190 hc_gain_control(instance);
191
192 ehci_rh_init(
193 &instance->rh, instance->caps, instance->registers, "ehci rh");
194 hc_start(instance);
195
196 return EOK;
197}
198
199/** Safely dispose host controller internal structures
200 *
201 * @param[in] instance Host controller structure to use.
202 */
203void hc_fini(hc_t *instance)
204{
205 assert(instance);
206 /* TODO: implement*/
207};
208
209void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
210{
211}
212
213void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
214{
215}
216
217/** Add USB transfer to the schedule.
218 *
219 * @param[in] instance EHCI hc driver structure.
220 * @param[in] batch Batch representing the transfer.
221 * @return Error code.
222 */
223int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
224{
225 assert(hcd);
226 hc_t *instance = hcd->driver.data;
227 assert(instance);
228
229 /* Check for root hub communication */
230 if (batch->ep->address == ehci_rh_get_address(&instance->rh)) {
231 usb_log_debug("EHCI root hub request.\n");
232 return ehci_rh_schedule(&instance->rh, batch);
233 }
234 return ENOTSUP;
235}
236
237/** Interrupt handling routine
238 *
239 * @param[in] instance EHCI hc driver structure.
240 * @param[in] status Value of the status register at the time of interrupt.
241 */
242void hc_interrupt(hc_t *instance, uint32_t status)
243{
244 status = EHCI_RD(status);
245 assert(instance);
246 if (status & USB_STS_PORT_CHANGE_FLAG) {
247 ehci_rh_interrupt(&instance->rh);
248 }
249}
250
251/** Turn off any (BIOS)driver that might be in control of the device.
252 *
253 * This function implements routines described in chapter 5.1.1.3 of the EHCI
254 * specification (page 40, pdf page 54).
255 *
256 * @param[in] instance EHCI hc driver structure.
257 */
258void hc_gain_control(hc_t *instance)
259{
260 assert(instance);
261}
262
263/** EHCI hw initialization routine.
264 *
265 * @param[in] instance EHCI hc driver structure.
266 */
267void hc_start(hc_t *instance)
268{
269}
270
271/** Initialize memory structures used by the EHCI hcd.
272 *
273 * @param[in] instance EHCI hc driver structure.
274 * @return Error code.
275 */
276int hc_init_memory(hc_t *instance)
277{
278 return EOK;
279}
280
281/**
282 * @}
283 */
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