source: mainline/uspace/drv/bus/usb/ehci/ehci_bus.c@ ecbad17

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ecbad17 was ecbad17, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usbhost: Implemented bandwidth accounting for USB 2.0

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehci
30 * @{
31 */
32/** @file
33 * @brief EHCI driver
34 */
35
36#include <assert.h>
37#include <stdlib.h>
38#include <usb/host/bandwidth.h>
39#include <usb/debug.h>
40
41#include "ehci_bus.h"
42#include "ehci_batch.h"
43#include "hc.h"
44
45/** Callback to set toggle on ED.
46 *
47 * @param[in] hcd_ep hcd endpoint structure
48 * @param[in] toggle new value of toggle bit
49 */
50static void ehci_ep_toggle_reset(endpoint_t *ep)
51{
52 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
53 if (qh_toggle_from_td(instance->qh))
54 usb_log_warning("EP(%p): Resetting toggle bit for transfer directed EP", instance);
55 qh_toggle_set(instance->qh, 0);
56 ep->toggle = 0;
57}
58
59
60/** Creates new hcd endpoint representation.
61 */
62static endpoint_t *ehci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
63{
64 assert(dev);
65
66 ehci_endpoint_t *ehci_ep = malloc(sizeof(ehci_endpoint_t));
67 if (ehci_ep == NULL)
68 return NULL;
69
70 endpoint_init(&ehci_ep->base, dev, desc);
71
72 // TODO: extract USB2 information from desc
73
74 if (dma_buffer_alloc(&ehci_ep->dma_buffer, sizeof(qh_t)))
75 return NULL;
76
77 ehci_ep->qh = ehci_ep->dma_buffer.virt;
78
79 link_initialize(&ehci_ep->link);
80 return &ehci_ep->base;
81}
82
83/** Disposes hcd endpoint structure
84 *
85 * @param[in] hcd driver using this instance.
86 * @param[in] ep endpoint structure.
87 */
88static void ehci_endpoint_destroy(endpoint_t *ep)
89{
90 assert(ep);
91 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
92
93 dma_buffer_free(&instance->dma_buffer);
94 free(instance);
95}
96
97
98static int ehci_register_ep(endpoint_t *ep)
99{
100 bus_t *bus_base = endpoint_get_bus(ep);
101 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
102 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
103 assert(fibril_mutex_is_locked(&bus_base->guard));
104
105 const int err = usb2_bus_ops.endpoint_register(ep);
106 if (err)
107 return err;
108
109 qh_init(ehci_ep->qh, ep);
110 hc_enqueue_endpoint(bus->hc, ep);
111
112 return EOK;
113}
114
115static int ehci_unregister_ep(endpoint_t *ep)
116{
117 bus_t *bus_base = endpoint_get_bus(ep);
118 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
119 assert(bus);
120 assert(ep);
121
122 const int err = usb2_bus_ops.endpoint_unregister(ep);
123 if (err)
124 return err;
125
126 hc_dequeue_endpoint(bus->hc, ep);
127 return EOK;
128}
129
130static usb_transfer_batch_t *ehci_create_batch(endpoint_t *ep)
131{
132 ehci_transfer_batch_t *batch = ehci_transfer_batch_create(ep);
133 return &batch->base;
134}
135
136static void ehci_destroy_batch(usb_transfer_batch_t *batch)
137{
138 ehci_transfer_batch_destroy(ehci_transfer_batch_get(batch));
139}
140
141static const bus_ops_t ehci_bus_ops = {
142 .parent = &usb2_bus_ops,
143
144 .interrupt = ehci_hc_interrupt,
145 .status = ehci_hc_status,
146 .endpoint_destroy = ehci_endpoint_destroy,
147 .endpoint_create = ehci_endpoint_create,
148 .endpoint_register = ehci_register_ep,
149 .endpoint_unregister = ehci_unregister_ep,
150 .endpoint_toggle_reset = ehci_ep_toggle_reset,
151 .endpoint_count_bw = bandwidth_count_usb20,
152 .batch_create = ehci_create_batch,
153 .batch_destroy = ehci_destroy_batch,
154 .batch_schedule = ehci_hc_schedule,
155};
156
157int ehci_bus_init(ehci_bus_t *bus, hc_t *hc)
158{
159 assert(hc);
160 assert(bus);
161
162 usb2_bus_t *usb2_bus = (usb2_bus_t *) bus;
163 bus_t *bus_base = (bus_t *) bus;
164
165 usb2_bus_init(usb2_bus, BANDWIDTH_AVAILABLE_USB20);
166 bus_base->ops = &ehci_bus_ops;
167
168 bus->hc = hc;
169
170 return EOK;
171}
172
173/**
174 * @}
175 */
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