source: mainline/uspace/drv/bus/usb/ehci/ehci_bus.c@ 7278cbc9

lfn serial ticket/834-toolchain-update topic/fix-logger-deadlock topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7278cbc9 was 7278cbc9, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usbhost: dispose the EP0 properly (+some ehci cleanup while debugging)

  • Property mode set to 100644
File size: 5.2 KB
RevLine 
[f9351b1]1/*
[741bcdeb]2 * Copyright (c) 2011 Jan Vesely
[f9351b1]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[741bcdeb]28
[f9351b1]29/** @addtogroup drvusbehci
30 * @{
31 */
32/** @file
33 * @brief EHCI driver
34 */
35
36#include <assert.h>
37#include <stdlib.h>
[741bcdeb]38#include <usb/host/bandwidth.h>
39#include <usb/debug.h>
[f9351b1]40
[741bcdeb]41#include "ehci_bus.h"
[5fd9c30]42#include "ehci_batch.h"
[f9351b1]43#include "hc.h"
44
[c6f82e5]45/**
46 * Callback to set toggle on ED.
[f9351b1]47 *
48 * @param[in] hcd_ep hcd endpoint structure
49 * @param[in] toggle new value of toggle bit
50 */
[c6f82e5]51void ehci_ep_toggle_reset(endpoint_t *ep)
[f9351b1]52{
[741bcdeb]53 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[42de21a]54 if (qh_toggle_from_td(instance->qh))
[56257ba]55 usb_log_warning("EP(%p): Resetting toggle bit for transfer directed EP", instance);
56 qh_toggle_set(instance->qh, 0);
[f9351b1]57}
58
59
60/** Creates new hcd endpoint representation.
61 */
[9efad54]62static endpoint_t *ehci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
[f9351b1]63{
[6832245]64 assert(dev);
[b5f813c]65
[f9351b1]66 ehci_endpoint_t *ehci_ep = malloc(sizeof(ehci_endpoint_t));
67 if (ehci_ep == NULL)
[741bcdeb]68 return NULL;
69
[6832245]70 endpoint_init(&ehci_ep->base, dev, desc);
71
[35c37fc]72 if (dma_buffer_alloc(&ehci_ep->dma_buffer, sizeof(qh_t)))
[741bcdeb]73 return NULL;
[35c37fc]74
75 ehci_ep->qh = ehci_ep->dma_buffer.virt;
[f9351b1]76
[8ad2b0a]77 link_initialize(&ehci_ep->eplist_link);
78 link_initialize(&ehci_ep->pending_link);
[5995383c]79 return &ehci_ep->base;
[f9351b1]80}
81
82/** Disposes hcd endpoint structure
83 *
84 * @param[in] hcd driver using this instance.
85 * @param[in] ep endpoint structure.
86 */
[741bcdeb]87static void ehci_endpoint_destroy(endpoint_t *ep)
[f9351b1]88{
89 assert(ep);
90 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[741bcdeb]91
[35c37fc]92 dma_buffer_free(&instance->dma_buffer);
[741bcdeb]93 free(instance);
94}
95
96
[6832245]97static int ehci_register_ep(endpoint_t *ep)
[741bcdeb]98{
[6832245]99 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]100 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
101 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
102
[6832245]103 const int err = usb2_bus_ops.endpoint_register(ep);
[741bcdeb]104 if (err)
105 return err;
106
107 qh_init(ehci_ep->qh, ep);
108 hc_enqueue_endpoint(bus->hc, ep);
109
110 return EOK;
111}
112
[bad4a05]113static void ehci_unregister_ep(endpoint_t *ep)
[741bcdeb]114{
[6832245]115 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]116 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
[8ad2b0a]117 hc_t *hc = bus->hc;
[741bcdeb]118 assert(bus);
119 assert(ep);
120
[bad4a05]121 usb2_bus_ops.endpoint_unregister(ep);
[8ad2b0a]122 hc_dequeue_endpoint(hc, ep);
123
124 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
125
126 /*
127 * Now we can be sure the active transfer will not be completed. But first,
128 * make sure that the handling fibril won't use its link in pending list.
129 */
130 fibril_mutex_lock(&hc->guard);
131 if (link_in_use(&ehci_ep->pending_link))
132 /* pending list reference */
133 endpoint_del_ref(ep);
134 list_remove(&ehci_ep->pending_link);
135 fibril_mutex_unlock(&hc->guard);
136
137 /*
138 * Finally, the endpoint shall not be used anywhere else. Finish the
139 * pending batch.
140 */
141 fibril_mutex_lock(&ep->guard);
142 usb_transfer_batch_t * const batch = ep->active_batch;
143 endpoint_deactivate_locked(ep);
144 fibril_mutex_unlock(&ep->guard);
145
146 if (batch) {
147 batch->error = EINTR;
[db51a6a6]148 batch->transferred_size = 0;
[8ad2b0a]149 usb_transfer_batch_finish(batch);
150 }
[5fd9c30]151}
152
[6832245]153static usb_transfer_batch_t *ehci_create_batch(endpoint_t *ep)
[5fd9c30]154{
155 ehci_transfer_batch_t *batch = ehci_transfer_batch_create(ep);
156 return &batch->base;
157}
[741bcdeb]158
[6832245]159static void ehci_destroy_batch(usb_transfer_batch_t *batch)
[5fd9c30]160{
161 ehci_transfer_batch_destroy(ehci_transfer_batch_get(batch));
[f9351b1]162}
[741bcdeb]163
[6832245]164static const bus_ops_t ehci_bus_ops = {
165 .parent = &usb2_bus_ops,
166
[32fb6bce]167 .interrupt = ehci_hc_interrupt,
168 .status = ehci_hc_status,
[c6f82e5]169
[6832245]170 .endpoint_destroy = ehci_endpoint_destroy,
171 .endpoint_create = ehci_endpoint_create,
172 .endpoint_register = ehci_register_ep,
173 .endpoint_unregister = ehci_unregister_ep,
[ecbad17]174 .endpoint_count_bw = bandwidth_count_usb20,
[c6f82e5]175
[6832245]176 .batch_create = ehci_create_batch,
177 .batch_destroy = ehci_destroy_batch,
[32fb6bce]178 .batch_schedule = ehci_hc_schedule,
[6832245]179};
180
[32fb6bce]181int ehci_bus_init(ehci_bus_t *bus, hc_t *hc)
[741bcdeb]182{
183 assert(hc);
184 assert(bus);
185
[6832245]186 usb2_bus_t *usb2_bus = (usb2_bus_t *) bus;
187 bus_t *bus_base = (bus_t *) bus;
[741bcdeb]188
[ecbad17]189 usb2_bus_init(usb2_bus, BANDWIDTH_AVAILABLE_USB20);
[6832245]190 bus_base->ops = &ehci_bus_ops;
[5fd9c30]191
[5995383c]192 bus->hc = hc;
193
[741bcdeb]194 return EOK;
195}
196
[f9351b1]197/**
198 * @}
199 */
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