source: mainline/uspace/drv/bus/usb/ehci/ehci_bus.c@ 36e8a0c8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 36e8a0c8 was c6f82e5, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

libusbhost: do not try to handle the toggle bit in a generic way

  • Property mode set to 100644
File size: 5.2 KB
RevLine 
[f9351b1]1/*
[741bcdeb]2 * Copyright (c) 2011 Jan Vesely
[f9351b1]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[741bcdeb]28
[f9351b1]29/** @addtogroup drvusbehci
30 * @{
31 */
32/** @file
33 * @brief EHCI driver
34 */
35
36#include <assert.h>
37#include <stdlib.h>
[741bcdeb]38#include <usb/host/bandwidth.h>
39#include <usb/debug.h>
[f9351b1]40
[741bcdeb]41#include "ehci_bus.h"
[5fd9c30]42#include "ehci_batch.h"
[f9351b1]43#include "hc.h"
44
[c6f82e5]45/**
46 * Callback to set toggle on ED.
[f9351b1]47 *
48 * @param[in] hcd_ep hcd endpoint structure
49 * @param[in] toggle new value of toggle bit
50 */
[c6f82e5]51void ehci_ep_toggle_reset(endpoint_t *ep)
[f9351b1]52{
[741bcdeb]53 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[42de21a]54 if (qh_toggle_from_td(instance->qh))
[56257ba]55 usb_log_warning("EP(%p): Resetting toggle bit for transfer directed EP", instance);
56 qh_toggle_set(instance->qh, 0);
[f9351b1]57}
58
59
60/** Creates new hcd endpoint representation.
61 */
[9efad54]62static endpoint_t *ehci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
[f9351b1]63{
[6832245]64 assert(dev);
[b5f813c]65
[f9351b1]66 ehci_endpoint_t *ehci_ep = malloc(sizeof(ehci_endpoint_t));
67 if (ehci_ep == NULL)
[741bcdeb]68 return NULL;
69
[6832245]70 endpoint_init(&ehci_ep->base, dev, desc);
71
72 // TODO: extract USB2 information from desc
[35c37fc]73
74 if (dma_buffer_alloc(&ehci_ep->dma_buffer, sizeof(qh_t)))
[741bcdeb]75 return NULL;
[35c37fc]76
77 ehci_ep->qh = ehci_ep->dma_buffer.virt;
[f9351b1]78
[8ad2b0a]79 link_initialize(&ehci_ep->eplist_link);
80 link_initialize(&ehci_ep->pending_link);
[5995383c]81 return &ehci_ep->base;
[f9351b1]82}
83
84/** Disposes hcd endpoint structure
85 *
86 * @param[in] hcd driver using this instance.
87 * @param[in] ep endpoint structure.
88 */
[741bcdeb]89static void ehci_endpoint_destroy(endpoint_t *ep)
[f9351b1]90{
91 assert(ep);
92 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[741bcdeb]93
[35c37fc]94 dma_buffer_free(&instance->dma_buffer);
[741bcdeb]95 free(instance);
96}
97
98
[6832245]99static int ehci_register_ep(endpoint_t *ep)
[741bcdeb]100{
[6832245]101 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]102 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
103 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
104
[6832245]105 const int err = usb2_bus_ops.endpoint_register(ep);
[741bcdeb]106 if (err)
107 return err;
108
109 qh_init(ehci_ep->qh, ep);
110 hc_enqueue_endpoint(bus->hc, ep);
111
112 return EOK;
113}
114
[bad4a05]115static void ehci_unregister_ep(endpoint_t *ep)
[741bcdeb]116{
[6832245]117 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]118 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
[8ad2b0a]119 hc_t *hc = bus->hc;
[741bcdeb]120 assert(bus);
121 assert(ep);
122
[bad4a05]123 usb2_bus_ops.endpoint_unregister(ep);
[8ad2b0a]124 hc_dequeue_endpoint(hc, ep);
125
126 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
127
128 /*
129 * Now we can be sure the active transfer will not be completed. But first,
130 * make sure that the handling fibril won't use its link in pending list.
131 */
132 fibril_mutex_lock(&hc->guard);
133 if (link_in_use(&ehci_ep->pending_link))
134 /* pending list reference */
135 endpoint_del_ref(ep);
136 list_remove(&ehci_ep->pending_link);
137 fibril_mutex_unlock(&hc->guard);
138
139 /*
140 * Finally, the endpoint shall not be used anywhere else. Finish the
141 * pending batch.
142 */
143 fibril_mutex_lock(&ep->guard);
144 usb_transfer_batch_t * const batch = ep->active_batch;
145 endpoint_deactivate_locked(ep);
146 fibril_mutex_unlock(&ep->guard);
147
148 if (batch) {
149 batch->error = EINTR;
150 batch->transfered_size = 0;
151 usb_transfer_batch_finish(batch);
152 }
[5fd9c30]153}
154
[6832245]155static usb_transfer_batch_t *ehci_create_batch(endpoint_t *ep)
[5fd9c30]156{
157 ehci_transfer_batch_t *batch = ehci_transfer_batch_create(ep);
158 return &batch->base;
159}
[741bcdeb]160
[6832245]161static void ehci_destroy_batch(usb_transfer_batch_t *batch)
[5fd9c30]162{
163 ehci_transfer_batch_destroy(ehci_transfer_batch_get(batch));
[f9351b1]164}
[741bcdeb]165
[6832245]166static const bus_ops_t ehci_bus_ops = {
167 .parent = &usb2_bus_ops,
168
[32fb6bce]169 .interrupt = ehci_hc_interrupt,
170 .status = ehci_hc_status,
[c6f82e5]171
[6832245]172 .endpoint_destroy = ehci_endpoint_destroy,
173 .endpoint_create = ehci_endpoint_create,
174 .endpoint_register = ehci_register_ep,
175 .endpoint_unregister = ehci_unregister_ep,
[ecbad17]176 .endpoint_count_bw = bandwidth_count_usb20,
[c6f82e5]177
[6832245]178 .batch_create = ehci_create_batch,
179 .batch_destroy = ehci_destroy_batch,
[32fb6bce]180 .batch_schedule = ehci_hc_schedule,
[6832245]181};
182
[32fb6bce]183int ehci_bus_init(ehci_bus_t *bus, hc_t *hc)
[741bcdeb]184{
185 assert(hc);
186 assert(bus);
187
[6832245]188 usb2_bus_t *usb2_bus = (usb2_bus_t *) bus;
189 bus_t *bus_base = (bus_t *) bus;
[741bcdeb]190
[ecbad17]191 usb2_bus_init(usb2_bus, BANDWIDTH_AVAILABLE_USB20);
[6832245]192 bus_base->ops = &ehci_bus_ops;
[5fd9c30]193
[5995383c]194 bus->hc = hc;
195
[741bcdeb]196 return EOK;
197}
198
[f9351b1]199/**
200 * @}
201 */
Note: See TracBrowser for help on using the repository browser.