source: mainline/uspace/drv/bus/usb/ehci/ehci_bus.c@ 132ab5d1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 132ab5d1 was f3ae58b, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

libusbhost: usb2_bus needs to release address when the device is gone

  • Property mode set to 100644
File size: 5.3 KB
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[f9351b1]1/*
[741bcdeb]2 * Copyright (c) 2011 Jan Vesely
[f9351b1]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[741bcdeb]28
[f9351b1]29/** @addtogroup drvusbehci
30 * @{
31 */
32/** @file
33 * @brief EHCI driver
34 */
35
36#include <assert.h>
37#include <stdlib.h>
[741bcdeb]38#include <usb/host/bandwidth.h>
39#include <usb/debug.h>
[f9351b1]40
[741bcdeb]41#include "ehci_bus.h"
[5fd9c30]42#include "ehci_batch.h"
[f9351b1]43#include "hc.h"
44
[c6f82e5]45/**
46 * Callback to set toggle on ED.
[f9351b1]47 *
48 * @param[in] hcd_ep hcd endpoint structure
49 * @param[in] toggle new value of toggle bit
50 */
[c6f82e5]51void ehci_ep_toggle_reset(endpoint_t *ep)
[f9351b1]52{
[741bcdeb]53 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[42de21a]54 if (qh_toggle_from_td(instance->qh))
[56257ba]55 usb_log_warning("EP(%p): Resetting toggle bit for transfer directed EP", instance);
56 qh_toggle_set(instance->qh, 0);
[f9351b1]57}
58
[d369b3b]59static int ehci_device_enumerate(device_t *dev)
60{
61 ehci_bus_t *bus = (ehci_bus_t *) dev->bus;
62 return usb2_bus_device_enumerate(&bus->helper, dev);
63}
[f9351b1]64
[f3ae58b]65static void ehci_device_gone(device_t *dev)
66{
67 ehci_bus_t *bus = (ehci_bus_t *) dev->bus;
68 usb2_bus_device_gone(&bus->helper, dev);
69}
70
[f9351b1]71/** Creates new hcd endpoint representation.
72 */
[9efad54]73static endpoint_t *ehci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
[f9351b1]74{
[6832245]75 assert(dev);
[b5f813c]76
[f9351b1]77 ehci_endpoint_t *ehci_ep = malloc(sizeof(ehci_endpoint_t));
78 if (ehci_ep == NULL)
[741bcdeb]79 return NULL;
80
[6832245]81 endpoint_init(&ehci_ep->base, dev, desc);
82
[35c37fc]83 if (dma_buffer_alloc(&ehci_ep->dma_buffer, sizeof(qh_t)))
[741bcdeb]84 return NULL;
[35c37fc]85
86 ehci_ep->qh = ehci_ep->dma_buffer.virt;
[f9351b1]87
[8ad2b0a]88 link_initialize(&ehci_ep->eplist_link);
89 link_initialize(&ehci_ep->pending_link);
[5995383c]90 return &ehci_ep->base;
[f9351b1]91}
92
93/** Disposes hcd endpoint structure
94 *
95 * @param[in] hcd driver using this instance.
96 * @param[in] ep endpoint structure.
97 */
[741bcdeb]98static void ehci_endpoint_destroy(endpoint_t *ep)
[f9351b1]99{
100 assert(ep);
101 ehci_endpoint_t *instance = ehci_endpoint_get(ep);
[741bcdeb]102
[35c37fc]103 dma_buffer_free(&instance->dma_buffer);
[741bcdeb]104 free(instance);
105}
106
107
[6832245]108static int ehci_register_ep(endpoint_t *ep)
[741bcdeb]109{
[6832245]110 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]111 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
112 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
113
[d369b3b]114 const int err = usb2_bus_endpoint_register(&bus->helper, ep);
[741bcdeb]115 if (err)
116 return err;
117
118 qh_init(ehci_ep->qh, ep);
119 hc_enqueue_endpoint(bus->hc, ep);
[4db49344]120 endpoint_set_online(ep, &bus->hc->guard);
[741bcdeb]121 return EOK;
122}
123
[bad4a05]124static void ehci_unregister_ep(endpoint_t *ep)
[741bcdeb]125{
[6832245]126 bus_t *bus_base = endpoint_get_bus(ep);
[741bcdeb]127 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
[8ad2b0a]128 hc_t *hc = bus->hc;
[741bcdeb]129 assert(bus);
130 assert(ep);
131
[d369b3b]132 usb2_bus_endpoint_unregister(&bus->helper, ep);
[8ad2b0a]133 hc_dequeue_endpoint(hc, ep);
[4db49344]134 /*
135 * Now we can be sure the active transfer will not be completed,
136 * as it's out of the schedule, and HC acknowledged it.
137 */
[8ad2b0a]138
139 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
140
141 fibril_mutex_lock(&hc->guard);
[4db49344]142 endpoint_set_offline_locked(ep);
[8ad2b0a]143 list_remove(&ehci_ep->pending_link);
144 usb_transfer_batch_t * const batch = ep->active_batch;
145 endpoint_deactivate_locked(ep);
[4db49344]146 fibril_mutex_unlock(&hc->guard);
[8ad2b0a]147
148 if (batch) {
149 batch->error = EINTR;
[db51a6a6]150 batch->transferred_size = 0;
[8ad2b0a]151 usb_transfer_batch_finish(batch);
152 }
[5fd9c30]153}
154
[6832245]155static usb_transfer_batch_t *ehci_create_batch(endpoint_t *ep)
[5fd9c30]156{
157 ehci_transfer_batch_t *batch = ehci_transfer_batch_create(ep);
158 return &batch->base;
159}
[741bcdeb]160
[6832245]161static void ehci_destroy_batch(usb_transfer_batch_t *batch)
[5fd9c30]162{
163 ehci_transfer_batch_destroy(ehci_transfer_batch_get(batch));
[f9351b1]164}
[741bcdeb]165
[6832245]166static const bus_ops_t ehci_bus_ops = {
[32fb6bce]167 .interrupt = ehci_hc_interrupt,
168 .status = ehci_hc_status,
[c6f82e5]169
[d369b3b]170 .device_enumerate = ehci_device_enumerate,
[f3ae58b]171 .device_gone = ehci_device_gone,
[d369b3b]172
[6832245]173 .endpoint_destroy = ehci_endpoint_destroy,
174 .endpoint_create = ehci_endpoint_create,
175 .endpoint_register = ehci_register_ep,
176 .endpoint_unregister = ehci_unregister_ep,
[c6f82e5]177
[6832245]178 .batch_create = ehci_create_batch,
179 .batch_destroy = ehci_destroy_batch,
[32fb6bce]180 .batch_schedule = ehci_hc_schedule,
[6832245]181};
182
[32fb6bce]183int ehci_bus_init(ehci_bus_t *bus, hc_t *hc)
[741bcdeb]184{
185 assert(hc);
186 assert(bus);
187
[6832245]188 bus_t *bus_base = (bus_t *) bus;
[d369b3b]189 bus_init(bus_base, sizeof(device_t));
[6832245]190 bus_base->ops = &ehci_bus_ops;
[5fd9c30]191
[d369b3b]192 usb2_bus_helper_init(&bus->helper, &bandwidth_accounting_usb2);
193
[5995383c]194 bus->hc = hc;
195
[741bcdeb]196 return EOK;
197}
198
[f9351b1]199/**
200 * @}
201 */
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