source: mainline/uspace/drv/bus/usb/ehci/ehci_batch.c@ 629255a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 629255a was db51a6a6, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

typo: transferred is spelled with two r

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1/*
2 * Copyright (c) 2014 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbehci
29 * @{
30 */
31/** @file
32 * @brief EHCI driver USB transaction structure
33 */
34
35#include <assert.h>
36#include <errno.h>
37#include <macros.h>
38#include <mem.h>
39#include <stdbool.h>
40#include <str_error.h>
41
42#include <usb/usb.h>
43#include <usb/debug.h>
44
45#include "ehci_batch.h"
46#include "ehci_bus.h"
47
48/* The buffer pointer list in the qTD is long enough to support a maximum
49 * transfer size of 20K bytes. This case occurs when all five buffer pointers
50 * are used and the first offset is zero. A qTD handles a 16Kbyte buffer
51 * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97) */
52#define EHCI_TD_MAX_TRANSFER (16 * 1024)
53
54static void (*const batch_setup[])(ehci_transfer_batch_t*);
55
56/** Safely destructs ehci_transfer_batch_t structure
57 *
58 * @param[in] ehci_batch Instance to destroy.
59 */
60void ehci_transfer_batch_destroy(ehci_transfer_batch_t *ehci_batch)
61{
62 assert(ehci_batch);
63 dma_buffer_free(&ehci_batch->dma_buffer);
64 usb_log_debug2("Batch(%p): disposed", ehci_batch);
65 free(ehci_batch);
66}
67
68/** Allocate memory and initialize internal data structure.
69 *
70 * @param[in] usb_batch Pointer to generic USB batch structure.
71 * @return Valid pointer if all structures were successfully created,
72 * NULL otherwise.
73 *
74 */
75ehci_transfer_batch_t * ehci_transfer_batch_create(endpoint_t *ep)
76{
77 assert(ep);
78
79 ehci_transfer_batch_t *ehci_batch = calloc(1, sizeof(ehci_transfer_batch_t));
80 if (!ehci_batch) {
81 usb_log_error("Failed to allocate EHCI batch data.");
82 return NULL;
83 }
84
85 usb_transfer_batch_init(&ehci_batch->base, ep);
86
87 return ehci_batch;
88}
89
90/** Prepares a batch to be sent.
91 *
92 * Determines the number of needed transfer descriptors (TDs).
93 * Prepares a transport buffer (that is accessible by the hardware).
94 * Initializes parameters needed for the transfer and callback.
95 */
96int ehci_transfer_batch_prepare(ehci_transfer_batch_t *ehci_batch)
97{
98 assert(ehci_batch);
99
100 const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL)
101 ? USB_SETUP_PACKET_SIZE
102 : 0;
103
104 const size_t size = ehci_batch->base.buffer_size;
105
106 /* Add TD left over by the previous transfer */
107 ehci_batch->qh = ehci_endpoint_get(ehci_batch->base.ep)->qh;
108
109 /* Determine number of TDs needed */
110 ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1)
111 / EHCI_TD_MAX_TRANSFER;
112
113 /* Control transfer need Setup and Status stage */
114 if (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) {
115 ehci_batch->td_count += 2;
116 }
117
118 const size_t tds_size = ehci_batch->td_count * sizeof(td_t);
119
120 /* Mix setup stage, data and TDs together, we have enough space */
121 if (size + setup_size + tds_size > 0) {
122 if (dma_buffer_alloc(&ehci_batch->dma_buffer, tds_size + setup_size + size)) {
123 usb_log_error("Batch %p: Failed to allocate device "
124 "buffer", ehci_batch);
125 return ENOMEM;
126 }
127 /* Clean TDs */
128 ehci_batch->tds = ehci_batch->dma_buffer.virt;
129 memset(ehci_batch->tds, 0, tds_size);
130 /* Copy setup data */
131 ehci_batch->setup_buffer = ehci_batch->dma_buffer.virt + tds_size;
132 memcpy(ehci_batch->setup_buffer, ehci_batch->base.setup.buffer, setup_size);
133 /* Copy generic data */
134 ehci_batch->data_buffer = ehci_batch->setup_buffer + setup_size;
135 if (ehci_batch->base.dir != USB_DIRECTION_IN)
136 memcpy(ehci_batch->data_buffer,
137 ehci_batch->base.buffer,
138 ehci_batch->base.buffer_size);
139 }
140
141 assert(batch_setup[ehci_batch->base.ep->transfer_type]);
142 batch_setup[ehci_batch->base.ep->transfer_type](ehci_batch);
143
144 usb_log_debug("Batch %p %s " USB_TRANSFER_BATCH_FMT " initialized.",
145 ehci_batch, usb_str_direction(ehci_batch->base.dir),
146 USB_TRANSFER_BATCH_ARGS(ehci_batch->base));
147
148 return EOK;
149}
150
151/** Check batch TDs' status.
152 *
153 * @param[in] ehci_batch Batch structure to use.
154 * @return False, if there is an active TD, true otherwise.
155 *
156 * Walk all TDs (usually there is just one). Stop with false if there is an
157 * active TD. Stop with true if an error is found. Return true if the walk
158 * completes with the last TD.
159 */
160bool ehci_transfer_batch_check_completed(ehci_transfer_batch_t *ehci_batch)
161{
162 assert(ehci_batch);
163
164 usb_log_debug("Batch %p: checking %zu td(s) for completion.",
165 ehci_batch, ehci_batch->td_count);
166
167 usb_log_debug2("Batch %p: QH: %08x:%08x:%08x:%08x:%08x:%08x.",
168 ehci_batch,
169 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
170 ehci_batch->qh->status, ehci_batch->qh->current,
171 ehci_batch->qh->next, ehci_batch->qh->alternate);
172
173 if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh)
174 || qh_transfer_active(ehci_batch->qh)))
175 return false;
176
177 /* Now we may be sure that either the ED is inactive because of errors
178 * or all transfer descriptors completed successfully */
179
180 /* Assume all data got through */
181 ehci_batch->base.transferred_size = ehci_batch->base.buffer_size;
182
183 /* Check all TDs */
184 for (size_t i = 0; i < ehci_batch->td_count; ++i) {
185 usb_log_debug("Batch %p: TD %zu: %08x:%08x:%08x.",
186 ehci_batch, i,
187 ehci_batch->tds[i].status, ehci_batch->tds[i].next,
188 ehci_batch->tds[i].alternate);
189
190 ehci_batch->base.error = td_error(&ehci_batch->tds[i]);
191 if (ehci_batch->base.error == EOK) {
192 /* If the TD got all its data through, it will report
193 * 0 bytes remain, the sole exception is INPUT with
194 * data rounding flag (short), i.e. every INPUT.
195 * Nice thing is that short packets will correctly
196 * report remaining data, thus making this computation
197 * correct (short packets need to be produced by the
198 * last TD)
199 * NOTE: This also works for CONTROL transfer as
200 * the first TD will return 0 remain.
201 * NOTE: Short packets don't break the assumption that
202 * we leave the very last(unused) TD behind.
203 */
204 ehci_batch->base.transferred_size
205 -= td_remain_size(&ehci_batch->tds[i]);
206 } else {
207 usb_log_debug("Batch %p found error TD(%zu):%08x (%d).",
208 ehci_batch, i,
209 ehci_batch->tds[i].status,
210 ehci_batch->base.error);
211 /* Clear possible ED HALT */
212 qh_clear_halt(ehci_batch->qh);
213 break;
214 }
215 }
216
217 assert(ehci_batch->base.transferred_size <= ehci_batch->base.buffer_size);
218
219 if (ehci_batch->base.dir == USB_DIRECTION_IN)
220 memcpy(ehci_batch->base.buffer,
221 ehci_batch->data_buffer,
222 ehci_batch->base.transferred_size);
223
224 /* Clear TD pointers */
225 ehci_batch->qh->next = LINK_POINTER_TERM;
226 ehci_batch->qh->current = LINK_POINTER_TERM;
227 usb_log_debug("Batch %p complete: %s", ehci_batch,
228 str_error(ehci_batch->base.error));
229
230 return true;
231}
232
233/** Starts execution of the TD list
234 *
235 * @param[in] ehci_batch Batch structure to use
236 */
237void ehci_transfer_batch_commit(const ehci_transfer_batch_t *ehci_batch)
238{
239 assert(ehci_batch);
240 qh_set_next_td(ehci_batch->qh, dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[0]));
241}
242
243/** Prepare generic control transfer
244 *
245 * @param[in] ehci_batch Batch structure to use.
246 *
247 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
248 * Data stage with alternating toggle and direction
249 * Status stage with toggle 1 and direction
250 */
251static void batch_control(ehci_transfer_batch_t *ehci_batch)
252{
253 assert(ehci_batch);
254
255 usb_direction_t dir = ehci_batch->base.dir;
256 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
257
258 usb_log_debug2("Batch %p: Control QH(%p): "
259 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
260 ehci_batch->qh,
261 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
262 ehci_batch->qh->status, ehci_batch->qh->current,
263 ehci_batch->qh->next, ehci_batch->qh->alternate);
264 static const usb_direction_t reverse_dir[] = {
265 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
266 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
267 };
268
269 int toggle = 0;
270 const usb_direction_t data_dir = dir;
271 const usb_direction_t status_dir = reverse_dir[dir];
272
273 /* Setup stage */
274 td_init(&ehci_batch->tds[0],
275 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[1]),
276 dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->setup_buffer),
277 USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false);
278 usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%"PRIxn"): "
279 "%08x:%08x:%08x", ehci_batch,
280 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[0]),
281 ehci_batch->tds[0].status, ehci_batch->tds[0].next,
282 ehci_batch->tds[0].alternate);
283
284 /* Data stage */
285 unsigned td_current = 1;
286 size_t remain_size = ehci_batch->base.buffer_size;
287 uintptr_t buffer = dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->data_buffer);
288 while (remain_size > 0) {
289 const size_t transfer_size = min(remain_size, EHCI_TD_MAX_TRANSFER);
290 toggle = 1 - toggle;
291
292 td_init(&ehci_batch->tds[td_current],
293 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current + 1]),
294 buffer, data_dir, transfer_size, toggle, false);
295 usb_log_debug2("Batch %p: Created CONTROL DATA TD(%"PRIxn"): "
296 "%08x:%08x:%08x", ehci_batch,
297 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
298 ehci_batch->tds[td_current].status,
299 ehci_batch->tds[td_current].next,
300 ehci_batch->tds[td_current].alternate);
301
302 buffer += transfer_size;
303 remain_size -= transfer_size;
304 assert(td_current < ehci_batch->td_count - 1);
305 ++td_current;
306 }
307
308 /* Status stage */
309 assert(td_current == ehci_batch->td_count - 1);
310 td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true);
311 usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%"PRIxn"): "
312 "%08x:%08x:%08x", ehci_batch, td_current,
313 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
314 ehci_batch->tds[td_current].status,
315 ehci_batch->tds[td_current].next,
316 ehci_batch->tds[td_current].alternate);
317}
318
319/** Prepare generic data transfer
320 *
321 * @param[in] ehci_batch Batch structure to use.
322 * @paramp[in] dir Communication direction.
323 *
324 * Direction is supplied by the associated ep and toggle is maintained by the
325 * EHCI hw in ED.
326 */
327static void batch_data(ehci_transfer_batch_t *ehci_batch)
328{
329 assert(ehci_batch);
330
331 usb_log_debug2("Batch %p: Data QH(%p): "
332 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
333 ehci_batch->qh,
334 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
335 ehci_batch->qh->status, ehci_batch->qh->current,
336 ehci_batch->qh->next, ehci_batch->qh->alternate);
337
338 size_t td_current = 0;
339 size_t remain_size = ehci_batch->base.buffer_size;
340 uintptr_t buffer = dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->data_buffer);
341 while (remain_size > 0) {
342 const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER
343 ? EHCI_TD_MAX_TRANSFER : remain_size;
344
345 const bool last = (remain_size == transfer_size);
346 td_init(&ehci_batch->tds[td_current],
347 last ? 0 : dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current + 1]),
348 buffer, ehci_batch->base.dir, transfer_size, -1, last);
349
350 usb_log_debug2("Batch %p: DATA TD(%"PRIxn": %08x:%08x:%08x",
351 ehci_batch,
352 dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
353 ehci_batch->tds[td_current].status,
354 ehci_batch->tds[td_current].next,
355 ehci_batch->tds[td_current].alternate);
356
357 buffer += transfer_size;
358 remain_size -= transfer_size;
359 assert(td_current < ehci_batch->td_count);
360 ++td_current;
361 }
362}
363
364/** Transfer setup table. */
365static void (*const batch_setup[])(ehci_transfer_batch_t*) =
366{
367 [USB_TRANSFER_CONTROL] = batch_control,
368 [USB_TRANSFER_BULK] = batch_data,
369 [USB_TRANSFER_INTERRUPT] = batch_data,
370 [USB_TRANSFER_ISOCHRONOUS] = NULL,
371};
372/**
373 * @}
374 */
375
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