1 | /*
|
---|
2 | * Copyright (c) 2014 Jan Vesely
|
---|
3 | * All rights reserved.
|
---|
4 | *
|
---|
5 | * Redistribution and use in source and binary forms, with or without
|
---|
6 | * modification, are permitted provided that the following conditions
|
---|
7 | * are met:
|
---|
8 | *
|
---|
9 | * - Redistributions of source code must retain the above copyright
|
---|
10 | * notice, this list of conditions and the following disclaimer.
|
---|
11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
12 | * notice, this list of conditions and the following disclaimer in the
|
---|
13 | * documentation and/or other materials provided with the distribution.
|
---|
14 | * - The name of the author may not be used to endorse or promote products
|
---|
15 | * derived from this software without specific prior written permission.
|
---|
16 | *
|
---|
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
27 | */
|
---|
28 | /** @addtogroup drvusbehci
|
---|
29 | * @{
|
---|
30 | */
|
---|
31 | /** @file
|
---|
32 | * @brief EHCI driver USB transaction structure
|
---|
33 | */
|
---|
34 |
|
---|
35 | #include <assert.h>
|
---|
36 | #include <errno.h>
|
---|
37 | #include <macros.h>
|
---|
38 | #include <mem.h>
|
---|
39 | #include <stdbool.h>
|
---|
40 | #include <str_error.h>
|
---|
41 |
|
---|
42 | #include <usb/usb.h>
|
---|
43 | #include <usb/debug.h>
|
---|
44 |
|
---|
45 | #include "ehci_batch.h"
|
---|
46 | #include "ehci_bus.h"
|
---|
47 |
|
---|
48 | /* The buffer pointer list in the qTD is long enough to support a maximum
|
---|
49 | * transfer size of 20K bytes. This case occurs when all five buffer pointers
|
---|
50 | * are used and the first offset is zero. A qTD handles a 16Kbyte buffer
|
---|
51 | * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97) */
|
---|
52 | #define EHCI_TD_MAX_TRANSFER (16 * 1024)
|
---|
53 |
|
---|
54 | static void (*const batch_setup[])(ehci_transfer_batch_t*);
|
---|
55 |
|
---|
56 | /** Safely destructs ehci_transfer_batch_t structure
|
---|
57 | *
|
---|
58 | * @param[in] ehci_batch Instance to destroy.
|
---|
59 | */
|
---|
60 | void ehci_transfer_batch_destroy(ehci_transfer_batch_t *ehci_batch)
|
---|
61 | {
|
---|
62 | assert(ehci_batch);
|
---|
63 | dma_buffer_free(&ehci_batch->dma_buffer);
|
---|
64 | usb_log_debug2("Batch(%p): disposed", ehci_batch);
|
---|
65 | free(ehci_batch);
|
---|
66 | }
|
---|
67 |
|
---|
68 | /** Allocate memory and initialize internal data structure.
|
---|
69 | *
|
---|
70 | * @param[in] usb_batch Pointer to generic USB batch structure.
|
---|
71 | * @return Valid pointer if all structures were successfully created,
|
---|
72 | * NULL otherwise.
|
---|
73 | *
|
---|
74 | */
|
---|
75 | ehci_transfer_batch_t * ehci_transfer_batch_create(endpoint_t *ep)
|
---|
76 | {
|
---|
77 | assert(ep);
|
---|
78 |
|
---|
79 | ehci_transfer_batch_t *ehci_batch = calloc(1, sizeof(ehci_transfer_batch_t));
|
---|
80 | if (!ehci_batch) {
|
---|
81 | usb_log_error("Failed to allocate EHCI batch data.");
|
---|
82 | return NULL;
|
---|
83 | }
|
---|
84 |
|
---|
85 | usb_transfer_batch_init(&ehci_batch->base, ep);
|
---|
86 |
|
---|
87 | return ehci_batch;
|
---|
88 | }
|
---|
89 |
|
---|
90 | /** Prepares a batch to be sent.
|
---|
91 | *
|
---|
92 | * Determines the number of needed transfer descriptors (TDs).
|
---|
93 | * Prepares a transport buffer (that is accessible by the hardware).
|
---|
94 | * Initializes parameters needed for the transfer and callback.
|
---|
95 | */
|
---|
96 | int ehci_transfer_batch_prepare(ehci_transfer_batch_t *ehci_batch)
|
---|
97 | {
|
---|
98 | assert(ehci_batch);
|
---|
99 |
|
---|
100 | const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL)
|
---|
101 | ? USB_SETUP_PACKET_SIZE
|
---|
102 | : 0;
|
---|
103 |
|
---|
104 | const size_t size = ehci_batch->base.buffer_size;
|
---|
105 |
|
---|
106 | /* Add TD left over by the previous transfer */
|
---|
107 | ehci_batch->qh = ehci_endpoint_get(ehci_batch->base.ep)->qh;
|
---|
108 |
|
---|
109 | /* Determine number of TDs needed */
|
---|
110 | ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1)
|
---|
111 | / EHCI_TD_MAX_TRANSFER;
|
---|
112 |
|
---|
113 | /* Control transfer need Setup and Status stage */
|
---|
114 | if (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) {
|
---|
115 | ehci_batch->td_count += 2;
|
---|
116 | }
|
---|
117 |
|
---|
118 | const size_t tds_size = ehci_batch->td_count * sizeof(td_t);
|
---|
119 |
|
---|
120 | /* Mix setup stage, data and TDs together, we have enough space */
|
---|
121 | if (size + setup_size + tds_size > 0) {
|
---|
122 | if (dma_buffer_alloc(&ehci_batch->dma_buffer, tds_size + setup_size + size)) {
|
---|
123 | usb_log_error("Batch %p: Failed to allocate device "
|
---|
124 | "buffer", ehci_batch);
|
---|
125 | return ENOMEM;
|
---|
126 | }
|
---|
127 | /* Clean TDs */
|
---|
128 | ehci_batch->tds = ehci_batch->dma_buffer.virt;
|
---|
129 | memset(ehci_batch->tds, 0, tds_size);
|
---|
130 | /* Copy setup data */
|
---|
131 | ehci_batch->setup_buffer = ehci_batch->dma_buffer.virt + tds_size;
|
---|
132 | memcpy(ehci_batch->setup_buffer, ehci_batch->base.setup.buffer, setup_size);
|
---|
133 | /* Copy generic data */
|
---|
134 | ehci_batch->data_buffer = ehci_batch->setup_buffer + setup_size;
|
---|
135 | if (ehci_batch->base.dir != USB_DIRECTION_IN)
|
---|
136 | memcpy(ehci_batch->data_buffer,
|
---|
137 | ehci_batch->base.buffer,
|
---|
138 | ehci_batch->base.buffer_size);
|
---|
139 | }
|
---|
140 |
|
---|
141 | if (!batch_setup[ehci_batch->base.ep->transfer_type])
|
---|
142 | return ENOTSUP;
|
---|
143 |
|
---|
144 | batch_setup[ehci_batch->base.ep->transfer_type](ehci_batch);
|
---|
145 |
|
---|
146 | usb_log_debug("Batch %p %s " USB_TRANSFER_BATCH_FMT " initialized.",
|
---|
147 | ehci_batch, usb_str_direction(ehci_batch->base.dir),
|
---|
148 | USB_TRANSFER_BATCH_ARGS(ehci_batch->base));
|
---|
149 |
|
---|
150 | return EOK;
|
---|
151 | }
|
---|
152 |
|
---|
153 | /** Check batch TDs' status.
|
---|
154 | *
|
---|
155 | * @param[in] ehci_batch Batch structure to use.
|
---|
156 | * @return False, if there is an active TD, true otherwise.
|
---|
157 | *
|
---|
158 | * Walk all TDs (usually there is just one). Stop with false if there is an
|
---|
159 | * active TD. Stop with true if an error is found. Return true if the walk
|
---|
160 | * completes with the last TD.
|
---|
161 | */
|
---|
162 | bool ehci_transfer_batch_check_completed(ehci_transfer_batch_t *ehci_batch)
|
---|
163 | {
|
---|
164 | assert(ehci_batch);
|
---|
165 |
|
---|
166 | usb_log_debug("Batch %p: checking %zu td(s) for completion.",
|
---|
167 | ehci_batch, ehci_batch->td_count);
|
---|
168 |
|
---|
169 | usb_log_debug2("Batch %p: QH: %08x:%08x:%08x:%08x:%08x:%08x.",
|
---|
170 | ehci_batch,
|
---|
171 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
|
---|
172 | ehci_batch->qh->status, ehci_batch->qh->current,
|
---|
173 | ehci_batch->qh->next, ehci_batch->qh->alternate);
|
---|
174 |
|
---|
175 | if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh)
|
---|
176 | || qh_transfer_active(ehci_batch->qh)))
|
---|
177 | return false;
|
---|
178 |
|
---|
179 | /* Now we may be sure that either the ED is inactive because of errors
|
---|
180 | * or all transfer descriptors completed successfully */
|
---|
181 |
|
---|
182 | /* Assume all data got through */
|
---|
183 | ehci_batch->base.transferred_size = ehci_batch->base.buffer_size;
|
---|
184 |
|
---|
185 | /* Check all TDs */
|
---|
186 | for (size_t i = 0; i < ehci_batch->td_count; ++i) {
|
---|
187 | usb_log_debug("Batch %p: TD %zu: %08x:%08x:%08x.",
|
---|
188 | ehci_batch, i,
|
---|
189 | ehci_batch->tds[i].status, ehci_batch->tds[i].next,
|
---|
190 | ehci_batch->tds[i].alternate);
|
---|
191 |
|
---|
192 | ehci_batch->base.error = td_error(&ehci_batch->tds[i]);
|
---|
193 | if (ehci_batch->base.error == EOK) {
|
---|
194 | /* If the TD got all its data through, it will report
|
---|
195 | * 0 bytes remain, the sole exception is INPUT with
|
---|
196 | * data rounding flag (short), i.e. every INPUT.
|
---|
197 | * Nice thing is that short packets will correctly
|
---|
198 | * report remaining data, thus making this computation
|
---|
199 | * correct (short packets need to be produced by the
|
---|
200 | * last TD)
|
---|
201 | * NOTE: This also works for CONTROL transfer as
|
---|
202 | * the first TD will return 0 remain.
|
---|
203 | * NOTE: Short packets don't break the assumption that
|
---|
204 | * we leave the very last(unused) TD behind.
|
---|
205 | */
|
---|
206 | ehci_batch->base.transferred_size
|
---|
207 | -= td_remain_size(&ehci_batch->tds[i]);
|
---|
208 | } else {
|
---|
209 | usb_log_debug("Batch %p found error TD(%zu):%08x: %s.",
|
---|
210 | ehci_batch, i,
|
---|
211 | ehci_batch->tds[i].status,
|
---|
212 | str_error_name(ehci_batch->base.error));
|
---|
213 | /* Clear possible ED HALT */
|
---|
214 | qh_clear_halt(ehci_batch->qh);
|
---|
215 | break;
|
---|
216 | }
|
---|
217 | }
|
---|
218 |
|
---|
219 | assert(ehci_batch->base.transferred_size <= ehci_batch->base.buffer_size);
|
---|
220 |
|
---|
221 | if (ehci_batch->base.dir == USB_DIRECTION_IN)
|
---|
222 | memcpy(ehci_batch->base.buffer,
|
---|
223 | ehci_batch->data_buffer,
|
---|
224 | ehci_batch->base.transferred_size);
|
---|
225 |
|
---|
226 | /* Clear TD pointers */
|
---|
227 | ehci_batch->qh->next = LINK_POINTER_TERM;
|
---|
228 | ehci_batch->qh->current = LINK_POINTER_TERM;
|
---|
229 | usb_log_debug("Batch %p complete: %s", ehci_batch,
|
---|
230 | str_error(ehci_batch->base.error));
|
---|
231 |
|
---|
232 | return true;
|
---|
233 | }
|
---|
234 |
|
---|
235 | /** Starts execution of the TD list
|
---|
236 | *
|
---|
237 | * @param[in] ehci_batch Batch structure to use
|
---|
238 | */
|
---|
239 | void ehci_transfer_batch_commit(const ehci_transfer_batch_t *ehci_batch)
|
---|
240 | {
|
---|
241 | assert(ehci_batch);
|
---|
242 | qh_set_next_td(ehci_batch->qh, dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[0]));
|
---|
243 | }
|
---|
244 |
|
---|
245 | /** Prepare generic control transfer
|
---|
246 | *
|
---|
247 | * @param[in] ehci_batch Batch structure to use.
|
---|
248 | *
|
---|
249 | * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
|
---|
250 | * Data stage with alternating toggle and direction
|
---|
251 | * Status stage with toggle 1 and direction
|
---|
252 | */
|
---|
253 | static void batch_control(ehci_transfer_batch_t *ehci_batch)
|
---|
254 | {
|
---|
255 | assert(ehci_batch);
|
---|
256 |
|
---|
257 | usb_direction_t dir = ehci_batch->base.dir;
|
---|
258 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
|
---|
259 |
|
---|
260 | usb_log_debug2("Batch %p: Control QH(%p): "
|
---|
261 | "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
|
---|
262 | ehci_batch->qh,
|
---|
263 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
|
---|
264 | ehci_batch->qh->status, ehci_batch->qh->current,
|
---|
265 | ehci_batch->qh->next, ehci_batch->qh->alternate);
|
---|
266 | static const usb_direction_t reverse_dir[] = {
|
---|
267 | [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
|
---|
268 | [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
|
---|
269 | };
|
---|
270 |
|
---|
271 | int toggle = 0;
|
---|
272 | const usb_direction_t data_dir = dir;
|
---|
273 | const usb_direction_t status_dir = reverse_dir[dir];
|
---|
274 |
|
---|
275 | /* Setup stage */
|
---|
276 | td_init(&ehci_batch->tds[0],
|
---|
277 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[1]),
|
---|
278 | dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->setup_buffer),
|
---|
279 | USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false);
|
---|
280 | usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%"PRIxn"): "
|
---|
281 | "%08x:%08x:%08x", ehci_batch,
|
---|
282 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[0]),
|
---|
283 | ehci_batch->tds[0].status, ehci_batch->tds[0].next,
|
---|
284 | ehci_batch->tds[0].alternate);
|
---|
285 |
|
---|
286 | /* Data stage */
|
---|
287 | unsigned td_current = 1;
|
---|
288 | size_t remain_size = ehci_batch->base.buffer_size;
|
---|
289 | uintptr_t buffer = dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->data_buffer);
|
---|
290 | while (remain_size > 0) {
|
---|
291 | const size_t transfer_size = min(remain_size, EHCI_TD_MAX_TRANSFER);
|
---|
292 | toggle = 1 - toggle;
|
---|
293 |
|
---|
294 | td_init(&ehci_batch->tds[td_current],
|
---|
295 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current + 1]),
|
---|
296 | buffer, data_dir, transfer_size, toggle, false);
|
---|
297 | usb_log_debug2("Batch %p: Created CONTROL DATA TD(%"PRIxn"): "
|
---|
298 | "%08x:%08x:%08x", ehci_batch,
|
---|
299 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
|
---|
300 | ehci_batch->tds[td_current].status,
|
---|
301 | ehci_batch->tds[td_current].next,
|
---|
302 | ehci_batch->tds[td_current].alternate);
|
---|
303 |
|
---|
304 | buffer += transfer_size;
|
---|
305 | remain_size -= transfer_size;
|
---|
306 | assert(td_current < ehci_batch->td_count - 1);
|
---|
307 | ++td_current;
|
---|
308 | }
|
---|
309 |
|
---|
310 | /* Status stage */
|
---|
311 | assert(td_current == ehci_batch->td_count - 1);
|
---|
312 | td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true);
|
---|
313 | usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%"PRIxn"): "
|
---|
314 | "%08x:%08x:%08x", ehci_batch, td_current,
|
---|
315 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
|
---|
316 | ehci_batch->tds[td_current].status,
|
---|
317 | ehci_batch->tds[td_current].next,
|
---|
318 | ehci_batch->tds[td_current].alternate);
|
---|
319 | }
|
---|
320 |
|
---|
321 | /** Prepare generic data transfer
|
---|
322 | *
|
---|
323 | * @param[in] ehci_batch Batch structure to use.
|
---|
324 | * @paramp[in] dir Communication direction.
|
---|
325 | *
|
---|
326 | * Direction is supplied by the associated ep and toggle is maintained by the
|
---|
327 | * EHCI hw in ED.
|
---|
328 | */
|
---|
329 | static void batch_data(ehci_transfer_batch_t *ehci_batch)
|
---|
330 | {
|
---|
331 | assert(ehci_batch);
|
---|
332 |
|
---|
333 | usb_log_debug2("Batch %p: Data QH(%p): "
|
---|
334 | "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
|
---|
335 | ehci_batch->qh,
|
---|
336 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
|
---|
337 | ehci_batch->qh->status, ehci_batch->qh->current,
|
---|
338 | ehci_batch->qh->next, ehci_batch->qh->alternate);
|
---|
339 |
|
---|
340 | size_t td_current = 0;
|
---|
341 | size_t remain_size = ehci_batch->base.buffer_size;
|
---|
342 | uintptr_t buffer = dma_buffer_phys(&ehci_batch->dma_buffer, ehci_batch->data_buffer);
|
---|
343 | while (remain_size > 0) {
|
---|
344 | const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER
|
---|
345 | ? EHCI_TD_MAX_TRANSFER : remain_size;
|
---|
346 |
|
---|
347 | const bool last = (remain_size == transfer_size);
|
---|
348 | td_init(&ehci_batch->tds[td_current],
|
---|
349 | last ? 0 : dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current + 1]),
|
---|
350 | buffer, ehci_batch->base.dir, transfer_size, -1, last);
|
---|
351 |
|
---|
352 | usb_log_debug2("Batch %p: DATA TD(%"PRIxn": %08x:%08x:%08x",
|
---|
353 | ehci_batch,
|
---|
354 | dma_buffer_phys(&ehci_batch->dma_buffer, &ehci_batch->tds[td_current]),
|
---|
355 | ehci_batch->tds[td_current].status,
|
---|
356 | ehci_batch->tds[td_current].next,
|
---|
357 | ehci_batch->tds[td_current].alternate);
|
---|
358 |
|
---|
359 | buffer += transfer_size;
|
---|
360 | remain_size -= transfer_size;
|
---|
361 | assert(td_current < ehci_batch->td_count);
|
---|
362 | ++td_current;
|
---|
363 | }
|
---|
364 | }
|
---|
365 |
|
---|
366 | /** Transfer setup table. */
|
---|
367 | static void (*const batch_setup[])(ehci_transfer_batch_t*) =
|
---|
368 | {
|
---|
369 | [USB_TRANSFER_CONTROL] = batch_control,
|
---|
370 | [USB_TRANSFER_BULK] = batch_data,
|
---|
371 | [USB_TRANSFER_INTERRUPT] = batch_data,
|
---|
372 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
|
---|
373 | };
|
---|
374 | /**
|
---|
375 | * @}
|
---|
376 | */
|
---|
377 |
|
---|