source: mainline/uspace/drv/bus/usb/ehci/ehci_batch.c@ 0539c14

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0539c14 was 1d758fc, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usb: rethinking DMA buffers

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1/*
2 * Copyright (c) 2014 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbehci
29 * @{
30 */
31/** @file
32 * @brief EHCI driver USB transaction structure
33 */
34
35#include <assert.h>
36#include <errno.h>
37#include <macros.h>
38#include <mem.h>
39#include <stdbool.h>
40#include <str_error.h>
41
42#include <usb/usb.h>
43#include <usb/debug.h>
44
45#include "ehci_batch.h"
46#include "ehci_bus.h"
47
48/* The buffer pointer list in the qTD is long enough to support a maximum
49 * transfer size of 20K bytes. This case occurs when all five buffer pointers
50 * are used and the first offset is zero. A qTD handles a 16Kbyte buffer
51 * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97) */
52#define EHCI_TD_MAX_TRANSFER (16 * 1024)
53
54static void (*const batch_setup[])(ehci_transfer_batch_t*);
55
56/** Safely destructs ehci_transfer_batch_t structure
57 *
58 * @param[in] ehci_batch Instance to destroy.
59 */
60void ehci_transfer_batch_destroy(ehci_transfer_batch_t *ehci_batch)
61{
62 assert(ehci_batch);
63 dma_buffer_free(&ehci_batch->ehci_dma_buffer);
64 usb_log_debug2("Batch(%p): disposed", ehci_batch);
65 free(ehci_batch);
66}
67
68/** Allocate memory and initialize internal data structure.
69 *
70 * @param[in] usb_batch Pointer to generic USB batch structure.
71 * @return Valid pointer if all structures were successfully created,
72 * NULL otherwise.
73 *
74 */
75ehci_transfer_batch_t * ehci_transfer_batch_create(endpoint_t *ep)
76{
77 assert(ep);
78
79 ehci_transfer_batch_t *ehci_batch = calloc(1, sizeof(ehci_transfer_batch_t));
80 if (!ehci_batch) {
81 usb_log_error("Failed to allocate EHCI batch data.");
82 return NULL;
83 }
84
85 usb_transfer_batch_init(&ehci_batch->base, ep);
86
87 return ehci_batch;
88}
89
90/** Prepares a batch to be sent.
91 *
92 * Determines the number of needed transfer descriptors (TDs).
93 * Prepares a transport buffer (that is accessible by the hardware).
94 * Initializes parameters needed for the transfer and callback.
95 */
96int ehci_transfer_batch_prepare(ehci_transfer_batch_t *ehci_batch)
97{
98 assert(ehci_batch);
99
100 const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL)
101 ? USB_SETUP_PACKET_SIZE
102 : 0;
103
104 const size_t size = ehci_batch->base.size;
105
106 /* Add TD left over by the previous transfer */
107 ehci_batch->qh = ehci_endpoint_get(ehci_batch->base.ep)->qh;
108
109 /* Determine number of TDs needed */
110 ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1)
111 / EHCI_TD_MAX_TRANSFER;
112
113 /* Control transfer need Setup and Status stage */
114 if (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) {
115 ehci_batch->td_count += 2;
116 }
117
118 assert(ehci_batch->td_count > 0);
119
120 const size_t tds_size = ehci_batch->td_count * sizeof(td_t);
121
122 /* Mix setup stage and TDs together, we have enough space */
123 if (dma_buffer_alloc(&ehci_batch->ehci_dma_buffer, tds_size + setup_size)) {
124 usb_log_error("Batch %p: Failed to allocate device buffer",
125 ehci_batch);
126 return ENOMEM;
127 }
128
129 /* Clean TDs */
130 ehci_batch->tds = ehci_batch->ehci_dma_buffer.virt;
131 memset(ehci_batch->tds, 0, tds_size);
132
133 /* Copy setup data */
134 ehci_batch->setup_buffer = ehci_batch->ehci_dma_buffer.virt + tds_size;
135 memcpy(ehci_batch->setup_buffer, ehci_batch->base.setup.buffer, setup_size);
136
137 /* Generic data already prepared*/
138 ehci_batch->data_buffer = ehci_batch->base.dma_buffer.virt;
139
140 if (!batch_setup[ehci_batch->base.ep->transfer_type])
141 return ENOTSUP;
142
143 batch_setup[ehci_batch->base.ep->transfer_type](ehci_batch);
144
145 usb_log_debug("Batch %p %s " USB_TRANSFER_BATCH_FMT " initialized.",
146 ehci_batch, usb_str_direction(ehci_batch->base.dir),
147 USB_TRANSFER_BATCH_ARGS(ehci_batch->base));
148
149 return EOK;
150}
151
152/** Check batch TDs' status.
153 *
154 * @param[in] ehci_batch Batch structure to use.
155 * @return False, if there is an active TD, true otherwise.
156 *
157 * Walk all TDs (usually there is just one). Stop with false if there is an
158 * active TD. Stop with true if an error is found. Return true if the walk
159 * completes with the last TD.
160 */
161bool ehci_transfer_batch_check_completed(ehci_transfer_batch_t *ehci_batch)
162{
163 assert(ehci_batch);
164
165 usb_log_debug("Batch %p: checking %zu td(s) for completion.",
166 ehci_batch, ehci_batch->td_count);
167
168 usb_log_debug2("Batch %p: QH: %08x:%08x:%08x:%08x:%08x:%08x.",
169 ehci_batch,
170 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
171 ehci_batch->qh->status, ehci_batch->qh->current,
172 ehci_batch->qh->next, ehci_batch->qh->alternate);
173
174 if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh)
175 || qh_transfer_active(ehci_batch->qh)))
176 return false;
177
178 /* Now we may be sure that either the ED is inactive because of errors
179 * or all transfer descriptors completed successfully */
180
181 /* Assume all data got through */
182 ehci_batch->base.transferred_size = ehci_batch->base.size;
183
184 /* Check all TDs */
185 for (size_t i = 0; i < ehci_batch->td_count; ++i) {
186 usb_log_debug("Batch %p: TD %zu: %08x:%08x:%08x.",
187 ehci_batch, i,
188 ehci_batch->tds[i].status, ehci_batch->tds[i].next,
189 ehci_batch->tds[i].alternate);
190
191 ehci_batch->base.error = td_error(&ehci_batch->tds[i]);
192 if (ehci_batch->base.error == EOK) {
193 /* If the TD got all its data through, it will report
194 * 0 bytes remain, the sole exception is INPUT with
195 * data rounding flag (short), i.e. every INPUT.
196 * Nice thing is that short packets will correctly
197 * report remaining data, thus making this computation
198 * correct (short packets need to be produced by the
199 * last TD)
200 * NOTE: This also works for CONTROL transfer as
201 * the first TD will return 0 remain.
202 * NOTE: Short packets don't break the assumption that
203 * we leave the very last(unused) TD behind.
204 */
205 ehci_batch->base.transferred_size
206 -= td_remain_size(&ehci_batch->tds[i]);
207 } else {
208 usb_log_debug("Batch %p found error TD(%zu):%08x: %s.",
209 ehci_batch, i,
210 ehci_batch->tds[i].status,
211 str_error_name(ehci_batch->base.error));
212 /* Clear possible ED HALT */
213 qh_clear_halt(ehci_batch->qh);
214 break;
215 }
216 }
217
218 assert(ehci_batch->base.transferred_size <= ehci_batch->base.size);
219
220 /* Clear TD pointers */
221 ehci_batch->qh->next = LINK_POINTER_TERM;
222 ehci_batch->qh->current = LINK_POINTER_TERM;
223 usb_log_debug("Batch %p complete: %s", ehci_batch,
224 str_error(ehci_batch->base.error));
225
226 return true;
227}
228
229/** Starts execution of the TD list
230 *
231 * @param[in] ehci_batch Batch structure to use
232 */
233void ehci_transfer_batch_commit(const ehci_transfer_batch_t *ehci_batch)
234{
235 assert(ehci_batch);
236 qh_set_next_td(ehci_batch->qh,
237 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]));
238}
239
240/** Prepare generic control transfer
241 *
242 * @param[in] ehci_batch Batch structure to use.
243 *
244 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
245 * Data stage with alternating toggle and direction
246 * Status stage with toggle 1 and direction
247 */
248static void batch_control(ehci_transfer_batch_t *ehci_batch)
249{
250 assert(ehci_batch);
251
252 usb_direction_t dir = ehci_batch->base.dir;
253 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
254
255 usb_log_debug2("Batch %p: Control QH(%p): "
256 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
257 ehci_batch->qh,
258 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
259 ehci_batch->qh->status, ehci_batch->qh->current,
260 ehci_batch->qh->next, ehci_batch->qh->alternate);
261 static const usb_direction_t reverse_dir[] = {
262 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
263 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
264 };
265
266 int toggle = 0;
267 const usb_direction_t data_dir = dir;
268 const usb_direction_t status_dir = reverse_dir[dir];
269
270 /* Setup stage */
271 td_init(&ehci_batch->tds[0],
272 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[1]),
273 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, ehci_batch->setup_buffer),
274 USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false);
275 usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%"PRIxn"): "
276 "%08x:%08x:%08x", ehci_batch,
277 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]),
278 ehci_batch->tds[0].status, ehci_batch->tds[0].next,
279 ehci_batch->tds[0].alternate);
280
281 /* Data stage */
282 unsigned td_current = 1;
283 size_t remain_size = ehci_batch->base.size;
284 uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
285 ehci_batch->data_buffer);
286 while (remain_size > 0) {
287 const size_t transfer_size = min(remain_size, EHCI_TD_MAX_TRANSFER);
288 toggle = 1 - toggle;
289
290 td_init(&ehci_batch->tds[td_current],
291 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current + 1]),
292 buffer, data_dir, transfer_size, toggle, false);
293 usb_log_debug2("Batch %p: Created CONTROL DATA TD(%"PRIxn"): "
294 "%08x:%08x:%08x", ehci_batch,
295 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
296 ehci_batch->tds[td_current].status,
297 ehci_batch->tds[td_current].next,
298 ehci_batch->tds[td_current].alternate);
299
300 buffer += transfer_size;
301 remain_size -= transfer_size;
302 assert(td_current < ehci_batch->td_count - 1);
303 ++td_current;
304 }
305
306 /* Status stage */
307 assert(td_current == ehci_batch->td_count - 1);
308 td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true);
309 usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%"PRIxn"): "
310 "%08x:%08x:%08x", ehci_batch, td_current,
311 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
312 ehci_batch->tds[td_current].status,
313 ehci_batch->tds[td_current].next,
314 ehci_batch->tds[td_current].alternate);
315}
316
317/** Prepare generic data transfer
318 *
319 * @param[in] ehci_batch Batch structure to use.
320 * @paramp[in] dir Communication direction.
321 *
322 * Direction is supplied by the associated ep and toggle is maintained by the
323 * EHCI hw in ED.
324 */
325static void batch_data(ehci_transfer_batch_t *ehci_batch)
326{
327 assert(ehci_batch);
328
329 usb_log_debug2("Batch %p: Data QH(%p): "
330 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
331 ehci_batch->qh,
332 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
333 ehci_batch->qh->status, ehci_batch->qh->current,
334 ehci_batch->qh->next, ehci_batch->qh->alternate);
335
336 size_t td_current = 0;
337 size_t remain_size = ehci_batch->base.size;
338 uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
339 ehci_batch->data_buffer);
340 while (remain_size > 0) {
341 const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER
342 ? EHCI_TD_MAX_TRANSFER : remain_size;
343
344 const bool last = (remain_size == transfer_size);
345 td_init(&ehci_batch->tds[td_current],
346 last ? 0 : dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
347 &ehci_batch->tds[td_current + 1]),
348 buffer, ehci_batch->base.dir, transfer_size, -1, last);
349
350 usb_log_debug2("Batch %p: DATA TD(%"PRIxn": %08x:%08x:%08x",
351 ehci_batch,
352 dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
353 &ehci_batch->tds[td_current]),
354 ehci_batch->tds[td_current].status,
355 ehci_batch->tds[td_current].next,
356 ehci_batch->tds[td_current].alternate);
357
358 buffer += transfer_size;
359 remain_size -= transfer_size;
360 assert(td_current < ehci_batch->td_count);
361 ++td_current;
362 }
363}
364
365/** Transfer setup table. */
366static void (*const batch_setup[])(ehci_transfer_batch_t*) =
367{
368 [USB_TRANSFER_CONTROL] = batch_control,
369 [USB_TRANSFER_BULK] = batch_data,
370 [USB_TRANSFER_INTERRUPT] = batch_data,
371 [USB_TRANSFER_ISOCHRONOUS] = NULL,
372};
373/**
374 * @}
375 */
376
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