source: mainline/uspace/drv/bus/pci/pciintel/pci.h@ 9d58539

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9d58539 was 9d58539, checked in by Prutkov Alex <prutkov.alex@…>, 13 years ago

Fixed unix permissions for all files

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * Copyright (c) 2010 Lenka Trochtova
3 * Copyright (c) 2011 Jiri Svoboda
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup pciintel
31 * @{
32 */
33/** @file
34 */
35
36#ifndef PCI_H_
37#define PCI_H_
38
39#include <ddf/driver.h>
40#include "pci_regs.h"
41
42#define PCI_MAX_HW_RES 8
43
44typedef struct pciintel_bus {
45 /** DDF device node */
46 ddf_dev_t *dnode;
47 uint32_t conf_io_addr;
48 void *conf_data_port;
49 void *conf_addr_port;
50 fibril_mutex_t conf_mutex;
51} pci_bus_t;
52
53typedef struct pci_fun_data {
54 pci_bus_t *busptr;
55 ddf_fun_t *fnode;
56
57 int bus;
58 int dev;
59 int fn;
60 int vendor_id;
61 int device_id;
62 uint8_t class_code;
63 uint8_t subclass_code;
64 uint8_t prog_if;
65 uint8_t revision;
66 hw_resource_list_t hw_resources;
67 hw_resource_t resources[PCI_MAX_HW_RES];
68} pci_fun_t;
69
70extern void pci_fun_create_match_ids(pci_fun_t *);
71
72extern uint8_t pci_conf_read_8(pci_fun_t *, int);
73extern uint16_t pci_conf_read_16(pci_fun_t *, int);
74extern uint32_t pci_conf_read_32(pci_fun_t *, int);
75extern void pci_conf_write_8(pci_fun_t *, int, uint8_t);
76extern void pci_conf_write_16(pci_fun_t *, int, uint16_t);
77extern void pci_conf_write_32(pci_fun_t *, int, uint32_t);
78
79extern void pci_add_range(pci_fun_t *, uint64_t, size_t, bool);
80extern int pci_read_bar(pci_fun_t *, int);
81extern void pci_read_interrupt(pci_fun_t *);
82extern void pci_add_interrupt(pci_fun_t *, int);
83
84extern pci_fun_t *pci_fun_new(pci_bus_t *);
85extern void pci_fun_init(pci_fun_t *, int, int, int);
86extern void pci_fun_delete(pci_fun_t *);
87extern char *pci_fun_create_name(pci_fun_t *);
88
89extern void pci_bus_scan(pci_bus_t *, int);
90
91extern bool pci_alloc_resource_list(pci_fun_t *);
92extern void pci_clean_resource_list(pci_fun_t *);
93
94extern void pci_read_bars(pci_fun_t *);
95extern size_t pci_bar_mask_to_size(uint32_t);
96
97#endif
98
99/**
100 * @}
101 */
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