| 1 | /*
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| 2 | * Copyright (c) 2010 Jiri Svoboda
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup genarch
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| 30 | * @{
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| 31 | */
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| 32 | /** @file VIA-CUDA Apple Desktop Bus driver
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| 33 | *
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| 34 | * Note: We should really do a full bus scan at the beginning and resolve
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| 35 | * address conflicts. Also we should consider the handler ID in r3. Instead
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| 36 | * we just assume a keyboard at address 2 or 8 and a mouse at address 9.
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| 37 | */
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| 38 |
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| 39 | #include <assert.h>
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| 40 | #include <ddf/driver.h>
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| 41 | #include <ddf/log.h>
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| 42 | #include <ddi.h>
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| 43 | #include <errno.h>
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| 44 | #include <ipc/adb.h>
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| 45 | #include <libarch/ddi.h>
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| 46 | #include <stdbool.h>
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| 47 | #include <stddef.h>
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| 48 | #include <stdint.h>
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| 49 | #include <stdio.h>
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| 50 | #include <stdlib.h>
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| 51 |
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| 52 | #include "cuda_adb.h"
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| 53 | #include "cuda_hw.h"
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| 54 |
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| 55 | #define NAME "cuda_adb"
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| 56 |
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| 57 | static void cuda_dev_connection(ipc_callid_t, ipc_call_t *, void *);
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| 58 | static errno_t cuda_init(cuda_t *);
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| 59 | static void cuda_irq_handler(ipc_call_t *, void *);
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| 60 |
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| 61 | static void cuda_irq_listen(cuda_t *);
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| 62 | static void cuda_irq_receive(cuda_t *);
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| 63 | static void cuda_irq_rcv_end(cuda_t *, void *, size_t *);
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| 64 | static void cuda_irq_send_start(cuda_t *);
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| 65 | static void cuda_irq_send(cuda_t *);
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| 66 |
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| 67 | static void cuda_packet_handle(cuda_t *, uint8_t *, size_t);
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| 68 | static void cuda_send_start(cuda_t *);
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| 69 | static void cuda_autopoll_set(cuda_t *, bool);
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| 70 |
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| 71 | static void adb_packet_handle(cuda_t *, uint8_t *, size_t, bool);
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| 72 |
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| 73 | static irq_pio_range_t cuda_ranges[] = {
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| 74 | {
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| 75 | .base = 0,
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| 76 | .size = sizeof(cuda_regs_t)
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| 77 | }
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| 78 | };
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| 79 |
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| 80 | static irq_cmd_t cuda_cmds[] = {
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| 81 | {
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| 82 | .cmd = CMD_PIO_READ_8,
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| 83 | .addr = NULL,
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| 84 | .dstarg = 1
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| 85 | },
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| 86 | {
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| 87 | .cmd = CMD_AND,
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| 88 | .value = SR_INT,
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| 89 | .srcarg = 1,
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| 90 | .dstarg = 2
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| 91 | },
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| 92 | {
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| 93 | .cmd = CMD_PREDICATE,
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| 94 | .value = 1,
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| 95 | .srcarg = 2
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| 96 | },
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| 97 | {
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| 98 | .cmd = CMD_ACCEPT
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| 99 | }
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| 100 | };
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| 101 |
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| 102 |
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| 103 | static irq_code_t cuda_irq_code = {
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| 104 | sizeof(cuda_ranges) / sizeof(irq_pio_range_t),
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| 105 | cuda_ranges,
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| 106 | sizeof(cuda_cmds) / sizeof(irq_cmd_t),
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| 107 | cuda_cmds
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| 108 | };
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| 109 |
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| 110 | static errno_t cuda_dev_create(cuda_t *cuda, const char *name, const char *id,
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| 111 | adb_dev_t **rdev)
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| 112 | {
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| 113 | adb_dev_t *dev = NULL;
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| 114 | ddf_fun_t *fun;
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| 115 | errno_t rc;
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| 116 |
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| 117 | fun = ddf_fun_create(cuda->dev, fun_inner, name);
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| 118 | if (fun == NULL) {
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| 119 | ddf_msg(LVL_ERROR, "Failed creating function '%s'.", name);
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| 120 | rc = ENOMEM;
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| 121 | goto error;
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| 122 | }
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| 123 |
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| 124 | rc = ddf_fun_add_match_id(fun, id, 10);
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| 125 | if (rc != EOK) {
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| 126 | ddf_msg(LVL_ERROR, "Failed adding match ID.");
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| 127 | rc = ENOMEM;
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| 128 | goto error;
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| 129 | }
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| 130 |
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| 131 | dev = ddf_fun_data_alloc(fun, sizeof(adb_dev_t));
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| 132 | if (dev == NULL) {
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| 133 | ddf_msg(LVL_ERROR, "Failed allocating memory for '%s'.", name);
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| 134 | rc = ENOMEM;
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| 135 | goto error;
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| 136 | }
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| 137 |
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| 138 | dev->fun = fun;
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| 139 | list_append(&dev->lcuda, &cuda->devs);
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| 140 |
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| 141 | ddf_fun_set_conn_handler(fun, cuda_dev_connection);
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| 142 |
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| 143 | rc = ddf_fun_bind(fun);
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| 144 | if (rc != EOK) {
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| 145 | ddf_msg(LVL_ERROR, "Failed binding function '%s'.", name);
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| 146 | goto error;
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| 147 | }
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| 148 |
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| 149 | *rdev = dev;
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| 150 | return EOK;
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| 151 | error:
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| 152 | if (fun != NULL)
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| 153 | ddf_fun_destroy(fun);
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| 154 | return rc;
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| 155 | }
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| 156 |
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| 157 | errno_t cuda_add(cuda_t *cuda, cuda_res_t *res)
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| 158 | {
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| 159 | adb_dev_t *kbd = NULL;
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| 160 | adb_dev_t *mouse = NULL;
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| 161 | errno_t rc;
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| 162 |
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| 163 | cuda->phys_base = res->base;
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| 164 |
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| 165 | rc = cuda_dev_create(cuda, "kbd", "adb/keyboard", &kbd);
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| 166 | if (rc != EOK)
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| 167 | goto error;
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| 168 |
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| 169 | rc = cuda_dev_create(cuda, "mouse", "adb/mouse", &mouse);
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| 170 | if (rc != EOK)
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| 171 | goto error;
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| 172 |
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| 173 | cuda->addr_dev[2] = kbd;
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| 174 | cuda->addr_dev[8] = kbd;
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| 175 |
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| 176 | cuda->addr_dev[9] = mouse;
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| 177 |
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| 178 | rc = cuda_init(cuda);
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| 179 | if (rc != EOK) {
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| 180 | ddf_msg(LVL_ERROR, "Failed initializing CUDA hardware.");
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| 181 | return rc;
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| 182 | }
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| 183 |
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| 184 | return EOK;
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| 185 | error:
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| 186 | return rc;
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| 187 | }
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| 188 |
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| 189 | errno_t cuda_remove(cuda_t *cuda)
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| 190 | {
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| 191 | return ENOTSUP;
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| 192 | }
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| 193 |
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| 194 | errno_t cuda_gone(cuda_t *cuda)
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| 195 | {
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| 196 | return ENOTSUP;
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| 197 | }
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| 198 |
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| 199 | /** Device connection handler */
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| 200 | static void cuda_dev_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg)
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| 201 | {
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| 202 | adb_dev_t *dev = (adb_dev_t *) ddf_fun_data_get((ddf_fun_t *) arg);
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| 203 | ipc_callid_t callid;
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| 204 | ipc_call_t call;
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| 205 | sysarg_t method;
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| 206 |
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| 207 | /* Answer the IPC_M_CONNECT_ME_TO call. */
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| 208 | async_answer_0(iid, EOK);
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| 209 |
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| 210 | while (true) {
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| 211 | callid = async_get_call(&call);
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| 212 | method = IPC_GET_IMETHOD(call);
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| 213 |
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| 214 | if (!method) {
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| 215 | /* The other side has hung up. */
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| 216 | async_answer_0(callid, EOK);
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| 217 | return;
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| 218 | }
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| 219 |
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| 220 | async_sess_t *sess =
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| 221 | async_callback_receive_start(EXCHANGE_SERIALIZE, &call);
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| 222 | if (sess != NULL) {
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| 223 | dev->client_sess = sess;
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| 224 | async_answer_0(callid, EOK);
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| 225 | } else {
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| 226 | async_answer_0(callid, EINVAL);
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| 227 | }
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| 228 | }
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| 229 | }
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| 230 |
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| 231 | static errno_t cuda_init(cuda_t *cuda)
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| 232 | {
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| 233 | errno_t rc;
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| 234 |
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| 235 | void *vaddr;
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| 236 | rc = pio_enable((void *) cuda->phys_base, sizeof(cuda_regs_t),
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| 237 | &vaddr);
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| 238 | if (rc != EOK)
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| 239 | return rc;
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| 240 |
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| 241 | cuda->regs = vaddr;
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| 242 | cuda->xstate = cx_listen;
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| 243 | cuda->bidx = 0;
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| 244 | cuda->snd_bytes = 0;
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| 245 |
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| 246 | fibril_mutex_initialize(&cuda->dev_lock);
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| 247 |
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| 248 | /* Disable all interrupts from CUDA. */
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| 249 | pio_write_8(&cuda->regs->ier, IER_CLR | ALL_INT);
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| 250 |
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| 251 | cuda_irq_code.ranges[0].base = (uintptr_t) cuda->phys_base;
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| 252 | cuda_irq_code.cmds[0].addr = (void *) &((cuda_regs_t *)
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| 253 | cuda->phys_base)->ifr;
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| 254 | async_irq_subscribe(10, cuda_irq_handler, cuda, &cuda_irq_code, NULL);
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| 255 |
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| 256 | /* Enable SR interrupt. */
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| 257 | pio_write_8(&cuda->regs->ier, TIP | TREQ);
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| 258 | pio_write_8(&cuda->regs->ier, IER_SET | SR_INT);
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| 259 |
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| 260 | /* Enable ADB autopolling. */
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| 261 | cuda_autopoll_set(cuda, true);
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| 262 |
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| 263 | return EOK;
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| 264 | }
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| 265 |
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| 266 | static void cuda_irq_handler(ipc_call_t *call, void *arg)
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| 267 | {
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| 268 | uint8_t rbuf[CUDA_RCV_BUF_SIZE];
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| 269 | cuda_t *cuda = (cuda_t *)arg;
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| 270 | size_t len;
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| 271 | bool handle;
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| 272 |
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| 273 | handle = false;
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| 274 | len = 0;
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| 275 |
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| 276 | fibril_mutex_lock(&cuda->dev_lock);
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| 277 |
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| 278 | switch (cuda->xstate) {
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| 279 | case cx_listen:
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| 280 | cuda_irq_listen(cuda);
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| 281 | break;
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| 282 | case cx_receive:
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| 283 | cuda_irq_receive(cuda);
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| 284 | break;
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| 285 | case cx_rcv_end:
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| 286 | cuda_irq_rcv_end(cuda, rbuf, &len);
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| 287 | handle = true;
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| 288 | break;
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| 289 | case cx_send_start:
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| 290 | cuda_irq_send_start(cuda);
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| 291 | break;
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| 292 | case cx_send:
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| 293 | cuda_irq_send(cuda);
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| 294 | break;
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| 295 | }
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| 296 |
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| 297 | /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */
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| 298 | pio_write_8(&cuda->regs->ifr, SR_INT);
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| 299 |
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| 300 | fibril_mutex_unlock(&cuda->dev_lock);
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| 301 |
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| 302 | /* Handle an incoming packet. */
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| 303 | if (handle)
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| 304 | cuda_packet_handle(cuda, rbuf, len);
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| 305 | }
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| 306 |
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| 307 | /** Interrupt in listen state.
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| 308 | *
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| 309 | * Start packet reception.
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| 310 | *
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| 311 | * @param cuda CUDA instance
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| 312 | */
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| 313 | static void cuda_irq_listen(cuda_t *cuda)
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| 314 | {
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| 315 | uint8_t b = pio_read_8(&cuda->regs->b);
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| 316 |
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| 317 | if ((b & TREQ) != 0) {
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| 318 | ddf_msg(LVL_WARN, "cuda_irq_listen: no TREQ?!");
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| 319 | return;
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| 320 | }
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| 321 |
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| 322 | pio_write_8(&cuda->regs->b, b & ~TIP);
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| 323 | cuda->xstate = cx_receive;
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| 324 | }
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| 325 |
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| 326 | /** Interrupt in receive state.
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| 327 | *
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| 328 | * Receive next byte of packet.
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| 329 | *
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| 330 | * @param cuda CUDA instance
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| 331 | */
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| 332 | static void cuda_irq_receive(cuda_t *cuda)
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| 333 | {
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| 334 | uint8_t data = pio_read_8(&cuda->regs->sr);
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| 335 | if (cuda->bidx < CUDA_RCV_BUF_SIZE)
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| 336 | cuda->rcv_buf[cuda->bidx++] = data;
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| 337 |
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| 338 | uint8_t b = pio_read_8(&cuda->regs->b);
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| 339 |
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| 340 | if ((b & TREQ) == 0) {
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| 341 | pio_write_8(&cuda->regs->b, b ^ TACK);
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| 342 | } else {
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| 343 | pio_write_8(&cuda->regs->b, b | TACK | TIP);
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| 344 | cuda->xstate = cx_rcv_end;
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| 345 | }
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| 346 | }
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| 347 |
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| 348 | /** Interrupt in rcv_end state.
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| 349 | *
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| 350 | * Terminate packet reception. Either go back to listen state or start
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| 351 | * receiving another packet if CUDA has one for us.
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| 352 | *
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| 353 | * @param cuda CUDA instance
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| 354 | * @param buf Buffer for storing received packet
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| 355 | * @param len Place to store length of received packet
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| 356 | */
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| 357 | static void cuda_irq_rcv_end(cuda_t *cuda, void *buf, size_t *len)
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| 358 | {
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| 359 | uint8_t b = pio_read_8(&cuda->regs->b);
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| 360 |
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| 361 | if ((b & TREQ) == 0) {
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| 362 | cuda->xstate = cx_receive;
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| 363 | pio_write_8(&cuda->regs->b, b & ~TIP);
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| 364 | } else {
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| 365 | cuda->xstate = cx_listen;
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| 366 | cuda_send_start(cuda);
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| 367 | }
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| 368 |
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| 369 | memcpy(buf, cuda->rcv_buf, cuda->bidx);
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| 370 | *len = cuda->bidx;
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| 371 | cuda->bidx = 0;
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| 372 | }
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| 373 |
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| 374 | /** Interrupt in send_start state.
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| 375 | *
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| 376 | * Process result of sending first byte (and send second on success).
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| 377 | *
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| 378 | * @param cuda CUDA instance
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| 379 | */
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| 380 | static void cuda_irq_send_start(cuda_t *cuda)
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| 381 | {
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| 382 | uint8_t b;
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| 383 |
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| 384 | b = pio_read_8(&cuda->regs->b);
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| 385 |
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| 386 | if ((b & TREQ) == 0) {
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| 387 | /* Collision */
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| 388 | pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) &
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| 389 | ~SR_OUT);
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| 390 | pio_read_8(&cuda->regs->sr);
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| 391 | pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) |
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| 392 | TIP | TACK);
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| 393 | cuda->xstate = cx_listen;
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| 394 | return;
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| 395 | }
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| 396 |
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| 397 | pio_write_8(&cuda->regs->sr, cuda->snd_buf[1]);
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| 398 | pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK);
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| 399 | cuda->bidx = 2;
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| 400 |
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| 401 | cuda->xstate = cx_send;
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| 402 | }
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| 403 |
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| 404 | /** Interrupt in send state.
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| 405 | *
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| 406 | * Send next byte or terminate transmission.
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| 407 | *
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| 408 | * @param cuda CUDA instance
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| 409 | */
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| 410 | static void cuda_irq_send(cuda_t *cuda)
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| 411 | {
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| 412 | if (cuda->bidx < cuda->snd_bytes) {
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| 413 | /* Send next byte. */
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| 414 | pio_write_8(&cuda->regs->sr,
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| 415 | cuda->snd_buf[cuda->bidx++]);
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| 416 | pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK);
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| 417 | return;
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| 418 | }
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| 419 |
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| 420 | /* End transfer. */
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| 421 | cuda->snd_bytes = 0;
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| 422 | cuda->bidx = 0;
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| 423 |
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| 424 | pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) & ~SR_OUT);
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| 425 | pio_read_8(&cuda->regs->sr);
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| 426 | pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) | TACK | TIP);
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| 427 |
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| 428 | cuda->xstate = cx_listen;
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| 429 | /* TODO: Match reply with request. */
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| 430 | }
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| 431 |
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| 432 | static void cuda_packet_handle(cuda_t *cuda, uint8_t *data, size_t len)
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| 433 | {
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| 434 | if (data[0] != PT_ADB)
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| 435 | return;
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| 436 | if (len < 2)
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| 437 | return;
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| 438 |
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| 439 | adb_packet_handle(cuda, data + 2, len - 2, (data[1] & 0x40) != 0);
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| 440 | }
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| 441 |
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| 442 | static void adb_packet_handle(cuda_t *cuda, uint8_t *data, size_t size,
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| 443 | bool autopoll)
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| 444 | {
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| 445 | uint8_t dev_addr;
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| 446 | uint8_t reg_no;
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| 447 | uint16_t reg_val;
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| 448 | adb_dev_t *dev;
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| 449 | unsigned i;
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|---|
| 450 |
|
|---|
| 451 | dev_addr = data[0] >> 4;
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|---|
| 452 | reg_no = data[0] & 0x03;
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| 453 |
|
|---|
| 454 | if (size != 3) {
|
|---|
| 455 | ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size);
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|---|
| 456 | for (i = 0; i < size; ++i) {
|
|---|
| 457 | ddf_msg(LVL_WARN, " 0x%02x", data[i]);
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|---|
| 458 | }
|
|---|
| 459 | return;
|
|---|
| 460 | }
|
|---|
| 461 |
|
|---|
| 462 | if (reg_no != 0) {
|
|---|
| 463 | ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size);
|
|---|
| 464 | for (i = 0; i < size; ++i) {
|
|---|
| 465 | ddf_msg(LVL_WARN, " 0x%02x", data[i]);
|
|---|
| 466 | }
|
|---|
| 467 | return;
|
|---|
| 468 | }
|
|---|
| 469 |
|
|---|
| 470 | reg_val = ((uint16_t) data[1] << 8) | (uint16_t) data[2];
|
|---|
| 471 |
|
|---|
| 472 | ddf_msg(LVL_DEBUG, "Received ADB packet for device address %d",
|
|---|
| 473 | dev_addr);
|
|---|
| 474 | dev = cuda->addr_dev[dev_addr];
|
|---|
| 475 | if (dev == NULL)
|
|---|
| 476 | return;
|
|---|
| 477 |
|
|---|
| 478 | async_exch_t *exch = async_exchange_begin(dev->client_sess);
|
|---|
| 479 | async_msg_1(exch, ADB_REG_NOTIF, reg_val);
|
|---|
| 480 | async_exchange_end(exch);
|
|---|
| 481 | }
|
|---|
| 482 |
|
|---|
| 483 | static void cuda_autopoll_set(cuda_t *cuda, bool enable)
|
|---|
| 484 | {
|
|---|
| 485 | cuda->snd_buf[0] = PT_CUDA;
|
|---|
| 486 | cuda->snd_buf[1] = CPT_AUTOPOLL;
|
|---|
| 487 | cuda->snd_buf[2] = enable ? 0x01 : 0x00;
|
|---|
| 488 | cuda->snd_bytes = 3;
|
|---|
| 489 | cuda->bidx = 0;
|
|---|
| 490 |
|
|---|
| 491 | cuda_send_start(cuda);
|
|---|
| 492 | }
|
|---|
| 493 |
|
|---|
| 494 | static void cuda_send_start(cuda_t *cuda)
|
|---|
| 495 | {
|
|---|
| 496 | assert(cuda->xstate == cx_listen);
|
|---|
| 497 |
|
|---|
| 498 | if (cuda->snd_bytes == 0)
|
|---|
| 499 | return;
|
|---|
| 500 |
|
|---|
| 501 | /* Check for incoming data. */
|
|---|
| 502 | if ((pio_read_8(&cuda->regs->b) & TREQ) == 0)
|
|---|
| 503 | return;
|
|---|
| 504 |
|
|---|
| 505 | pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) | SR_OUT);
|
|---|
| 506 | pio_write_8(&cuda->regs->sr, cuda->snd_buf[0]);
|
|---|
| 507 | pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) & ~TIP);
|
|---|
| 508 |
|
|---|
| 509 | cuda->xstate = cx_send_start;
|
|---|
| 510 | }
|
|---|
| 511 |
|
|---|
| 512 | /** @}
|
|---|
| 513 | */
|
|---|