| 1 | /*
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| 2 | * Copyright (c) 2009 Jiri Svoboda
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup bd
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| 30 | * @{
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| 31 | */
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| 32 | /** @file ATA driver definitions.
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| 33 | */
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| 34 |
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| 35 | #ifndef __ATA_BD_H__
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| 36 | #define __ATA_BD_H__
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| 37 |
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| 38 | #include <async.h>
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| 39 | #include <bd_srv.h>
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| 40 | #include <ddf/driver.h>
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| 41 | #include <sys/types.h>
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| 42 | #include <fibril_synch.h>
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| 43 | #include <str.h>
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| 44 | #include "ata_hw.h"
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| 45 |
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| 46 | #define NAME "ata_bd"
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| 47 |
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| 48 | /** Base addresses for ATA I/O blocks. */
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| 49 | typedef struct {
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| 50 | uintptr_t cmd; /**< Command block base address. */
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| 51 | uintptr_t ctl; /**< Control block base address. */
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| 52 | } ata_base_t;
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| 53 |
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| 54 | /** Timeout definitions. Unit is 10 ms. */
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| 55 | enum ata_timeout {
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| 56 | TIMEOUT_PROBE = 100, /* 1 s */
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| 57 | TIMEOUT_BSY = 100, /* 1 s */
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| 58 | TIMEOUT_DRDY = 1000 /* 10 s */
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| 59 | };
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| 60 |
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| 61 | enum ata_dev_type {
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| 62 | ata_reg_dev, /* Register device (no packet feature set support) */
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| 63 | ata_pkt_dev /* Packet device (supports packet feature set). */
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| 64 | };
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| 65 |
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| 66 | /** Register device block addressing mode. */
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| 67 | enum rd_addr_mode {
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| 68 | am_chs, /**< CHS block addressing */
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| 69 | am_lba28, /**< LBA-28 block addressing */
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| 70 | am_lba48 /**< LBA-48 block addressing */
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| 71 | };
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| 72 |
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| 73 | /** Block coordinates */
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| 74 | typedef struct {
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| 75 | enum rd_addr_mode amode;
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| 76 |
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| 77 | union {
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| 78 | /** CHS coordinates */
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| 79 | struct {
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| 80 | uint8_t sector;
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| 81 | uint8_t cyl_lo;
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| 82 | uint8_t cyl_hi;
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| 83 | };
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| 84 | /** LBA coordinates */
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| 85 | struct {
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| 86 | uint8_t c0;
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| 87 | uint8_t c1;
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| 88 | uint8_t c2;
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| 89 | uint8_t c3;
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| 90 | uint8_t c4;
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| 91 | uint8_t c5;
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| 92 | };
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| 93 | };
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| 94 |
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| 95 | /** Lower 4 bits for device/head register */
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| 96 | uint8_t h;
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| 97 | } block_coord_t;
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| 98 |
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| 99 | /** ATA device state structure. */
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| 100 | typedef struct {
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| 101 | bool present;
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| 102 | struct ata_ctrl *ctrl;
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| 103 | struct ata_fun *afun;
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| 104 |
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| 105 | /** Device type */
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| 106 | enum ata_dev_type dev_type;
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| 107 |
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| 108 | /** Addressing mode to use (if register device) */
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| 109 | enum rd_addr_mode amode;
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| 110 |
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| 111 | /*
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| 112 | * Geometry. Only valid if operating in CHS mode.
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| 113 | */
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| 114 | struct {
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| 115 | unsigned heads;
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| 116 | unsigned cylinders;
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| 117 | unsigned sectors;
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| 118 | } geom;
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| 119 |
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| 120 | uint64_t blocks;
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| 121 | size_t block_size;
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| 122 |
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| 123 | char model[STR_BOUNDS(40) + 1];
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| 124 |
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| 125 | int disk_id;
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| 126 | } disk_t;
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| 127 |
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| 128 | /** ATA controller */
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| 129 | typedef struct ata_ctrl {
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| 130 | /** DDF device */
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| 131 | ddf_dev_t *dev;
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| 132 | /** I/O base address of the command registers */
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| 133 | uintptr_t cmd_physical;
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| 134 | /** I/O base address of the control registers */
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| 135 | uintptr_t ctl_physical;
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| 136 |
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| 137 | /** Command registers */
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| 138 | ata_cmd_t *cmd;
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| 139 | /** Control registers */
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| 140 | ata_ctl_t *ctl;
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| 141 |
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| 142 | /** Per-disk state. */
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| 143 | disk_t disk[MAX_DISKS];
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| 144 |
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| 145 | fibril_mutex_t lock;
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| 146 | } ata_ctrl_t;
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| 147 |
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| 148 | typedef struct ata_fun {
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| 149 | ddf_fun_t *fun;
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| 150 | disk_t *disk;
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| 151 | bd_srvs_t bds;
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| 152 | } ata_fun_t;
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| 153 |
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| 154 | extern int ata_ctrl_init(ata_ctrl_t *, ata_base_t *);
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| 155 | extern int ata_ctrl_remove(ata_ctrl_t *);
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| 156 | extern int ata_ctrl_gone(ata_ctrl_t *);
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| 157 |
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| 158 | extern bd_ops_t ata_bd_ops;
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| 159 |
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| 160 | #endif
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| 161 |
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| 162 | /** @}
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| 163 | */
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