source: mainline/uspace/drv/block/ahci/ahci_sata.h@ 730dce77

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 730dce77 was 730dce77, checked in by Martin Decky <martin@…>, 13 years ago

get rid of the packed structure attribute (there should be no unwanted padding present)
this fixes compilation for arm32
  • Property mode set to 100644
File size: 7.0 KB
Line 
1/*
2 * Copyright (c) 2012 Petr Jerman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file
30 * Header for AHCI driver (SATA/ATA and related things).
31 */
32
33#ifndef __AHCI_SATA_H__
34#define __AHCI_SATA_H__
35
36#include <sys/types.h>
37
38/** Standard Command frame. */
39typedef struct {
40 /** FIS type - always 0x27. */
41 unsigned int fis_type : 8;
42 /** Indicate that FIS is a Command - always 0x80. */
43 unsigned int c : 8;
44 /** Command - Identity device - 0xec, Set fetures - 0xef. */
45 unsigned int command : 8;
46 /** Features - subcommand for set features - set tranfer mode - 0x03. */
47 unsigned int features : 8;
48 /** 0:23 bits of LBA. */
49 unsigned int lba_lower : 24;
50 /** Device. */
51 unsigned int device : 8;
52 /** 24:47 bits of LBA. */
53 unsigned int lba_upper : 24;
54 /** Features - subcommand for set features - set tranfer mode - 0x03. */
55 unsigned int features_upper : 8;
56 /** Sector count - transfer mode for set transfer mode operation. */
57 unsigned int count : 16;
58 /** Reserved. */
59 unsigned int reserved1 : 8;
60 /** Control. */
61 unsigned int control : 8;
62 /** Reserved. */
63 unsigned int reserved2 : 32;
64} std_command_frame_t;
65
66/** Command frame for NCQ data operation. */
67typedef struct {
68 /** FIS type - always 0x27. */
69 uint8_t fis_type;
70 /** Indicate that FIS is a Command - always 0x80. */
71 uint8_t c;
72 /** Command - FPDMA Read - 0x60, FPDMA Write - 0x61. */
73 uint8_t command;
74 /** bits 7:0 of sector count. */
75 uint8_t sector_count_low;
76 /** bits 7:0 of lba. */
77 uint8_t lba0;
78 /** bits 15:8 of lba. */
79 uint8_t lba1;
80 /** bits 23:16 of lba. */
81 uint8_t lba2;
82 uint8_t fua;
83 /** bits 31:24 of lba. */
84 uint8_t lba3;
85 /** bits 39:32 of lba. */
86 uint8_t lba4;
87 /** bits 47:40 of lba. */
88 uint8_t lba5;
89 /** bits 15:8 of sector count. */
90 uint8_t sector_count_high;
91 /** Tag number of NCQ operation. */
92 uint8_t tag;
93 /** Reserved. */
94 uint8_t reserved1;
95 /** Reserved. */
96 uint8_t reserved2;
97 /** Control. */
98 uint8_t control;
99 /** Reserved. */
100 uint8_t reserved3;
101 /** Reserved. */
102 uint8_t reserved4;
103 /** Reserved. */
104 uint8_t reserved5;
105 /** Reserved. */
106 uint8_t reserved6;
107} ncq_command_frame_t;
108
109/** Data returned from identify device and identify packet device command. */
110typedef struct {
111 uint16_t gen_conf;
112 uint16_t cylinders;
113 uint16_t reserved2;
114 uint16_t heads;
115 uint16_t _vs4;
116 uint16_t _vs5;
117 uint16_t sectors;
118 uint16_t _vs7;
119 uint16_t _vs8;
120 uint16_t _vs9;
121
122 uint16_t serial_number[10];
123 uint16_t _vs20;
124 uint16_t _vs21;
125 uint16_t vs_bytes;
126 uint16_t firmware_rev[4];
127 uint16_t model_name[20];
128
129 uint16_t max_rw_multiple;
130 uint16_t reserved48;
131 /** Different meaning for packet device. */
132 uint16_t caps;
133 uint16_t reserved50;
134 uint16_t pio_timing;
135 uint16_t dma_timing;
136
137 uint16_t validity;
138 uint16_t cur_cyl;
139 uint16_t cur_heads;
140 uint16_t cur_sectors;
141 uint16_t cur_capacity0;
142 uint16_t cur_capacity1;
143 uint16_t mss;
144 uint16_t total_lba28_0;
145 uint16_t total_lba28_1;
146 uint16_t sw_dma;
147 uint16_t mw_dma;
148 uint16_t pio_modes;
149 uint16_t min_mw_dma_cycle;
150 uint16_t rec_mw_dma_cycle;
151 uint16_t min_raw_pio_cycle;
152 uint16_t min_iordy_pio_cycle;
153
154 uint16_t reserved69;
155 uint16_t reserved70;
156 uint16_t reserved71;
157 uint16_t reserved72;
158 uint16_t reserved73;
159 uint16_t reserved74;
160
161 uint16_t queue_depth;
162 /** SATA capatibilities - different meaning for packet device. */
163 uint16_t sata_cap;
164 /** SATA additional capatibilities - different meaning for packet device. */
165 uint16_t sata_cap2;
166 uint16_t reserved78[1 + 79 - 78];
167 uint16_t version_maj;
168 uint16_t version_min;
169 uint16_t cmd_set0;
170 uint16_t cmd_set1;
171 uint16_t csf_sup_ext;
172 uint16_t csf_enabled0;
173 uint16_t csf_enabled1;
174 uint16_t csf_default;
175 uint16_t udma;
176
177 uint16_t reserved89[1 + 99 - 89];
178
179 /* Total number of blocks in LBA-48 addressing. */
180 uint16_t total_lba48_0;
181 uint16_t total_lba48_1;
182 uint16_t total_lba48_2;
183 uint16_t total_lba48_3;
184
185 /* Note: more fields are defined in ATA/ATAPI-7. */
186 uint16_t reserved104[1 + 127 - 104];
187 uint16_t _vs128[1 + 159 - 128];
188 uint16_t reserved160[1 + 255 - 160];
189} identify_data_t;
190
191/** Capability bits for register device. */
192enum ata_regdev_caps {
193 rd_cap_iordy = 0x0800,
194 rd_cap_iordy_cbd = 0x0400,
195 rd_cap_lba = 0x0200,
196 rd_cap_dma = 0x0100
197};
198
199/** Bits of @c identify_data_t.cmd_set1. */
200enum ata_cs1 {
201 /** 48-bit address feature set. */
202 cs1_addr48 = 0x0400
203};
204
205/** SATA capatibilities for not packet device - Serial ATA revision 3_1. */
206enum sata_np_cap {
207 /** Supports READ LOG DMA EXT. */
208 np_cap_log_ext = 0x8000,
209 /** Supports Device Automatic Partial to Slumber transitions. */
210 np_cap_dev_slm = 0x4000,
211 /** Supports Host Automatic Partial to Slumber transitions. */
212 np_cap_host_slm = 0x2000,
213 /** Supports NCQ priority information. */
214 np_cap_ncq_prio = 0x1000,
215 /** Supports Unload while NCQ command outstanding. */
216 np_cap_unload_ncq = 0x0800,
217 /** Supports Phy event counters. */
218 np_cap_phy_ctx = 0x0400,
219 /** Supports recepits of host-initiated interface power management. */
220 np_cap_host_pmngmnt = 0x0200,
221
222 /** Supports NCQ. */
223 np_cap_ncq = 0x0100,
224
225 /** Supports SATA 3. */
226 np_cap_sata_3 = 0x0008,
227 /** Supports SATA 2. */
228 np_cap_sata_2 = 0x0004,
229 /** Supports SATA 1. */
230 np_cap_sata_1 = 0x0002
231};
232
233/** SATA capatibilities for packet device - Serial ATA revision 3_1. */
234enum sata_pt_cap {
235 /** Supports READ LOG DMA EXT. */
236 pt_cap_log_ext = 0x8000,
237 /** Supports Device Automatic Partial to Slumber transitions. */
238 pt_cap_dev_slm = 0x4000,
239 /** Supports Host Automatic Partial to Slumber transitions. */
240 pt_cap_host_slm = 0x2000,
241 /** Supports Phy event counters. */
242 pt_cap_phy_ctx = 0x0400,
243 /** Supports recepits of host-initiated interface power management. */
244 pt_cap_host_pmngmnt = 0x0200,
245
246 /** Supports SATA 3. */
247 pt_cap_sat_3 = 0x0008,
248 /** Supports SATA 2. */
249 pt_cap_sat_2 = 0x0004,
250 /** Supports SATA 1. */
251 pt_cap_sat_1 = 0x0002
252};
253
254#endif
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