source: mainline/uspace/drv/audio/sb16/dsp.c@ d86c9736

lfn serial ticket/834-toolchain-update topic/fix-logger-deadlock topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d86c9736 was d86c9736, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

Rename record → capture.

  • Property mode set to 100644
File size: 11.7 KB
RevLine 
[763444e]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvaudiosb16
29 * @{
30 */
31/** @file
32 * @brief DSP helper functions implementation
33 */
34
[c5cbc1b7]35#include <as.h>
[1240bb9]36#include <bool.h>
[c5cbc1b7]37#include <ddi.h>
[c885a21]38#include <devman.h>
39#include <device/hw_res.h>
[763444e]40#include <libarch/ddi.h>
[0b4f060]41#include <libarch/barrier.h>
[01aef43]42#include <str_error.h>
[1240bb9]43#include <audio_pcm_iface.h>
[0f2e7c1]44
[bf38143]45#include "ddf_log.h"
46#include "dsp_commands.h"
[763444e]47#include "dsp.h"
48
[c5cbc1b7]49/* Maximum allowed transfer size for ISA DMA transfers is 64kB */
50#define MAX_BUFFER_SIZE (4 * 1024) // use 4kB for now
[bf38143]51
52#ifndef DSP_RETRY_COUNT
53#define DSP_RETRY_COUNT 100
54#endif
55
56#define DSP_RESET_RESPONSE 0xaa
[b7c080c]57#define DSP_RATE_LIMIT 45000
[bf38143]58
[5984107]59#define AUTO_DMA_MODE
60
[bf38143]61static inline int sb_dsp_read(sb_dsp_t *dsp, uint8_t *data)
62{
63 assert(data);
64 assert(dsp);
65 uint8_t status;
66 size_t attempts = DSP_RETRY_COUNT;
67 do {
68 status = pio_read_8(&dsp->regs->dsp_read_status);
69 } while (--attempts && ((status & DSP_READ_READY) == 0));
70
71 if ((status & DSP_READ_READY) == 0)
72 return EIO;
73
74 *data = pio_read_8(&dsp->regs->dsp_data_read);
75 return EOK;
76}
[e941bf8]77
[bf38143]78static inline int sb_dsp_write(sb_dsp_t *dsp, uint8_t data)
79{
80 assert(dsp);
81 uint8_t status;
82 size_t attempts = DSP_RETRY_COUNT;
83 do {
84 status = pio_read_8(&dsp->regs->dsp_write);
85 } while (--attempts && ((status & DSP_WRITE_BUSY) != 0));
86
87 if ((status & DSP_WRITE_BUSY))
88 return EIO;
89
90 pio_write_8(&dsp->regs->dsp_write, data);
91 return EOK;
92}
[e941bf8]93
[bf38143]94static inline void sb_dsp_reset(sb_dsp_t *dsp)
95{
96 assert(dsp);
97 /* Reset DSP, see Chapter 2 of Sound Blaster HW programming guide */
98 pio_write_8(&dsp->regs->dsp_reset, 1);
99 udelay(3); /* Keep reset for 3 us */
100 pio_write_8(&dsp->regs->dsp_reset, 0);
101}
[e941bf8]102
[ad42844]103static inline void sb_dsp_start_active(sb_dsp_t *dsp, uint8_t command)
104{
105 sb_dsp_write(dsp, command);
106 sb_dsp_write(dsp, dsp->active.mode);
107 sb_dsp_write(dsp, (dsp->active.samples - 1) & 0xff);
108 sb_dsp_write(dsp, (dsp->active.samples - 1) >> 8);
109}
110
111static inline void sb_dsp_set_sampling_rate(sb_dsp_t *dsp, unsigned rate)
112{
113 sb_dsp_write(dsp, SET_SAMPLING_RATE_OUTPUT);
114 sb_dsp_write(dsp, rate >> 8);
115 sb_dsp_write(dsp, rate & 0xff);
116 ddf_log_verbose("Sampling rate: %hhx:%hhx.", rate >> 8, rate & 0xff);
117}
118
[c885a21]119static inline int sb_setup_dma(sb_dsp_t *dsp, uintptr_t pa, size_t size)
120{
121 async_sess_t *sess = devman_parent_device_connect(EXCHANGE_ATOMIC,
122 dsp->sb_dev->handle, IPC_FLAG_BLOCKING);
123
124 const int ret = hw_res_dma_channel_setup(sess,
125 dsp->dma16_channel, pa, size,
126 DMA_MODE_READ | DMA_MODE_AUTO | DMA_MODE_ON_DEMAND);
[c5cbc1b7]127
[c885a21]128 async_hangup(sess);
129 return ret;
130}
[e941bf8]131
[00006e0]132static inline int sb_setup_buffer(sb_dsp_t *dsp, size_t size)
[01aef43]133{
134 assert(dsp);
[9b3d999]135 if (size > MAX_BUFFER_SIZE || size == 0 || (size % 2) == 1)
136 size = MAX_BUFFER_SIZE;
[c5cbc1b7]137 void *buffer = NULL, *pa = NULL;
138 int ret = dmamem_map_anonymous(size, AS_AREA_WRITE | AS_AREA_READ,
139 0, &pa, &buffer);
140 if (ret != EOK) {
[124f9bd]141 ddf_log_error("Failed to allocate DMA buffer.");
[f14e6ea]142 return ENOMEM;
143 }
144
[c5cbc1b7]145 ddf_log_verbose("Setup dma buffer at %p(%p).", buffer, pa, size);
146 assert((uintptr_t)pa < (1 << 25));
[9b3d999]147
[c5cbc1b7]148 /* Setup 16 bit channel */
149 ret = sb_setup_dma(dsp, (uintptr_t)pa, size);
[01aef43]150 if (ret == EOK) {
[dce7e41]151 dsp->buffer.data = buffer;
[00006e0]152 dsp->buffer.size = size;
[01aef43]153 } else {
[124f9bd]154 ddf_log_error("Failed to setup DMA16 channel: %s.",
[01aef43]155 str_error(ret));
[c5cbc1b7]156 dmamem_unmap_anonymous(buffer);
[01aef43]157 }
158 return ret;
159}
[e941bf8]160
[7257eea6]161static inline void sb_clear_buffer(sb_dsp_t *dsp)
162{
[c5cbc1b7]163 assert(dsp);
164 dmamem_unmap_anonymous(dsp->buffer.data);
[dce7e41]165 dsp->buffer.data = NULL;
166 dsp->buffer.size = 0;
[7257eea6]167}
[e941bf8]168
[346643c]169static inline size_t sample_count(pcm_sample_format_t format, size_t byte_count)
[0b4f060]170{
[346643c]171 return byte_count / pcm_sample_format_size(format);
[0b4f060]172}
[e941bf8]173
[c885a21]174int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs, ddf_dev_t *dev,
175 int dma8, int dma16)
[bf38143]176{
177 assert(dsp);
178 dsp->regs = regs;
[c885a21]179 dsp->dma8_channel = dma8;
180 dsp->dma16_channel = dma16;
[7ca22e5]181 dsp->event_session = NULL;
182 dsp->event_exchange = NULL;
[c885a21]183 dsp->sb_dev = dev;
[1240bb9]184 dsp->status = DSP_STOPPED;
[ff396ea]185 dsp->ignore_interrupts = false;
[bf38143]186 sb_dsp_reset(dsp);
187 /* "DSP takes about 100 microseconds to initialize itself" */
188 udelay(100);
189 uint8_t response;
190 const int ret = sb_dsp_read(dsp, &response);
191 if (ret != EOK) {
[124f9bd]192 ddf_log_error("Failed to read DSP reset response value.");
[bf38143]193 return ret;
194 }
195 if (response != DSP_RESET_RESPONSE) {
[124f9bd]196 ddf_log_error("Invalid DSP reset response: %x.", response);
[bf38143]197 return EIO;
198 }
199
200 /* Get DSP version number */
201 sb_dsp_write(dsp, DSP_VERSION);
202 sb_dsp_read(dsp, &dsp->version.major);
203 sb_dsp_read(dsp, &dsp->version.minor);
[01aef43]204
205 return ret;
[bf38143]206}
[e941bf8]207
[f14e6ea]208void sb_dsp_interrupt(sb_dsp_t *dsp)
209{
[bf38143]210 assert(dsp);
[ff396ea]211
212#ifndef AUTO_DMA_MODE
213 if (dsp->status == DSP_PLAYBACK) {
[ad42844]214 sb_dsp_start_active(dsp, SINGLE_DMA_16B_DA);
[ff396ea]215 }
216
[d86c9736]217 if (dsp->status == DSP_CAPTURE) {
[ad42844]218 sb_dsp_start_active(dsp, SINGLE_DMA_16B_AD);
[ff396ea]219 }
220#endif
221
222 if (dsp->ignore_interrupts)
223 return;
224
[57e8b3b]225 dsp->active.frame_count +=
226 dsp->active.samples / ((dsp->active.mode & DSP_MODE_STEREO) ? 2 : 1);
227
[7ca22e5]228 if (dsp->event_exchange) {
[1240bb9]229 switch (dsp->status) {
230 case DSP_PLAYBACK:
[57e8b3b]231 async_msg_1(dsp->event_exchange,
232 PCM_EVENT_FRAMES_PLAYED, dsp->active.frame_count);
[1240bb9]233 break;
[d86c9736]234 case DSP_CAPTURE:
[57e8b3b]235 async_msg_1(dsp->event_exchange,
[d86c9736]236 PCM_EVENT_FRAMES_CAPTURED, dsp->active.frame_count);
[1240bb9]237 break;
238 default:
239 case DSP_STOPPED:
240 ddf_log_warning("Interrupt while DSP stopped and "
241 "event exchange present. Terminating exchange");
242 async_exchange_end(dsp->event_exchange);
243 dsp->event_exchange = NULL;
244 }
[7ca22e5]245 } else {
246 ddf_log_warning("Interrupt with no event consumer.");
247 }
[01aef43]248}
[e941bf8]249
[f0241bda]250unsigned sb_dsp_query_cap(sb_dsp_t *dsp, audio_cap_t cap)
251{
252 switch(cap) {
[d86c9736]253 case AUDIO_CAP_CAPTURE:
[f0241bda]254 case AUDIO_CAP_PLAYBACK:
255 case AUDIO_CAP_INTERRUPT:
256 return 1;
257 case AUDIO_CAP_MAX_BUFFER:
258 return MAX_BUFFER_SIZE;
259 case AUDIO_CAP_INTERRUPT_MIN_FRAMES:
260 return 1;
261 case AUDIO_CAP_INTERRUPT_MAX_FRAMES:
262 return 16535;
263 case AUDIO_CAP_BUFFER_POS:
264 default:
265 return 0;
266 }
267}
268
[b7c080c]269int sb_dsp_test_format(sb_dsp_t *dsp, unsigned *channels, unsigned *rate,
270 pcm_sample_format_t *format)
271{
272 int ret = EOK;
273 if (*channels == 0 || *channels > 2) {
274 *channels = 2;
275 ret = ELIMIT;
276 }
277 if (*rate > DSP_RATE_LIMIT) {
278 *rate = DSP_RATE_LIMIT;
279 ret = ELIMIT;
280 }
281 //TODO 8bit DMA supports 8bit formats
282 if (*format != PCM_SAMPLE_SINT16_LE && *format != PCM_SAMPLE_UINT16_LE) {
283 *format = pcm_sample_format_is_signed(*format) ?
284 PCM_SAMPLE_SINT16_LE : PCM_SAMPLE_UINT16_LE;
285 ret = ELIMIT;
286 }
287 return ret;
288}
289
[b497018]290int sb_dsp_get_buffer(sb_dsp_t *dsp, void **buffer, size_t *size)
[43dec08]291{
292 assert(dsp);
[00006e0]293 assert(size);
294
[7ca22e5]295 /* buffer is already setup by for someone, refuse to work until
296 * it's released */
297 if (dsp->buffer.data)
298 return EBUSY;
299
[00006e0]300 const int ret = sb_setup_buffer(dsp, *size);
[124f9bd]301 if (ret == EOK) {
[b497018]302 ddf_log_debug("Providing buffer: %p, %zu B.",
303 dsp->buffer.data, dsp->buffer.size);
[00006e0]304
[124f9bd]305 if (buffer)
306 *buffer = dsp->buffer.data;
307 if (size)
308 *size = dsp->buffer.size;
309 }
[43dec08]310 return ret;
311}
[7ca22e5]312
[b497018]313int sb_dsp_set_event_session(sb_dsp_t *dsp, async_sess_t *session)
[7ca22e5]314{
315 assert(dsp);
316 assert(session);
317 if (dsp->event_session)
318 return EBUSY;
319 dsp->event_session = session;
[124f9bd]320 ddf_log_debug("Set event session.");
[7ca22e5]321 return EOK;
322}
[e941bf8]323
[b497018]324int sb_dsp_release_buffer(sb_dsp_t *dsp)
[43dec08]325{
326 assert(dsp);
327 sb_clear_buffer(dsp);
[9b3d999]328 async_exchange_end(dsp->event_exchange);
[7ca22e5]329 dsp->event_exchange = NULL;
330 if (dsp->event_session)
331 async_hangup(dsp->event_session);
332 dsp->event_session = NULL;
[124f9bd]333 ddf_log_debug("DSP buffer released.");
[43dec08]334 return EOK;
335}
[e941bf8]336
[57e8b3b]337int sb_dsp_start_playback(sb_dsp_t *dsp, unsigned frames,
[346643c]338 unsigned channels, unsigned sampling_rate, pcm_sample_format_t format)
[43dec08]339{
340 assert(dsp);
341
[d758301]342 if (!dsp->buffer.data)
[7ca22e5]343 return EINVAL;
344
[43dec08]345 /* Check supported parameters */
[57e8b3b]346 ddf_log_debug("Requested playback: %u frames, %uHz, %s, %u channel(s).",
347 frames, sampling_rate, pcm_sample_format_str(format), channels);
[d2765ab3]348 if (sb_dsp_test_format(dsp, &channels, &sampling_rate, &format) != EOK)
[346643c]349 return ENOTSUP;
[43dec08]350
[ff396ea]351 /* Client requested regular interrupts */
352 if (frames) {
[d758301]353 if (!dsp->event_session)
354 return EINVAL;
[ff396ea]355 dsp->event_exchange = async_exchange_begin(dsp->event_session);
356 if (!dsp->event_exchange)
357 return ENOMEM;
358 dsp->ignore_interrupts = false;
359 }
[43dec08]360
[57e8b3b]361 dsp->active.mode = 0
[ad42844]362 | (pcm_sample_format_is_signed(format) ? DSP_MODE_SIGNED : 0)
[57e8b3b]363 | (channels == 2 ? DSP_MODE_STEREO : 0);
364 dsp->active.samples = frames * channels;
365 dsp->active.frame_count = 0;
[43dec08]366
[ad42844]367 sb_dsp_set_sampling_rate(dsp, sampling_rate);
368
369#ifdef AUTO_DMA_MODE
370 sb_dsp_start_active(dsp, AUTO_DMA_16B_DA_FIFO);
371#else
372 sb_dsp_start_active(dsp, SINGLE_DMA_16B_DA);
373#endif
[43dec08]374
[9b3d999]375 ddf_log_verbose("Playback started, interrupt every %u samples "
[a3ab774]376 "(~1/%u sec)", dsp->active.samples,
[346643c]377 sampling_rate / (dsp->active.samples * channels));
[a3ab774]378
[1240bb9]379 dsp->status = DSP_PLAYBACK;
[9b3d999]380
[43dec08]381 return EOK;
382}
[e941bf8]383
[b497018]384int sb_dsp_stop_playback(sb_dsp_t *dsp)
[43dec08]385{
386 assert(dsp);
387 sb_dsp_write(dsp, DMA_16B_EXIT);
[b497018]388 ddf_log_debug("Stopping playback on buffer.");
[1240bb9]389 async_msg_0(dsp->event_exchange, PCM_EVENT_PLAYBACK_TERMINATED);
390 async_exchange_end(dsp->event_exchange);
391 dsp->event_exchange = NULL;
[43dec08]392 return EOK;
393}
[e941bf8]394
[d86c9736]395int sb_dsp_start_capture(sb_dsp_t *dsp, unsigned frames,
[346643c]396 unsigned channels, unsigned sampling_rate, pcm_sample_format_t format)
[43dec08]397{
[a3ab774]398 assert(dsp);
[d758301]399 if (!dsp->buffer.data)
[a3ab774]400 return EINVAL;
401
402 /* Check supported parameters */
[d86c9736]403 ddf_log_debug("Requested capture: %u frames, %uHz, %s, %u channel(s).",
[57e8b3b]404 frames, sampling_rate, pcm_sample_format_str(format), channels);
[d2765ab3]405 if (sb_dsp_test_format(dsp, &channels, &sampling_rate, &format) != EOK)
[346643c]406 return ENOTSUP;
[a3ab774]407
[ff396ea]408 /* client requested regular interrupts */
409 if (frames) {
[d758301]410 if (!dsp->event_session)
411 return EINVAL;
[ff396ea]412 dsp->event_exchange = async_exchange_begin(dsp->event_session);
413 if (!dsp->event_exchange)
414 return ENOMEM;
415 dsp->ignore_interrupts = false;
416 }
[a3ab774]417
[ad42844]418 dsp->active.mode = 0
419 | (pcm_sample_format_is_signed(format) ? DSP_MODE_SIGNED : 0)
420 | (channels == 2 ? DSP_MODE_STEREO : 0);
421 dsp->active.samples = frames * channels;
422 dsp->active.frame_count = 0;
[a3ab774]423
[ad42844]424 sb_dsp_set_sampling_rate(dsp, sampling_rate);
[a3ab774]425
426#ifdef AUTO_DMA_MODE
[ad42844]427 sb_dsp_start_active(dsp, AUTO_DMA_16B_AD_FIFO);
[a3ab774]428#else
[ad42844]429 sb_dsp_start_active(dsp, SINGLE_DMA_16B_AD);
[a3ab774]430#endif
431
432 ddf_log_verbose("Recording started started, interrupt every %u samples "
433 "(~1/%u sec)", dsp->active.samples,
[346643c]434 sampling_rate / (dsp->active.samples * channels));
[d86c9736]435 dsp->status = DSP_CAPTURE;
[a3ab774]436
437 return EOK;
[43dec08]438}
[e941bf8]439
[d86c9736]440int sb_dsp_stop_capture(sb_dsp_t *dsp)
[43dec08]441{
[a3ab774]442 assert(dsp);
443 sb_dsp_write(dsp, DMA_16B_EXIT);
[d86c9736]444 ddf_log_debug("Stopped capture");
445 async_msg_0(dsp->event_exchange, PCM_EVENT_CAPTURE_TERMINATED);
[1240bb9]446 async_exchange_end(dsp->event_exchange);
447 dsp->event_exchange = NULL;
[a3ab774]448 return EOK;
[43dec08]449}
[763444e]450/**
451 * @}
452 */
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