source: mainline/uspace/drv/audio/sb16/dsp.c@ a10f3f3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a10f3f3 was bf9cb2f, checked in by Martin Decky <martin@…>, 11 years ago

complete the desired API semantics of physmem_map() and dmamem_map_anonymous() to be compatible with as_area_create()
(the user is allowed to request a specific virtual memory base address, the kernel uses an available base address if AS_AREA_ANY is used)

  • Property mode set to 100644
File size: 14.8 KB
RevLine 
[763444e]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvaudiosb16
29 * @{
30 */
31/** @file
32 * @brief DSP helper functions implementation
33 */
34
[c5cbc1b7]35#include <as.h>
[03362fbd]36#include <stdbool.h>
[c5cbc1b7]37#include <ddi.h>
[c885a21]38#include <devman.h>
39#include <device/hw_res.h>
[763444e]40#include <libarch/ddi.h>
[0b4f060]41#include <libarch/barrier.h>
[365f259]42#include <macros.h>
[01aef43]43#include <str_error.h>
[1240bb9]44#include <audio_pcm_iface.h>
[0f2e7c1]45
[bf38143]46#include "ddf_log.h"
47#include "dsp_commands.h"
[763444e]48#include "dsp.h"
49
[c5cbc1b7]50/* Maximum allowed transfer size for ISA DMA transfers is 64kB */
[537620a8]51#define MAX_BUFFER_SIZE (64 * 1024)
[bf38143]52
53#ifndef DSP_RETRY_COUNT
54#define DSP_RETRY_COUNT 100
55#endif
56
57#define DSP_RESET_RESPONSE 0xaa
[018ab50]58
59/* These are only for SB16 (DSP4.00+) */
60#define DSP_RATE_UPPER_LIMIT 44100
61#define DSP_RATE_LOWER_LIMIT 5000
[bf38143]62
[5984107]63#define AUTO_DMA_MODE
64
[fb6c98f]65static inline const char * dsp_state_to_str(dsp_state_t state)
66{
67 static const char* state_names[] = {
68 [DSP_PLAYBACK_ACTIVE_EVENTS] = "PLAYBACK w/ EVENTS",
[f3fb83a]69 [DSP_CAPTURE_ACTIVE_EVENTS] = "CAPTURE w/ EVENTS",
70 [DSP_PLAYBACK_NOEVENTS] = "PLAYBACK w/o EVENTS",
[fb6c98f]71 [DSP_CAPTURE_NOEVENTS] = "CAPTURE w/o EVENTS",
[03d6e0d]72 [DSP_PLAYBACK_TERMINATE] = "PLAYBACK TERMINATE",
73 [DSP_CAPTURE_TERMINATE] = "CAPTURE TERMINATE",
[fb6c98f]74 [DSP_READY] = "READY",
75 [DSP_NO_BUFFER] = "NO BUFFER",
76 };
[365f259]77 if (state < ARRAY_SIZE(state_names))
[fb6c98f]78 return state_names[state];
79 return "UNKNOWN";
80}
81
82
[5eed99d]83static inline void dsp_change_state(sb_dsp_t *dsp, dsp_state_t state)
[fb6c98f]84{
85 assert(dsp);
86 ddf_log_verbose("Changing state from %s to %s",
87 dsp_state_to_str(dsp->state), dsp_state_to_str(state));
88 dsp->state = state;
89}
90
[5eed99d]91static inline int dsp_read(sb_dsp_t *dsp, uint8_t *data)
[bf38143]92{
93 assert(data);
94 assert(dsp);
95 uint8_t status;
96 size_t attempts = DSP_RETRY_COUNT;
97 do {
98 status = pio_read_8(&dsp->regs->dsp_read_status);
99 } while (--attempts && ((status & DSP_READ_READY) == 0));
100
101 if ((status & DSP_READ_READY) == 0)
102 return EIO;
103
104 *data = pio_read_8(&dsp->regs->dsp_data_read);
105 return EOK;
106}
[e941bf8]107
[5eed99d]108static inline int dsp_write(sb_dsp_t *dsp, uint8_t data)
[bf38143]109{
110 assert(dsp);
111 uint8_t status;
112 size_t attempts = DSP_RETRY_COUNT;
113 do {
114 status = pio_read_8(&dsp->regs->dsp_write);
115 } while (--attempts && ((status & DSP_WRITE_BUSY) != 0));
116
117 if ((status & DSP_WRITE_BUSY))
118 return EIO;
119
120 pio_write_8(&dsp->regs->dsp_write, data);
121 return EOK;
122}
[e941bf8]123
[5eed99d]124static inline void dsp_reset(sb_dsp_t *dsp)
[bf38143]125{
126 assert(dsp);
127 /* Reset DSP, see Chapter 2 of Sound Blaster HW programming guide */
128 pio_write_8(&dsp->regs->dsp_reset, 1);
129 udelay(3); /* Keep reset for 3 us */
130 pio_write_8(&dsp->regs->dsp_reset, 0);
[5eed99d]131 /* "DSP takes about 100 microseconds to initialize itself" */
132 udelay(100);
[bf38143]133}
[e941bf8]134
[5eed99d]135static inline void dsp_start_current_active(sb_dsp_t *dsp, uint8_t command)
[ad42844]136{
[5eed99d]137 dsp_write(dsp, command);
138 dsp_write(dsp, dsp->active.mode);
139 dsp_write(dsp, (dsp->active.samples - 1) & 0xff);
140 dsp_write(dsp, (dsp->active.samples - 1) >> 8);
[ad42844]141}
142
[5eed99d]143static inline void dsp_set_sampling_rate(sb_dsp_t *dsp, unsigned rate)
[ad42844]144{
[5eed99d]145 dsp_write(dsp, SET_SAMPLING_RATE_OUTPUT);
146 dsp_write(dsp, rate >> 8);
147 dsp_write(dsp, rate & 0xff);
[ad42844]148 ddf_log_verbose("Sampling rate: %hhx:%hhx.", rate >> 8, rate & 0xff);
149}
150
[5eed99d]151static inline void dsp_report_event(sb_dsp_t *dsp, pcm_event_t event)
152{
153 assert(dsp);
154 if (!dsp->event_exchange)
155 ddf_log_warning("No one listening for event %u", event);
156 async_msg_1(dsp->event_exchange, event, dsp->active.frame_count);
157}
158
159static inline int setup_dma(sb_dsp_t *dsp, uintptr_t pa, size_t size)
[c885a21]160{
161 async_sess_t *sess = devman_parent_device_connect(EXCHANGE_ATOMIC,
[03362fbd]162 ddf_dev_get_handle(dsp->sb_dev), IPC_FLAG_BLOCKING);
[c885a21]163
164 const int ret = hw_res_dma_channel_setup(sess,
165 dsp->dma16_channel, pa, size,
166 DMA_MODE_READ | DMA_MODE_AUTO | DMA_MODE_ON_DEMAND);
[c5cbc1b7]167
[c885a21]168 async_hangup(sess);
169 return ret;
170}
[e941bf8]171
[5eed99d]172static inline int setup_buffer(sb_dsp_t *dsp, size_t size)
[01aef43]173{
174 assert(dsp);
[8442d10]175
176 if ((size > MAX_BUFFER_SIZE) || (size == 0) || ((size % 2) == 1))
[9b3d999]177 size = MAX_BUFFER_SIZE;
[8442d10]178
179 uintptr_t pa = 0;
[bf9cb2f]180 void *buffer = AS_AREA_ANY;
[8442d10]181
[4a90582]182 int ret = dmamem_map_anonymous(size, DMAMEM_16MiB | 0x0000ffff,
[8442d10]183 AS_AREA_WRITE | AS_AREA_READ, 0, &pa, &buffer);
[c5cbc1b7]184 if (ret != EOK) {
[124f9bd]185 ddf_log_error("Failed to allocate DMA buffer.");
[f14e6ea]186 return ENOMEM;
187 }
[8442d10]188
189 ddf_log_verbose("Setup DMA buffer at %p (%zu) %zu.", buffer, pa, size);
190 assert(pa < (1 << 24));
191
[c5cbc1b7]192 /* Setup 16 bit channel */
[8442d10]193 ret = setup_dma(dsp, pa, size);
[01aef43]194 if (ret == EOK) {
[dce7e41]195 dsp->buffer.data = buffer;
[00006e0]196 dsp->buffer.size = size;
[01aef43]197 } else {
[124f9bd]198 ddf_log_error("Failed to setup DMA16 channel: %s.",
[01aef43]199 str_error(ret));
[c5cbc1b7]200 dmamem_unmap_anonymous(buffer);
[01aef43]201 }
[8442d10]202
[01aef43]203 return ret;
204}
[e941bf8]205
[346643c]206static inline size_t sample_count(pcm_sample_format_t format, size_t byte_count)
[0b4f060]207{
[346643c]208 return byte_count / pcm_sample_format_size(format);
[0b4f060]209}
[e941bf8]210
[c885a21]211int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs, ddf_dev_t *dev,
212 int dma8, int dma16)
[bf38143]213{
214 assert(dsp);
215 dsp->regs = regs;
[c885a21]216 dsp->dma8_channel = dma8;
217 dsp->dma16_channel = dma16;
[7ca22e5]218 dsp->event_session = NULL;
219 dsp->event_exchange = NULL;
[c885a21]220 dsp->sb_dev = dev;
[fb6c98f]221 dsp->state = DSP_NO_BUFFER;
[5eed99d]222 dsp_reset(dsp);
[bf38143]223 uint8_t response;
[5eed99d]224 const int ret = dsp_read(dsp, &response);
[bf38143]225 if (ret != EOK) {
[124f9bd]226 ddf_log_error("Failed to read DSP reset response value.");
[bf38143]227 return ret;
228 }
229 if (response != DSP_RESET_RESPONSE) {
[124f9bd]230 ddf_log_error("Invalid DSP reset response: %x.", response);
[bf38143]231 return EIO;
232 }
233
234 /* Get DSP version number */
[5eed99d]235 dsp_write(dsp, DSP_VERSION);
236 dsp_read(dsp, &dsp->version.major);
237 dsp_read(dsp, &dsp->version.minor);
[01aef43]238
239 return ret;
[bf38143]240}
[e941bf8]241
[f14e6ea]242void sb_dsp_interrupt(sb_dsp_t *dsp)
243{
[bf38143]244 assert(dsp);
[ff396ea]245
[57e8b3b]246 dsp->active.frame_count +=
247 dsp->active.samples / ((dsp->active.mode & DSP_MODE_STEREO) ? 2 : 1);
248
[fb6c98f]249 switch (dsp->state)
250 {
251 case DSP_PLAYBACK_ACTIVE_EVENTS:
[0387b92]252 dsp_report_event(dsp, PCM_EVENT_FRAMES_PLAYED);
[fb6c98f]253 case DSP_PLAYBACK_NOEVENTS:
254#ifndef AUTO_DMA_MODE
[d337f74]255 dsp_start_current_active(dsp, SINGLE_DMA_16B_DA);
[fb6c98f]256#endif
257 break;
258 case DSP_CAPTURE_ACTIVE_EVENTS:
[0387b92]259 dsp_report_event(dsp, PCM_EVENT_FRAMES_CAPTURED);
[fb6c98f]260 case DSP_CAPTURE_NOEVENTS:
261#ifndef AUTO_DMA_MODE
[d337f74]262 dsp_start_current_active(dsp, SINGLE_DMA_16B_DA);
[fb6c98f]263#endif
264 break;
[daed689]265 case DSP_CAPTURE_TERMINATE:
[d337f74]266 dsp_change_state(dsp, DSP_READY);
[daed689]267 dsp_report_event(dsp, PCM_EVENT_CAPTURE_TERMINATED);
268 async_exchange_end(dsp->event_exchange);
269 dsp->event_exchange = NULL;
270 break;
271 case DSP_PLAYBACK_TERMINATE:
[d337f74]272 dsp_change_state(dsp, DSP_READY);
[daed689]273 dsp_report_event(dsp, PCM_EVENT_PLAYBACK_TERMINATED);
274 async_exchange_end(dsp->event_exchange);
275 dsp->event_exchange = NULL;
276 break;
[fb6c98f]277 default:
[5b8e08e]278 ddf_log_warning("Interrupt while DSP not active (%s)",
279 dsp_state_to_str(dsp->state));
[7ca22e5]280 }
[01aef43]281}
[e941bf8]282
[f0241bda]283unsigned sb_dsp_query_cap(sb_dsp_t *dsp, audio_cap_t cap)
284{
[37367f7]285 ddf_log_verbose("Querying cap %s", audio_pcm_cap_str(cap));
[f0241bda]286 switch(cap) {
[d86c9736]287 case AUDIO_CAP_CAPTURE:
[f0241bda]288 case AUDIO_CAP_PLAYBACK:
289 case AUDIO_CAP_INTERRUPT:
[1ba95ba]290 case AUDIO_CAP_BUFFER_POS:
[f0241bda]291 return 1;
292 case AUDIO_CAP_MAX_BUFFER:
293 return MAX_BUFFER_SIZE;
294 case AUDIO_CAP_INTERRUPT_MIN_FRAMES:
295 return 1;
296 case AUDIO_CAP_INTERRUPT_MAX_FRAMES:
297 return 16535;
298 default:
[37367f7]299 return ENOTSUP;
[f0241bda]300 }
301}
302
[1ba95ba]303int sb_dsp_get_buffer_position(sb_dsp_t *dsp, size_t *pos)
304{
[fb6c98f]305 if (dsp->state == DSP_NO_BUFFER)
[1ba95ba]306 return ENOENT;
307
[fb6c98f]308 assert(dsp->buffer.data);
[1ba95ba]309 async_sess_t *sess = devman_parent_device_connect(EXCHANGE_ATOMIC,
[03362fbd]310 ddf_dev_get_handle(dsp->sb_dev), IPC_FLAG_BLOCKING);
[1ba95ba]311
312 // TODO: Assumes DMA 16
313 const int remain = hw_res_dma_channel_remain(sess, dsp->dma16_channel);
314 async_hangup(sess);
315 if (remain >= 0) {
316 *pos = dsp->buffer.size - remain;
317 return EOK;
318 }
319 return remain;
320}
321
[b7c080c]322int sb_dsp_test_format(sb_dsp_t *dsp, unsigned *channels, unsigned *rate,
323 pcm_sample_format_t *format)
324{
325 int ret = EOK;
326 if (*channels == 0 || *channels > 2) {
327 *channels = 2;
328 ret = ELIMIT;
329 }
330 //TODO 8bit DMA supports 8bit formats
331 if (*format != PCM_SAMPLE_SINT16_LE && *format != PCM_SAMPLE_UINT16_LE) {
332 *format = pcm_sample_format_is_signed(*format) ?
333 PCM_SAMPLE_SINT16_LE : PCM_SAMPLE_UINT16_LE;
334 ret = ELIMIT;
335 }
[018ab50]336 if (*rate > DSP_RATE_UPPER_LIMIT) {
337 *rate = DSP_RATE_UPPER_LIMIT;
338 ret = ELIMIT;
339 }
340 if (*rate < DSP_RATE_LOWER_LIMIT) {
341 *rate = DSP_RATE_LOWER_LIMIT;
342 ret = ELIMIT;
343 }
[b7c080c]344 return ret;
345}
346
[fb6c98f]347int sb_dsp_set_event_session(sb_dsp_t *dsp, async_sess_t *session)
348{
349 assert(dsp);
[6f57933]350 if (dsp->event_session && session)
[fb6c98f]351 return EBUSY;
352 dsp->event_session = session;
353 ddf_log_debug("Set event session to %p.", session);
354 return EOK;
355}
356
357async_sess_t * sb_dsp_get_event_session(sb_dsp_t *dsp)
358{
359 assert(dsp);
360 ddf_log_debug("Get event session: %p.", dsp->event_session);
361 return dsp->event_session;
362}
363
[b497018]364int sb_dsp_get_buffer(sb_dsp_t *dsp, void **buffer, size_t *size)
[43dec08]365{
366 assert(dsp);
[00006e0]367 assert(size);
368
[7ca22e5]369 /* buffer is already setup by for someone, refuse to work until
370 * it's released */
[fb6c98f]371 if (dsp->state != DSP_NO_BUFFER)
[7ca22e5]372 return EBUSY;
[fb6c98f]373 assert(dsp->buffer.data == NULL);
[7ca22e5]374
[5eed99d]375 const int ret = setup_buffer(dsp, *size);
[124f9bd]376 if (ret == EOK) {
[b497018]377 ddf_log_debug("Providing buffer: %p, %zu B.",
378 dsp->buffer.data, dsp->buffer.size);
[00006e0]379
[124f9bd]380 if (buffer)
381 *buffer = dsp->buffer.data;
382 if (size)
383 *size = dsp->buffer.size;
[5eed99d]384 dsp_change_state(dsp, DSP_READY);
[124f9bd]385 }
[43dec08]386 return ret;
387}
[7ca22e5]388
[b497018]389int sb_dsp_release_buffer(sb_dsp_t *dsp)
[43dec08]390{
391 assert(dsp);
[f2a92b0]392 if (dsp->state != DSP_READY)
[fb6c98f]393 return EINVAL;
394 assert(dsp->buffer.data);
395 dmamem_unmap_anonymous(dsp->buffer.data);
396 dsp->buffer.data = NULL;
397 dsp->buffer.size = 0;
[124f9bd]398 ddf_log_debug("DSP buffer released.");
[5eed99d]399 dsp_change_state(dsp, DSP_NO_BUFFER);
[43dec08]400 return EOK;
401}
[e941bf8]402
[57e8b3b]403int sb_dsp_start_playback(sb_dsp_t *dsp, unsigned frames,
[346643c]404 unsigned channels, unsigned sampling_rate, pcm_sample_format_t format)
[43dec08]405{
406 assert(dsp);
407
[f2a92b0]408 if (!dsp->buffer.data || dsp->state != DSP_READY)
[92b638c]409 return EINVAL;
410
[43dec08]411 /* Check supported parameters */
[57e8b3b]412 ddf_log_debug("Requested playback: %u frames, %uHz, %s, %u channel(s).",
413 frames, sampling_rate, pcm_sample_format_str(format), channels);
[d2765ab3]414 if (sb_dsp_test_format(dsp, &channels, &sampling_rate, &format) != EOK)
[346643c]415 return ENOTSUP;
[43dec08]416
[f3fb83a]417 /* Client requested regular events */
[fda3bd9]418 if (frames && !dsp->event_session)
419 return EINVAL;
420
421 if (dsp->event_session) {
[ff396ea]422 dsp->event_exchange = async_exchange_begin(dsp->event_session);
423 if (!dsp->event_exchange)
424 return ENOMEM;
425 }
[43dec08]426
[57e8b3b]427 dsp->active.mode = 0
[ad42844]428 | (pcm_sample_format_is_signed(format) ? DSP_MODE_SIGNED : 0)
[57e8b3b]429 | (channels == 2 ? DSP_MODE_STEREO : 0);
430 dsp->active.samples = frames * channels;
431 dsp->active.frame_count = 0;
[43dec08]432
[5eed99d]433 dsp_set_sampling_rate(dsp, sampling_rate);
[ad42844]434
435#ifdef AUTO_DMA_MODE
[5eed99d]436 dsp_start_current_active(dsp, AUTO_DMA_16B_DA_FIFO);
[ad42844]437#else
[5eed99d]438 dsp_start_current_active(dsp, SINGLE_DMA_16B_DA);
[ad42844]439#endif
[43dec08]440
[f3fb83a]441 ddf_log_verbose("Playback started, event every %u samples",
442 dsp->active.samples);
[a3ab774]443
[5eed99d]444 dsp_change_state(dsp,
[fb6c98f]445 frames ? DSP_PLAYBACK_ACTIVE_EVENTS : DSP_PLAYBACK_NOEVENTS);
[0387b92]446 if (dsp->state == DSP_PLAYBACK_ACTIVE_EVENTS)
447 dsp_report_event(dsp, PCM_EVENT_PLAYBACK_STARTED);
[9b3d999]448
[43dec08]449 return EOK;
450}
[e941bf8]451
[92b638c]452int sb_dsp_stop_playback(sb_dsp_t *dsp, bool immediate)
[43dec08]453{
454 assert(dsp);
[92b638c]455 if ((dsp->state == DSP_PLAYBACK_NOEVENTS ||
456 dsp->state == DSP_PLAYBACK_ACTIVE_EVENTS) &&
457 immediate)
458 {
[5eed99d]459 dsp_write(dsp, DMA_16B_PAUSE);
460 dsp_reset(dsp);
[92b638c]461 ddf_log_debug("Stopped playback");
[f2a92b0]462 dsp_change_state(dsp, DSP_READY);
[f7b36bc]463 if (dsp->event_exchange) {
464 dsp_report_event(dsp, PCM_EVENT_PLAYBACK_TERMINATED);
465 async_exchange_end(dsp->event_exchange);
466 dsp->event_exchange = NULL;
467 }
[92b638c]468 return EOK;
469 }
470 if (dsp->state == DSP_PLAYBACK_ACTIVE_EVENTS)
471 {
472 /* Stop after current fragment */
473 assert(!immediate);
[5eed99d]474 dsp_write(dsp, DMA_16B_EXIT);
[92b638c]475 ddf_log_debug("Last playback fragment");
[5eed99d]476 dsp_change_state(dsp, DSP_PLAYBACK_TERMINATE);
[92b638c]477 return EOK;
478 }
479 return EINVAL;
[43dec08]480}
[e941bf8]481
[d86c9736]482int sb_dsp_start_capture(sb_dsp_t *dsp, unsigned frames,
[346643c]483 unsigned channels, unsigned sampling_rate, pcm_sample_format_t format)
[43dec08]484{
[a3ab774]485 assert(dsp);
[f2a92b0]486 if (!dsp->buffer.data || dsp->state != DSP_READY)
[92b638c]487 return EINVAL;
[a3ab774]488
489 /* Check supported parameters */
[d86c9736]490 ddf_log_debug("Requested capture: %u frames, %uHz, %s, %u channel(s).",
[57e8b3b]491 frames, sampling_rate, pcm_sample_format_str(format), channels);
[d2765ab3]492 if (sb_dsp_test_format(dsp, &channels, &sampling_rate, &format) != EOK)
[346643c]493 return ENOTSUP;
[a3ab774]494
[f3fb83a]495 /* Client requested regular events */
[fda3bd9]496 if (frames && !dsp->event_session)
497 return EINVAL;
498
499 if (dsp->event_session) {
[ff396ea]500 dsp->event_exchange = async_exchange_begin(dsp->event_session);
501 if (!dsp->event_exchange)
502 return ENOMEM;
503 }
[a3ab774]504
[ad42844]505 dsp->active.mode = 0
506 | (pcm_sample_format_is_signed(format) ? DSP_MODE_SIGNED : 0)
507 | (channels == 2 ? DSP_MODE_STEREO : 0);
508 dsp->active.samples = frames * channels;
509 dsp->active.frame_count = 0;
[a3ab774]510
[5eed99d]511 dsp_set_sampling_rate(dsp, sampling_rate);
[a3ab774]512
513#ifdef AUTO_DMA_MODE
[5eed99d]514 dsp_start_current_active(dsp, AUTO_DMA_16B_AD_FIFO);
[a3ab774]515#else
[5eed99d]516 dsp_start_current_active(dsp, SINGLE_DMA_16B_AD);
[a3ab774]517#endif
518
[f3fb83a]519 ddf_log_verbose("Capture started started, event every %u samples",
520 dsp->active.samples);
[5eed99d]521 dsp_change_state(dsp,
[fb6c98f]522 frames ? DSP_CAPTURE_ACTIVE_EVENTS : DSP_CAPTURE_NOEVENTS);
[0387b92]523 if (dsp->state == DSP_CAPTURE_ACTIVE_EVENTS)
524 dsp_report_event(dsp, PCM_EVENT_CAPTURE_STARTED);
[a3ab774]525 return EOK;
[43dec08]526}
[e941bf8]527
[92b638c]528int sb_dsp_stop_capture(sb_dsp_t *dsp, bool immediate)
[43dec08]529{
[a3ab774]530 assert(dsp);
[92b638c]531 if ((dsp->state == DSP_CAPTURE_NOEVENTS ||
532 dsp->state == DSP_CAPTURE_ACTIVE_EVENTS) &&
533 immediate)
534 {
[5eed99d]535 dsp_write(dsp, DMA_16B_PAUSE);
536 dsp_reset(dsp);
[92b638c]537 ddf_log_debug("Stopped capture fragment");
[f2a92b0]538 dsp_change_state(dsp, DSP_READY);
[f7b36bc]539 if (dsp->event_exchange) {
540 dsp_report_event(dsp, PCM_EVENT_CAPTURE_TERMINATED);
541 async_exchange_end(dsp->event_exchange);
542 dsp->event_exchange = NULL;
543 }
[92b638c]544 return EOK;
545 }
546 if (dsp->state == DSP_CAPTURE_ACTIVE_EVENTS)
547 {
548 /* Stop after current fragment */
549 assert(!immediate);
[5eed99d]550 dsp_write(dsp, DMA_16B_EXIT);
[92b638c]551 ddf_log_debug("Last capture fragment");
[5eed99d]552 dsp_change_state(dsp, DSP_CAPTURE_TERMINATE);
[92b638c]553 return EOK;
554 }
555 return EINVAL;
[43dec08]556}
[763444e]557/**
558 * @}
559 */
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