source: mainline/uspace/app/pcc/arch/sparc64/macdefs.h@ b670523

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b670523 was a7de7182, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 15 years ago

Added pcc source tree (contents of pcc-1.0.0.tgz)
  • Property mode set to 100644
File size: 7.0 KB
Line 
1/*
2 * Copyright (c) 2008 David Crawshaw <david@zentus.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17
18/*
19 * Many arithmetic instructions take 'reg_or_imm' in SPARCv9, where imm
20 * means we can use a signed 13-bit constant (simm13). This gives us a
21 * shortcut for small constants, instead of loading them into a register.
22 * Special handling is required because 13 bits lies between SSCON and SCON.
23 */
24#define SIMM13(val) (val < 4096 && val > -4097)
25
26/*
27 * The SPARCv9 ABI specifies a stack bias of 2047 bits. This means that the
28 * end of our call space is %fp+V9BIAS, working back towards %sp+V9BIAS+176.
29 */
30#define V9BIAS 2047
31
32/*
33 * The ABI requires that every frame reserve 176 bits for saving registers
34 * in the case of a spill. The stack size must be 16-bit aligned.
35 */
36#define V9RESERVE 176
37#define V9STEP(x) ALIGN(x, 0xf)
38#define ALIGN(x, y) ((x & y) ? (x + y) & ~y : x)
39
40
41#define makecc(val,i) lastcon = (lastcon<<8)|((val<<24)>>24);
42
43#define ARGINIT (7*8) /* XXX */
44#define AUTOINIT (0)
45
46/* Type sizes */
47#define SZCHAR 8
48#define SZBOOL 32
49#define SZINT 32
50#define SZFLOAT 32
51#define SZDOUBLE 64
52#define SZLDOUBLE 64
53#define SZLONG 64
54#define SZSHORT 16
55#define SZLONGLONG 64
56#define SZPOINT(t) 64
57
58/* Type alignments */
59#define ALCHAR 8
60#define ALBOOL 32
61#define ALINT 32
62#define ALFLOAT 32
63#define ALDOUBLE 64
64#define ALLDOUBLE 64
65#define ALLONG 64
66#define ALLONGLONG 64
67#define ALSHORT 16
68#define ALPOINT 64
69#define ALSTRUCT 32
70#define ALSTACK 64
71
72/* Min/max values. */
73#define MIN_CHAR -128
74#define MAX_CHAR 127
75#define MAX_UCHAR 255
76#define MIN_SHORT -32768
77#define MAX_SHORT 32767
78#define MAX_USHORT 65535
79#define MIN_INT -1
80#define MAX_INT 0x7fffffff
81#define MAX_UNSIGNED 0xffffffff
82#define MIN_LONGLONG 0x8000000000000000LL
83#define MAX_LONGLONG 0x7fffffffffffffffLL
84#define MAX_ULONGLONG 0xffffffffffffffffULL
85#define MIN_LONG MIN_LONGLONG
86#define MAX_LONG MAX_LONGLONG
87#define MAX_ULONG MAX_ULONGLONG
88
89#define BOOL_TYPE INT
90
91typedef long long CONSZ;
92typedef unsigned long long U_CONSZ;
93typedef long long OFFSZ;
94
95#define CONFMT "%lld"
96#define LABFMT "L%d"
97#define STABLBL "LL%d"
98
99#define BACKAUTO /* Stack grows negatively for automatics. */
100#define BACKTEMP /* Stack grows negatively for temporaries. */
101
102#undef FIELDOPS
103#define RTOLBYTES
104
105#define ENUMSIZE(high,low) INT
106#define BYTEOFF(x) ((x)&03)
107#define BITOOR(x) (x)
108
109#define szty(t) ((ISPTR(t) || (t) == DOUBLE || \
110 (t) == LONG || (t) == ULONG || \
111 (t) == LONGLONG || (t) == ULONGLONG) ? 2 : 1)
112
113
114/* Register names. */
115
116#define MAXREGS (31 + 31 + 16 + 2)
117#define NUMCLASS 4
118
119//define G0 -1
120#define G1 0
121#define G2 1
122#define G3 2
123#define G4 3
124#define G5 4
125#define G6 5
126#define G7 6
127#define O0 7
128#define O1 8
129#define O2 9
130#define O3 10
131#define O4 11
132#define O5 12
133#define O6 13
134#define O7 14
135#define L0 15
136#define L1 16
137#define L2 17
138#define L3 18
139#define L4 19
140#define L5 20
141#define L6 21
142#define L7 22
143#define I0 23
144#define I1 24
145#define I2 25
146#define I3 26
147#define I4 27
148#define I5 28
149#define I6 29
150#define I7 30
151
152#define F0 31
153#define F1 32
154#define F2 33
155#define F3 34
156#define F4 35
157#define F5 36
158#define F6 37
159#define F7 38
160#define F8 39
161#define F9 40
162#define F10 41
163#define F11 42
164#define F12 43
165#define F13 44
166#define F14 45
167#define F15 46
168#define F16 47
169#define F17 48
170#define F18 49
171#define F19 50
172#define F20 51
173#define F21 52
174#define F22 53
175#define F23 54
176#define F24 55
177#define F25 56
178#define F26 57
179#define F27 58
180#define F28 59
181#define F29 60
182#define F30 61
183//define F31 XXX
184#define D0 62
185#define D1 63
186#define D2 64
187#define D3 65
188#define D4 66
189#define D5 67
190#define D6 68
191#define D7 69
192#define D8 70
193#define D9 71
194#define D10 72
195#define D11 73
196#define D12 74
197#define D13 75
198#define D14 76
199#define D15 77
200
201#define SP 78
202#define FP 79
203
204#define FPREG FP
205
206#define RETREG(x) ((x)==DOUBLE ? D0 : (x)==FLOAT ? F1 : O0)
207#define RETREG_PRE(x) ((x)==DOUBLE ? D0 : (x)==FLOAT ? F1 : I0)
208
209#define RSTATUS \
210 /* global */ \
211 SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, \
212 SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, \
213 /* out */ \
214 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
215 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
216 /* local */ \
217 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
218 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
219 /* in */ \
220 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
221 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
222 /* 32-bit floating point */ \
223 SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, \
224 SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, \
225 SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, \
226 SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, SBREG, /*, SBREG */ \
227 /* 64-bit floating point */ \
228 SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, \
229 SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, \
230 /* sp */ SDREG, \
231 /* fp */ SDREG
232
233#define ROVERLAP \
234 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
235 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
236 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
237 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
238/* 32-bit floating point */ \
239 { D0, -1 }, { D0, -1 }, { D1, -1 }, { D1, -1 }, \
240 { D2, -1 }, { D2, -1 }, { D3, -1 }, { D3, -1 }, \
241 { D4, -1 }, { D4, -1 }, { D5, -1 }, { D5, -1 }, \
242 { D6, -1 }, { D6, -1 }, { D7, -1 }, { D7, -1 }, \
243 { D8, -1 }, { D8, -1 }, { D9, -1 }, { D9, -1 }, \
244 { D10, -1 }, { D10, -1 }, { D11, -1 }, { D11, -1 }, \
245 { D12, -1 }, { D12, -1 }, { D13, -1 }, { D13, -1 }, \
246 { D14, -1 }, { D14, -1 }, { D15, -1 }, /* { D15, -1 }, */ \
247/* 64-bit floating point */ \
248 { F0, F1, -1 }, { F2, F3, -1 }, { F4, F5, -1 }, \
249 { F6, F7, -1 }, { F8, F9, -1 }, { F10, F11, -1 }, \
250 { F12, F13, -1 }, { F14, F15, -1 }, { F16, F17, -1 }, \
251 { F18, F19, -1 }, { F20, F21, -1 }, { F22, F23, -1 }, \
252 { F24, F25, -1 }, { F26, F27, -1 }, { F28, F29, -1 }, \
253 { F30, /* F31, */ -1 }, \
254 { -1 }, \
255 { -1 }
256
257#define GCLASS(x) (x <= I7 ? CLASSA : \
258 (x <= F30 ? CLASSB : \
259 (x <= D15 ? CLASSC : \
260 (x == SP || x == FP ? CLASSD : 0))))
261#define PCLASS(p) (1 << gclass((p)->n_type))
262#define DECRA(x,y) (((x) >> (y*7)) & 127)
263#define ENCRA(x,y) ((x) << (7+y*7))
264#define ENCRD(x) (x)
265
266int COLORMAP(int c, int *r);
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