source: mainline/src/synch/spinlock.c@ b52da8d7

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b52da8d7 was 7dd56f1, checked in by Jakub Jermar <jakub@…>, 21 years ago

Add memory barriers into spinlock_*().
Implement CS_{ENTER|LEAVE}_BARRIER() for IA-32 (no-op).
Provide incomplete CS_{ENTER|LEAVE}_BARRIER() macros for IA-64 and MIPS as well.

Small changes here and there.

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch.h>
30
31#include <arch/atomic.h>
32#include <arch/barrier.h>
33#include <synch/spinlock.h>
34
35#ifdef __SMP__
36
37void spinlock_initialize(spinlock_t *sl)
38{
39 sl->val = 0;
40}
41
42#ifdef DEBUG_SPINLOCK
43void spinlock_lock(spinlock_t *sl)
44{
45 int i = 0;
46 __address caller = ((__u32 *) &sl)[-1];
47
48 while (test_and_set(&sl->val)) {
49 if (i++ > 300000) {
50 printf("cpu%d: looping on spinlock %X, caller=%X\n", CPU->id, sl, caller);
51 i = 0;
52 }
53 }
54 CS_ENTER_BARRIER();
55
56}
57#else
58void spinlock_lock(spinlock_t *sl)
59{
60 /*
61 * Each architecture has its own efficient/recommended
62 * implementation of spinlock.
63 */
64 spinlock_arch(&sl->val);
65 CS_ENTER_BARRIER();
66}
67#endif
68
69int spinlock_trylock(spinlock_t *sl)
70{
71 int rc;
72
73 rc = !test_and_set(&sl->val);
74 CS_ENTER_BARRIER();
75
76 return rc;
77}
78
79void spinlock_unlock(spinlock_t *sl)
80{
81 CS_LEAVE_BARRIER();
82 sl->val = 0;
83}
84
85#endif
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