source: mainline/src/mm/tlb.c@ 1e2aecca

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1e2aecca was e3f41b6, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Code cleanup in scheduler.c thread.c - removed unnecessary spinlock.
atomic_inc, atomic_dec moved to arch/atomic.h instead of arch/smp/atomic.h,
advisable to use even in non-smp mode.
Fixed atomic_inc, atomic_dec in mips architecture.

  • Property mode set to 100644
File size: 2.4 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <mm/tlb.h>
[4ffa9e0]30#include <smp/ipi.h>
[169587a]31#include <synch/spinlock.h>
32#include <typedefs.h>
[e3f41b6]33#include <arch/atomic.h>
[4ffa9e0]34#include <arch/interrupt.h>
[169587a]35#include <config.h>
[434f700]36#include <arch.h>
[f761f1eb]37
[169587a]38#ifdef __SMP__
39static spinlock_t tlblock;
40
41void tlb_init(void)
42{
43 spinlock_initialize(&tlblock);
44}
45
46/* must be called with interrupts disabled */
[b109ebb]47void tlb_shootdown_start(void)
[169587a]48{
[434f700]49 int i;
50
51 CPU->tlb_active = 0;
[169587a]52 spinlock_lock(&tlblock);
[b109ebb]53 tlb_shootdown_ipi_send();
[434f700]54 tlb_invalidate(0); /* TODO: use valid ASID */
[169587a]55
[434f700]56busy_wait:
[babcb148]57 for (i = 0; i<config.cpu_count; i++)
[434f700]58 if (cpus[i].tlb_active)
59 goto busy_wait;
[169587a]60}
61
[b109ebb]62void tlb_shootdown_finalize(void)
[169587a]63{
64 spinlock_unlock(&tlblock);
[434f700]65 CPU->tlb_active = 1;
[169587a]66}
67
[4ffa9e0]68void tlb_shootdown_ipi_send(void)
69{
70 ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
71}
72
[b109ebb]73void tlb_shootdown_ipi_recv(void)
[f761f1eb]74{
[434f700]75 CPU->tlb_active = 0;
[169587a]76 spinlock_lock(&tlblock);
77 spinlock_unlock(&tlblock);
78 tlb_invalidate(0); /* TODO: use valid ASID */
[434f700]79 CPU->tlb_active = 1;
[f761f1eb]80}
[169587a]81#endif /* __SMP__ */
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