source: mainline/src/cpu/cpu.c@ 8262010

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8262010 was 8262010, checked in by Jakub Jermar <jakub@…>, 20 years ago

Switch from mm-based 'the' mechanism to macro-based 'cpu_private_data[CPU_ID_ARCH]' mechanism.
Added l_apic_id() and some other minor APIC changes.
Move gdtr to K_DATA_START section.
Move K_DATA_START section immediately behind K_TEXT_START section so that real-mode addresses work even with growing size of kernel code.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <cpu.h>
30#include <arch.h>
31#include <arch/cpu.h>
32#include <mm/heap.h>
33#include <mm/page.h>
34#include <mm/frame.h>
35#include <arch/types.h>
36#include <config.h>
37#include <panic.h>
38#include <typedefs.h>
39#include <memstr.h>
40#include <list.h>
41
42cpu_private_data_t *cpu_private_data;
43cpu_t *cpus;
44
45void cpu_init(void) {
46 int i, j;
47
48 #ifdef __SMP__
49 if (config.cpu_active == 1) {
50 #endif /* __SMP__ */
51 cpu_private_data = (cpu_private_data_t *) malloc(sizeof(cpu_private_data_t) * config.cpu_count);
52 if (!cpu_private_data)
53 panic("malloc/cpu_private_data");
54
55 cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count);
56 if (!cpus)
57 panic("malloc/cpus");
58
59 /* initialize everything */
60 memsetb((__address) cpu_private_data, sizeof(cpu_private_data_t) * config.cpu_count, 0);
61 memsetb((__address) cpus, sizeof(cpu_t) * config.cpu_count, 0);
62
63 for (i=0; i < config.cpu_count; i++) {
64 cpus[i].stack = (__u8 *) malloc(CPU_STACK_SIZE);
65 if (!cpus[i].stack)
66 panic("malloc/cpus[%d].stack\n", i);
67
68 cpus[i].id = i;
69
70 #ifdef __SMP__
71 waitq_initialize(&cpus[i].kcpulb_wq);
72 #endif /* __SMP */
73
74 for (j = 0; j < RQ_COUNT; j++) {
75 list_initialize(&cpus[i].rq[j].rq_head);
76 }
77
78 cpu_private_data[i].cpu = &cpus[i];
79 }
80
81 #ifdef __SMP__
82 }
83 #endif /* __SMP__ */
84
85 cpu_identify();
86 cpu_arch_init();
87}
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