source: mainline/kernel@ f0fcb04

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Name Size Rev Age Author Last Change
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arch d99fac9   13 years adam.hraska+hos Fixed build for amd64 (due to bad cht1 test and atomic.h).
doc 2b4a9f26   15 years martin Add interrupts-disabled spinlocks whose purpose is the semantic …
genarch 6eef3c4   13 years martin cleanup thread_create() and thread_t structure - remove 'flag' …
generic f0fcb04   13 years adam.hraska+hos rcu: Replaced checking three variables to see if the detector needs to …
test 8e3ed06   13 years adam.hraska+hos rcu: Allowed inlining of the RCU read side.
tools 432f68a   14 years martin improve compatibility with Python 3.2 (thx Vojtech Horky)
Makefile 12.9 KB ​ 0949b7a   13 years adam.hraska+hos cht: Added CHT stress test.
  • Property mode set to 040000
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