source: mainline/kernel/kernel.config@ 3ce7f082

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3ce7f082 was d630139, checked in by Jakub Jermar <jakub@…>, 19 years ago

Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1## General configuration directives
2
3# Architecture
4@ "amd64" AMD64/Intel EM64T
5@ "arm32" ARM 32-bit
6@ "ia32" Intel IA-32
7@ "ia32xen" Intel IA-32 on Xen hypervisor
8@ "ia64" Intel IA-64
9@ "mips32" MIPS 32-bit
10@ "ppc32" PowerPC 32-bit
11@ "ppc64" PowerPC 64-bit
12@ "sparc64" Sun UltraSPARC 64-bit
13! ARCH (choice)
14
15# Compiler
16@ "cross" Cross-compiler
17@ "native" Native
18! COMPILER (choice)
19
20# CPU type
21@ "pentium4" Pentium 4
22@ "pentium3" Pentium 3
23@ "athlon-xp" Athlon XP
24@ "athlon-mp" Athlon MP
25@ "prescott" Prescott
26! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice)
27
28# CPU type
29@ "opteron" Opteron
30! [ARCH=amd64] MACHINE (choice)
31
32# Machine type
33@ "gxemul" GXEmul
34! [ARCH=arm32] MACHINE (choice)
35
36# Machine type
37@ "msim" MSIM Simulator
38@ "simics" Virtutech Simics simulator
39@ "lgxemul" GXEmul Little Endian
40@ "bgxemul" GXEmul Big Endian
41@ "indy" SGI Indy
42! [ARCH=mips32] MACHINE (choice)
43
44# Machine type
45@ "ski" Ski ia64 simulator
46@ "i460GX" i460GX chipset machine
47! [ARCH=ia64] MACHINE (choice)
48
49# Framebuffer support
50! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
51
52# Framebuffer width
53@ "640"
54@ "800"
55@ "1024"
56@ "1152"
57@ "1280"
58@ "1400"
59@ "1440"
60@ "1600"
61@ "2048"
62! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
63
64# Framebuffer height
65@ "480"
66@ "600"
67@ "768"
68@ "852"
69@ "900"
70@ "960"
71@ "1024"
72@ "1050"
73@ "1200"
74@ "1536"
75! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
76
77# Framebuffer depth
78@ "8"
79@ "16"
80@ "24"
81! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
82
83# Support for SMP
84! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n)
85
86# Improved support for hyperthreading
87! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n)
88
89# Simics BIOS AP boot fix
90! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
91
92# Lazy FPU context switching
93! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n)
94
95# Power off on halt
96! [ARCH=ppc32] CONFIG_POWEROFF (n/y)
97
98# Use VHPT
99! [ARCH=ia64] CONFIG_VHPT (n/y)
100
101# Use TSB
102! [ARCH=sparc64] CONFIG_TSB (y/n)
103
104# Support for Z8530 serial port
105! [ARCH=sparc64] CONFIG_Z8530 (y/n)
106
107# Support for NS16550 serial port
108! [ARCH=sparc64] CONFIG_NS16550 (y/n)
109
110# Virtually indexed D-cache support
111! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
112
113
114## Debugging configuration directives
115
116# General debuging and assert checking
117! CONFIG_DEBUG (y/n)
118
119# Deadlock detection support for spinlocks
120! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
121
122# Watchpoint on rewriting AS with zero
123! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
124
125# Save all interrupt registers
126! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n)
127
128
129## Run-time configuration directives
130
131# Compile kernel tests
132! CONFIG_TEST (y/n)
133
134
135## Experimental features
136
137# Enable experimental features
138! CONFIG_EXPERIMENTAL (n/y)
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