source: mainline/kernel/kernel.config@ be66dee

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since be66dee was d630139, checked in by Jakub Jermar <jakub@…>, 19 years ago

Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.

  • Property mode set to 100644
File size: 2.9 KB
RevLine 
[34722ee]1## General configuration directives
2
[9371c30]3# Architecture
[36e7b6c3]4@ "amd64" AMD64/Intel EM64T
[d630139]5@ "arm32" ARM 32-bit
[fd8af4b]6@ "ia32" Intel IA-32
[57ce359]7@ "ia32xen" Intel IA-32 on Xen hypervisor
[36e7b6c3]8@ "ia64" Intel IA-64
[9371c30]9@ "mips32" MIPS 32-bit
10@ "ppc32" PowerPC 32-bit
[602c9101]11@ "ppc64" PowerPC 64-bit
[41f7564]12@ "sparc64" Sun UltraSPARC 64-bit
[9371c30]13! ARCH (choice)
14
15# Compiler
16@ "cross" Cross-compiler
17@ "native" Native
[41f7564]18! COMPILER (choice)
[9371c30]19
20# CPU type
21@ "pentium4" Pentium 4
22@ "pentium3" Pentium 3
23@ "athlon-xp" Athlon XP
24@ "athlon-mp" Athlon MP
25@ "prescott" Prescott
[57ce359]26! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice)
[41f7564]27
28# CPU type
29@ "opteron" Opteron
30! [ARCH=amd64] MACHINE (choice)
[9371c30]31
[d630139]32# Machine type
33@ "gxemul" GXEmul
34! [ARCH=arm32] MACHINE (choice)
35
[41f7564]36# Machine type
[9371c30]37@ "msim" MSIM Simulator
38@ "simics" Virtutech Simics simulator
39@ "lgxemul" GXEmul Little Endian
40@ "bgxemul" GXEmul Big Endian
41@ "indy" SGI Indy
[41f7564]42! [ARCH=mips32] MACHINE (choice)
[9371c30]43
[49319ac]44# Machine type
45@ "ski" Ski ia64 simulator
[6dbe6844]46@ "i460GX" i460GX chipset machine
[49319ac]47! [ARCH=ia64] MACHINE (choice)
48
[bbf5657]49# Framebuffer support
[aecf79f]50! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
[22cf454d]51
52# Framebuffer width
53@ "640"
54@ "800"
55@ "1024"
[b0f8c84]56@ "1152"
[22cf454d]57@ "1280"
[b0f8c84]58@ "1400"
59@ "1440"
[22cf454d]60@ "1600"
61@ "2048"
[aecf79f]62! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
[22cf454d]63
64# Framebuffer height
65@ "480"
66@ "600"
67@ "768"
[b0f8c84]68@ "852"
69@ "900"
70@ "960"
[22cf454d]71@ "1024"
[b0f8c84]72@ "1050"
[22cf454d]73@ "1200"
74@ "1536"
[aecf79f]75! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
[22cf454d]76
77# Framebuffer depth
78@ "8"
79@ "16"
80@ "24"
[aecf79f]81! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
[22cf454d]82
[944b15c]83# Support for SMP
[57ce359]84! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n)
[944b15c]85
86# Improved support for hyperthreading
[57ce359]87! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n)
[944b15c]88
[04225a7]89# Simics BIOS AP boot fix
[a0c12f5]90! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
[04225a7]91
[944b15c]92# Lazy FPU context switching
[57ce359]93! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n)
[944b15c]94
[91d5ad6]95# Power off on halt
[898d9f8]96! [ARCH=ppc32] CONFIG_POWEROFF (n/y)
[91d5ad6]97
[eb353b3]98# Use VHPT
99! [ARCH=ia64] CONFIG_VHPT (n/y)
100
101# Use TSB
102! [ARCH=sparc64] CONFIG_TSB (y/n)
103
104# Support for Z8530 serial port
105! [ARCH=sparc64] CONFIG_Z8530 (y/n)
106
107# Support for NS16550 serial port
108! [ARCH=sparc64] CONFIG_NS16550 (y/n)
109
[92778f2]110# Virtually indexed D-cache support
111! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
[eb353b3]112
113
[34722ee]114## Debugging configuration directives
115
116# General debuging and assert checking
117! CONFIG_DEBUG (y/n)
118
119# Deadlock detection support for spinlocks
[b4cad8b2]120! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
[34722ee]121
[4e49572]122# Watchpoint on rewriting AS with zero
[57ce359]123! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
[4e49572]124
[8d25b44]125# Save all interrupt registers
[57ce359]126! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n)
[8d25b44]127
[28ecadb]128
[34722ee]129## Run-time configuration directives
130
[319e60e]131# Compile kernel tests
132! CONFIG_TEST (y/n)
[bd1deed]133
134
135## Experimental features
136
137# Enable experimental features
138! CONFIG_EXPERIMENTAL (n/y)
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