[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2001-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[1bb2e7a] | 29 | /** @addtogroup time
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 |
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[cf26ba9] | 33 | /**
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[b45c443] | 34 | * @file
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[da1bafb] | 35 | * @brief High-level clock interrupt handler.
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[cf26ba9] | 36 | *
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| 37 | * This file contains the clock() function which is the source
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| 38 | * of preemption. It is also responsible for executing expired
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| 39 | * timeouts.
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[da1bafb] | 40 | *
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[cf26ba9] | 41 | */
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[da1bafb] | 42 |
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[f761f1eb] | 43 | #include <time/clock.h>
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| 44 | #include <time/timeout.h>
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| 45 | #include <config.h>
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| 46 | #include <synch/spinlock.h>
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| 47 | #include <synch/waitq.h>
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| 48 | #include <func.h>
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| 49 | #include <proc/scheduler.h>
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| 50 | #include <cpu.h>
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| 51 | #include <arch.h>
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[5c9a08b] | 52 | #include <adt/list.h>
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[23684b7] | 53 | #include <atomic.h>
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[1084a784] | 54 | #include <proc/thread.h>
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[d6e5cbc] | 55 | #include <sysinfo/sysinfo.h>
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| 56 | #include <arch/barrier.h>
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[f8ddd17] | 57 | #include <mm/frame.h>
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| 58 | #include <ddi/ddi.h>
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| 59 |
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[4b662f8c] | 60 | /* Pointer to variable with uptime */
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| 61 | uptime_t *uptime;
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| 62 |
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| 63 | /** Physical memory area of the real time clock */
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[f8ddd17] | 64 | static parea_t clock_parea;
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[d6e5cbc] | 65 |
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[da1bafb] | 66 | /** Fragment of second
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| 67 | *
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| 68 | * For updating seconds correctly.
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| 69 | *
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[d6e5cbc] | 70 | */
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[7f1c620] | 71 | static unative_t secfrag = 0;
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[d6e5cbc] | 72 |
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| 73 | /** Initialize realtime clock counter
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| 74 | *
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| 75 | * The applications (and sometimes kernel) need to access accurate
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| 76 | * information about realtime data. We allocate 1 page with these
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| 77 | * data and update it periodically.
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[da1bafb] | 78 | *
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[d6e5cbc] | 79 | */
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| 80 | void clock_counter_init(void)
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| 81 | {
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[da1bafb] | 82 | void *faddr = frame_alloc(ONE_FRAME, FRAME_ATOMIC);
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[d6e5cbc] | 83 | if (!faddr)
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[f651e80] | 84 | panic("Cannot allocate page for clock.");
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[d6e5cbc] | 85 |
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[4b662f8c] | 86 | uptime = (uptime_t *) PA2KA(faddr);
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| 87 |
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| 88 | uptime->seconds1 = 0;
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| 89 | uptime->seconds2 = 0;
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[9dae191e] | 90 | uptime->useconds = 0;
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[da1bafb] | 91 |
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[f8ddd17] | 92 | clock_parea.pbase = (uintptr_t) faddr;
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| 93 | clock_parea.frames = 1;
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| 94 | ddi_parea_register(&clock_parea);
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[da1bafb] | 95 |
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[f8ddd17] | 96 | /*
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| 97 | * Prepare information for the userspace so that it can successfully
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| 98 | * physmem_map() the clock_parea.
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[da1bafb] | 99 | *
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[f8ddd17] | 100 | */
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| 101 | sysinfo_set_item_val("clock.cacheable", NULL, (unative_t) true);
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| 102 | sysinfo_set_item_val("clock.faddr", NULL, (unative_t) faddr);
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[d6e5cbc] | 103 | }
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| 104 |
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| 105 | /** Update public counters
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| 106 | *
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| 107 | * Update it only on first processor
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[da1bafb] | 108 | * TODO: Do we really need so many write barriers?
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| 109 | *
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[d6e5cbc] | 110 | */
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| 111 | static void clock_update_counters(void)
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| 112 | {
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| 113 | if (CPU->id == 0) {
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[4b662f8c] | 114 | secfrag += 1000000 / HZ;
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[d6e5cbc] | 115 | if (secfrag >= 1000000) {
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[fd8302d] | 116 | secfrag -= 1000000;
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[4b662f8c] | 117 | uptime->seconds1++;
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[d6e5cbc] | 118 | write_barrier();
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[4b662f8c] | 119 | uptime->useconds = secfrag;
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[fd8302d] | 120 | write_barrier();
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[4b662f8c] | 121 | uptime->seconds2 = uptime->seconds1;
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[d6e5cbc] | 122 | } else
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[4b662f8c] | 123 | uptime->useconds += 1000000 / HZ;
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[d6e5cbc] | 124 | }
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| 125 | }
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[f761f1eb] | 126 |
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[70527f1] | 127 | /** Clock routine
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| 128 | *
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| 129 | * Clock routine executed from clock interrupt handler
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[22f7769] | 130 | * (assuming interrupts_disable()'d). Runs expired timeouts
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[70527f1] | 131 | * and preemptive scheduling.
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| 132 | *
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[f761f1eb] | 133 | */
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| 134 | void clock(void)
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| 135 | {
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[98000fb] | 136 | size_t missed_clock_ticks = CPU->missed_clock_ticks;
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[da1bafb] | 137 |
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[e257ae3] | 138 | /* Account lost ticks to CPU usage */
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[da1bafb] | 139 | if (CPU->idle)
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[b8f7ea78] | 140 | CPU->idle_ticks += missed_clock_ticks + 1;
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[da1bafb] | 141 | else
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[e257ae3] | 142 | CPU->busy_ticks += missed_clock_ticks + 1;
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[da1bafb] | 143 |
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[e257ae3] | 144 | CPU->idle = false;
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[da1bafb] | 145 |
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[f761f1eb] | 146 | /*
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| 147 | * To avoid lock ordering problems,
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| 148 | * run all expired timeouts as you visit them.
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[da1bafb] | 149 | *
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[f761f1eb] | 150 | */
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[da1bafb] | 151 | size_t i;
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[8cf8ee6] | 152 | for (i = 0; i <= missed_clock_ticks; i++) {
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[d6e5cbc] | 153 | clock_update_counters();
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[da1bafb] | 154 | irq_spinlock_lock(&CPU->timeoutlock, false);
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| 155 |
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| 156 | link_t *cur;
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| 157 | while ((cur = CPU->timeout_active_head.next) != &CPU->timeout_active_head) {
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| 158 | timeout_t *timeout = list_get_instance(cur, timeout_t, link);
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| 159 |
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| 160 | irq_spinlock_lock(&timeout->lock, false);
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| 161 | if (timeout->ticks-- != 0) {
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| 162 | irq_spinlock_unlock(&timeout->lock, false);
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[c93e805] | 163 | break;
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| 164 | }
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[da1bafb] | 165 |
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| 166 | list_remove(cur);
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| 167 | timeout_handler_t handler = timeout->handler;
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| 168 | void *arg = timeout->arg;
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| 169 | timeout_reinitialize(timeout);
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| 170 |
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| 171 | irq_spinlock_unlock(&timeout->lock, false);
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| 172 | irq_spinlock_unlock(&CPU->timeoutlock, false);
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| 173 |
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| 174 | handler(arg);
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| 175 |
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| 176 | irq_spinlock_lock(&CPU->timeoutlock, false);
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[c93e805] | 177 | }
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[da1bafb] | 178 |
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| 179 | irq_spinlock_unlock(&CPU->timeoutlock, false);
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[f761f1eb] | 180 | }
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[c93e805] | 181 | CPU->missed_clock_ticks = 0;
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[da1bafb] | 182 |
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[f761f1eb] | 183 | /*
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[43114c5] | 184 | * Do CPU usage accounting and find out whether to preempt THREAD.
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[da1bafb] | 185 | *
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[f761f1eb] | 186 | */
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[da1bafb] | 187 |
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[43114c5] | 188 | if (THREAD) {
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[7f1c620] | 189 | uint64_t ticks;
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[dbe9ff0] | 190 |
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[da1bafb] | 191 | irq_spinlock_lock(&CPU->lock, false);
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[8cf8ee6] | 192 | CPU->needs_relink += 1 + missed_clock_ticks;
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[da1bafb] | 193 | irq_spinlock_unlock(&CPU->lock, false);
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| 194 |
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| 195 | irq_spinlock_lock(&THREAD->lock, false);
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[8cf8ee6] | 196 | if ((ticks = THREAD->ticks)) {
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| 197 | if (ticks >= 1 + missed_clock_ticks)
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| 198 | THREAD->ticks -= 1 + missed_clock_ticks;
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| 199 | else
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| 200 | THREAD->ticks = 0;
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| 201 | }
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[da1bafb] | 202 | irq_spinlock_unlock(&THREAD->lock, false);
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[dbe9ff0] | 203 |
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[2e4e706] | 204 | if ((!ticks) && (!PREEMPTION_DISABLED)) {
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[f761f1eb] | 205 | scheduler();
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[3ff2b54] | 206 | #ifdef CONFIG_UDEBUG
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| 207 | /*
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| 208 | * Give udebug chance to stop the thread
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[5d9430d7] | 209 | * before it begins executing userspace code.
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[3ff2b54] | 210 | */
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[da1bafb] | 211 | istate_t *istate = THREAD->udebug.uspace_state;
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| 212 | if ((istate) && (istate_from_uspace(istate)))
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[3ff2b54] | 213 | udebug_before_thread_runs();
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| 214 | #endif
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[f761f1eb] | 215 | }
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| 216 | }
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| 217 | }
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[b45c443] | 218 |
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[1bb2e7a] | 219 | /** @}
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[b45c443] | 220 | */
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