[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2001-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[cc73a8a1] | 29 | /** @addtogroup sync
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 |
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[cf26ba9] | 33 | /**
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[b45c443] | 34 | * @file
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[b60c582] | 35 | * @brief Spinlocks.
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[cf26ba9] | 36 | */
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[b60c582] | 37 |
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[5e04b48d] | 38 | #include <synch/spinlock.h>
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[23684b7] | 39 | #include <atomic.h>
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[7dd56f1] | 40 | #include <arch/barrier.h>
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[5e04b48d] | 41 | #include <arch.h>
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[c842f04] | 42 | #include <preemption.h>
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[9c0a9b3] | 43 | #include <print.h>
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[5e04b48d] | 44 | #include <debug.h>
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[2d93f1f9] | 45 | #include <symtab.h>
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[f761f1eb] | 46 |
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[5f85c91] | 47 | #ifdef CONFIG_SMP
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[f761f1eb] | 48 |
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[5e04b48d] | 49 | /** Initialize spinlock
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| 50 | *
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| 51 | * @param sl Pointer to spinlock_t structure.
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[90c8b8d] | 52 | *
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[5e04b48d] | 53 | */
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[a000878c] | 54 | void spinlock_initialize(spinlock_t *lock, const char *name)
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[f761f1eb] | 55 | {
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[90c8b8d] | 56 | atomic_set(&lock->val, 0);
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[2d93f1f9] | 57 | #ifdef CONFIG_DEBUG_SPINLOCK
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[90c8b8d] | 58 | lock->name = name;
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| 59 | #endif
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[f761f1eb] | 60 | }
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| 61 |
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[90c8b8d] | 62 | #ifdef CONFIG_DEBUG_SPINLOCK
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| 63 |
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[5e04b48d] | 64 | /** Lock spinlock
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| 65 | *
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| 66 | * Lock spinlock.
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| 67 | * This version has limitted ability to report
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| 68 | * possible occurence of deadlock.
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| 69 | *
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[90c8b8d] | 70 | * @param lock Pointer to spinlock_t structure.
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| 71 | *
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[5e04b48d] | 72 | */
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[90c8b8d] | 73 | void spinlock_lock_debug(spinlock_t *lock)
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[f761f1eb] | 74 | {
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[98000fb] | 75 | size_t i = 0;
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[05e2a7ad] | 76 | bool deadlock_reported = false;
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[90c8b8d] | 77 |
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[c842f04] | 78 | preemption_disable();
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[90c8b8d] | 79 | while (test_and_set(&lock->val)) {
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[d9cf9d5f] | 80 | /*
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[90c8b8d] | 81 | * We need to be careful about particular locks
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| 82 | * which are directly used to report deadlocks
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| 83 | * via printf() (and recursively other functions).
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| 84 | * This conserns especially printf_lock and the
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| 85 | * framebuffer lock.
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[d9cf9d5f] | 86 | *
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[90c8b8d] | 87 | * Any lock whose name is prefixed by "*" will be
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| 88 | * ignored by this deadlock detection routine
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| 89 | * as this might cause an infinite recursion.
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[d9cf9d5f] | 90 | * We trust our code that there is no possible deadlock
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[90c8b8d] | 91 | * caused by these locks (except when an exception
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| 92 | * is triggered for instance by printf()).
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| 93 | *
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| 94 | * We encountered false positives caused by very
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| 95 | * slow framebuffer interaction (especially when
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[d9cf9d5f] | 96 | * run in a simulator) that caused problems with both
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[90c8b8d] | 97 | * printf_lock and the framebuffer lock.
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[d9cf9d5f] | 98 | *
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| 99 | */
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[90c8b8d] | 100 | if (lock->name[0] == '*')
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[d9cf9d5f] | 101 | continue;
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[90c8b8d] | 102 |
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[14df080] | 103 | if (i++ > DEADLOCK_THRESHOLD) {
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[7e752b2] | 104 | printf("cpu%u: looping on spinlock %p:%s, "
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| 105 | "caller=%p (%s)\n", CPU->id, lock, lock->name,
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| 106 | (void *) CALLER, symtab_fmt_name_lookup(CALLER));
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[44814b8] | 107 |
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[f761f1eb] | 108 | i = 0;
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[05e2a7ad] | 109 | deadlock_reported = true;
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[f761f1eb] | 110 | }
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| 111 | }
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[90c8b8d] | 112 |
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[05e2a7ad] | 113 | if (deadlock_reported)
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[8ed4014] | 114 | printf("cpu%u: not deadlocked\n", CPU->id);
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[90c8b8d] | 115 |
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[5e04b48d] | 116 | /*
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| 117 | * Prevent critical section code from bleeding out this way up.
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| 118 | */
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[7dd56f1] | 119 | CS_ENTER_BARRIER();
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[f761f1eb] | 120 | }
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[90c8b8d] | 121 |
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[13108f24] | 122 | /** Unlock spinlock
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| 123 | *
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| 124 | * Unlock spinlock.
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| 125 | *
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| 126 | * @param sl Pointer to spinlock_t structure.
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| 127 | */
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| 128 | void spinlock_unlock_debug(spinlock_t *lock)
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| 129 | {
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[ffe4a87] | 130 | ASSERT_SPINLOCK(spinlock_locked(lock), lock);
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[13108f24] | 131 |
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| 132 | /*
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| 133 | * Prevent critical section code from bleeding out this way down.
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| 134 | */
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| 135 | CS_LEAVE_BARRIER();
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| 136 |
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| 137 | atomic_set(&lock->val, 0);
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| 138 | preemption_enable();
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| 139 | }
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| 140 |
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[f761f1eb] | 141 | #endif
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| 142 |
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[5e04b48d] | 143 | /** Lock spinlock conditionally
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| 144 | *
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[2b4a9f26] | 145 | * Lock spinlock conditionally. If the spinlock is not available
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| 146 | * at the moment, signal failure.
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[5e04b48d] | 147 | *
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[90c8b8d] | 148 | * @param lock Pointer to spinlock_t structure.
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[5e04b48d] | 149 | *
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| 150 | * @return Zero on failure, non-zero otherwise.
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[90c8b8d] | 151 | *
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[5e04b48d] | 152 | */
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[90c8b8d] | 153 | int spinlock_trylock(spinlock_t *lock)
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[f761f1eb] | 154 | {
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[c842f04] | 155 | preemption_disable();
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[90c8b8d] | 156 | int rc = !test_and_set(&lock->val);
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| 157 |
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[5e04b48d] | 158 | /*
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| 159 | * Prevent critical section code from bleeding out this way up.
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| 160 | */
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[7dd56f1] | 161 | CS_ENTER_BARRIER();
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[90c8b8d] | 162 |
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[c842f04] | 163 | if (!rc)
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| 164 | preemption_enable();
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[7dd56f1] | 165 |
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| 166 | return rc;
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[f761f1eb] | 167 | }
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| 168 |
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[ffe4a87] | 169 | /** Find out whether the spinlock is currently locked.
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| 170 | *
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| 171 | * @param lock Spinlock.
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| 172 | * @return True if the spinlock is locked, false otherwise.
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| 173 | */
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| 174 | bool spinlock_locked(spinlock_t *lock)
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| 175 | {
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| 176 | return atomic_get(&lock->val) != 0;
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| 177 | }
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| 178 |
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[f761f1eb] | 179 | #endif
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[b45c443] | 180 |
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[a9f1372] | 181 | /** Initialize interrupts-disabled spinlock
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| 182 | *
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| 183 | * @param lock IRQ spinlock to be initialized.
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| 184 | * @param name IRQ spinlock name.
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| 185 | *
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| 186 | */
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| 187 | void irq_spinlock_initialize(irq_spinlock_t *lock, const char *name)
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| 188 | {
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| 189 | spinlock_initialize(&(lock->lock), name);
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| 190 | lock->guard = false;
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| 191 | lock->ipl = 0;
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| 192 | }
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| 193 |
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| 194 | /** Lock interrupts-disabled spinlock
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| 195 | *
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| 196 | * Lock a spinlock which requires disabled interrupts.
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| 197 | *
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| 198 | * @param lock IRQ spinlock to be locked.
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| 199 | * @param irq_dis If true, interrupts are actually disabled
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| 200 | * prior locking the spinlock. If false, interrupts
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| 201 | * are expected to be already disabled.
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| 202 | *
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| 203 | */
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| 204 | void irq_spinlock_lock(irq_spinlock_t *lock, bool irq_dis)
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| 205 | {
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| 206 | if (irq_dis) {
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| 207 | ipl_t ipl = interrupts_disable();
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| 208 | spinlock_lock(&(lock->lock));
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| 209 |
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| 210 | lock->guard = true;
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| 211 | lock->ipl = ipl;
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| 212 | } else {
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| 213 | ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
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| 214 |
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| 215 | spinlock_lock(&(lock->lock));
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| 216 | ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
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| 217 | }
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| 218 | }
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| 219 |
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| 220 | /** Unlock interrupts-disabled spinlock
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| 221 | *
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| 222 | * Unlock a spinlock which requires disabled interrupts.
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| 223 | *
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| 224 | * @param lock IRQ spinlock to be unlocked.
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| 225 | * @param irq_res If true, interrupts are restored to previously
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| 226 | * saved interrupt level.
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| 227 | *
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| 228 | */
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| 229 | void irq_spinlock_unlock(irq_spinlock_t *lock, bool irq_res)
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| 230 | {
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| 231 | ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
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| 232 |
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| 233 | if (irq_res) {
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| 234 | ASSERT_IRQ_SPINLOCK(lock->guard, lock);
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| 235 |
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| 236 | lock->guard = false;
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| 237 | ipl_t ipl = lock->ipl;
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| 238 |
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| 239 | spinlock_unlock(&(lock->lock));
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| 240 | interrupts_restore(ipl);
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| 241 | } else {
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| 242 | ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
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| 243 | spinlock_unlock(&(lock->lock));
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| 244 | }
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| 245 | }
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| 246 |
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| 247 | /** Lock interrupts-disabled spinlock
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| 248 | *
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| 249 | * Lock an interrupts-disabled spinlock conditionally. If the
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| 250 | * spinlock is not available at the moment, signal failure.
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| 251 | * Interrupts are expected to be already disabled.
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| 252 | *
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| 253 | * @param lock IRQ spinlock to be locked conditionally.
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| 254 | *
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| 255 | * @return Zero on failure, non-zero otherwise.
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| 256 | *
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| 257 | */
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| 258 | int irq_spinlock_trylock(irq_spinlock_t *lock)
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| 259 | {
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| 260 | ASSERT_IRQ_SPINLOCK(interrupts_disabled(), lock);
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| 261 | int rc = spinlock_trylock(&(lock->lock));
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| 262 |
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| 263 | ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
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| 264 | return rc;
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| 265 | }
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| 266 |
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| 267 | /** Pass lock from one interrupts-disabled spinlock to another
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| 268 | *
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| 269 | * Pass lock from one IRQ spinlock to another IRQ spinlock
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| 270 | * without enabling interrupts during the process.
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| 271 | *
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| 272 | * The first IRQ spinlock is supposed to be locked.
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| 273 | *
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| 274 | * @param unlock IRQ spinlock to be unlocked.
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| 275 | * @param lock IRQ spinlock to be locked.
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| 276 | *
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| 277 | */
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| 278 | void irq_spinlock_pass(irq_spinlock_t *unlock, irq_spinlock_t *lock)
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| 279 | {
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| 280 | ASSERT_IRQ_SPINLOCK(interrupts_disabled(), unlock);
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| 281 |
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| 282 | /* Pass guard from unlock to lock */
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| 283 | bool guard = unlock->guard;
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| 284 | ipl_t ipl = unlock->ipl;
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| 285 | unlock->guard = false;
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| 286 |
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| 287 | spinlock_unlock(&(unlock->lock));
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| 288 | spinlock_lock(&(lock->lock));
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| 289 |
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| 290 | ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
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| 291 |
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| 292 | if (guard) {
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| 293 | lock->guard = true;
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| 294 | lock->ipl = ipl;
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| 295 | }
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| 296 | }
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| 297 |
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| 298 | /** Hand-over-hand locking of interrupts-disabled spinlocks
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| 299 | *
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| 300 | * Implement hand-over-hand locking between two interrupts-disabled
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| 301 | * spinlocks without enabling interrupts during the process.
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| 302 | *
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| 303 | * The first IRQ spinlock is supposed to be locked.
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| 304 | *
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| 305 | * @param unlock IRQ spinlock to be unlocked.
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| 306 | * @param lock IRQ spinlock to be locked.
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| 307 | *
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| 308 | */
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| 309 | void irq_spinlock_exchange(irq_spinlock_t *unlock, irq_spinlock_t *lock)
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| 310 | {
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| 311 | ASSERT_IRQ_SPINLOCK(interrupts_disabled(), unlock);
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| 312 |
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| 313 | spinlock_lock(&(lock->lock));
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| 314 | ASSERT_IRQ_SPINLOCK(!lock->guard, lock);
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| 315 |
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| 316 | /* Pass guard from unlock to lock */
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| 317 | if (unlock->guard) {
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| 318 | lock->guard = true;
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| 319 | lock->ipl = unlock->ipl;
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| 320 | unlock->guard = false;
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| 321 | }
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| 322 |
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| 323 | spinlock_unlock(&(unlock->lock));
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| 324 | }
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| 325 |
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[ffe4a87] | 326 | /** Find out whether the IRQ spinlock is currently locked.
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| 327 | *
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| 328 | * @param lock IRQ spinlock.
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| 329 | * @return True if the IRQ spinlock is locked, false otherwise.
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| 330 | */
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| 331 | bool irq_spinlock_locked(irq_spinlock_t *ilock)
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| 332 | {
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| 333 | return spinlock_locked(&ilock->lock);
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| 334 | }
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| 335 |
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[cc73a8a1] | 336 | /** @}
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[b45c443] | 337 | */
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