[e0c80f66] | 1 | /*
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| 2 | * Copyright (c) 2012 Adam Hraska
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup generic
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| 30 | * @{
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| 31 | */
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| 32 |
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| 33 | /**
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| 34 | * @file
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| 35 | * @brief Facility to invoke functions on other cpus via IPIs.
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| 36 | */
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| 37 |
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[2ee1ccc] | 38 | #include <smp/smp_call.h>
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[1066041] | 39 | #include <arch/barrier.h>
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| 40 | #include <arch/asm.h> /* interrupt_disable */
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[2ee1ccc] | 41 | #include <arch.h>
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[63e27ef] | 42 | #include <assert.h>
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[2ee1ccc] | 43 | #include <config.h>
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| 44 | #include <preemption.h>
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[1066041] | 45 | #include <cpu.h>
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[2ee1ccc] | 46 |
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| 47 | static void call_start(smp_call_t *call_info, smp_call_func_t func, void *arg);
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| 48 | static void call_done(smp_call_t *call_info);
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| 49 | static void call_wait(smp_call_t *call_info);
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| 50 |
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| 51 |
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[e0c80f66] | 52 | /** Init smp_call() on the local cpu. */
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[2ee1ccc] | 53 | void smp_call_init(void)
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| 54 | {
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[63e27ef] | 55 | assert(CPU);
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| 56 | assert(PREEMPTION_DISABLED || interrupts_disabled());
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[a35b458] | 57 |
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[2ee1ccc] | 58 | spinlock_initialize(&CPU->smp_calls_lock, "cpu[].smp_calls_lock");
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| 59 | list_initialize(&CPU->smp_pending_calls);
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| 60 | }
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| 61 |
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| 62 | /** Invokes a function on a specific cpu and waits for it to complete.
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[1b20da0] | 63 | *
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| 64 | * Calls @a func on the CPU denoted by its logical id @cpu_id .
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| 65 | * The function will execute with interrupts disabled. It should
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| 66 | * be a quick and simple function and must never block.
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| 67 | *
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[2ee1ccc] | 68 | * If @a cpu_id is the local CPU, the function will be invoked
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| 69 | * directly.
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[1b20da0] | 70 | *
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[25969ac] | 71 | * All memory accesses of prior to smp_call() will be visible
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| 72 | * to @a func on cpu @a cpu_id. Similarly, any changes @a func
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| 73 | * makes on cpu @a cpu_id will be visible on this cpu once
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| 74 | * smp_call() returns.
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[1b20da0] | 75 | *
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[25969ac] | 76 | * Invoking @a func on the destination cpu acts as a memory barrier
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| 77 | * on that cpu.
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[1b20da0] | 78 | *
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[2ee1ccc] | 79 | * @param cpu_id Destination CPU's logical id (eg CPU->id)
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| 80 | * @param func Function to call.
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| 81 | * @param arg Argument to pass to the user supplied function @a func.
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| 82 | */
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| 83 | void smp_call(unsigned int cpu_id, smp_call_func_t func, void *arg)
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| 84 | {
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| 85 | smp_call_t call_info;
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| 86 | smp_call_async(cpu_id, func, arg, &call_info);
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| 87 | smp_call_wait(&call_info);
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| 88 | }
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| 89 |
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| 90 | /** Invokes a function on a specific cpu asynchronously.
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[1b20da0] | 91 | *
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| 92 | * Calls @a func on the CPU denoted by its logical id @cpu_id .
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| 93 | * The function will execute with interrupts disabled. It should
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| 94 | * be a quick and simple function and must never block.
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| 95 | *
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| 96 | * Pass @a call_info to smp_call_wait() in order to wait for
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[2ee1ccc] | 97 | * @a func to complete.
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[1b20da0] | 98 | *
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[25969ac] | 99 | * @a call_info must be valid until/after @a func returns. Use
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| 100 | * smp_call_wait() to wait until it is safe to free @a call_info.
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[1b20da0] | 101 | *
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[2ee1ccc] | 102 | * If @a cpu_id is the local CPU, the function will be invoked
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[d70fc74] | 103 | * directly. If the destination cpu id @a cpu_id is invalid
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| 104 | * or denotes an inactive cpu, the call is discarded immediately.
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[1b20da0] | 105 | *
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[25969ac] | 106 | * All memory accesses of the caller prior to smp_call_async()
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[1b20da0] | 107 | * will be made visible to @a func on the other cpu. Similarly,
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[25969ac] | 108 | * any changes @a func makes on cpu @a cpu_id will be visible
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| 109 | * to this cpu when smp_call_wait() returns.
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[1b20da0] | 110 | *
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[25969ac] | 111 | * Invoking @a func on the destination cpu acts as a memory barrier
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| 112 | * on that cpu.
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[1b20da0] | 113 | *
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[d71331b] | 114 | * Interrupts must be enabled. Otherwise you run the risk
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| 115 | * of a deadlock.
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[1b20da0] | 116 | *
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[d70fc74] | 117 | * @param cpu_id Destination CPU's logical id (eg CPU->id).
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[2ee1ccc] | 118 | * @param func Function to call.
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| 119 | * @param arg Argument to pass to the user supplied function @a func.
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| 120 | * @param call_info Use it to wait for the function to complete. Must
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| 121 | * be valid until the function completes.
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| 122 | */
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[1b20da0] | 123 | void smp_call_async(unsigned int cpu_id, smp_call_func_t func, void *arg,
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[1433ecda] | 124 | smp_call_t *call_info)
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[2ee1ccc] | 125 | {
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[1b20da0] | 126 | /*
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| 127 | * Interrupts must not be disabled or you run the risk of a deadlock
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[4f5e1c7c] | 128 | * if both the destination and source cpus try to send an IPI to each
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[1b20da0] | 129 | * other with interrupts disabled. Because the interrupts are disabled
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| 130 | * the IPIs cannot be delivered and both cpus will forever busy wait
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[4f5e1c7c] | 131 | * for an acknowledgment of the IPI from the other cpu.
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| 132 | */
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[63e27ef] | 133 | assert(!interrupts_disabled());
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| 134 | assert(call_info != NULL);
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[a35b458] | 135 |
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[2ee1ccc] | 136 | /* Discard invalid calls. */
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[d70fc74] | 137 | if (config.cpu_count <= cpu_id || !cpus[cpu_id].active) {
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[2ee1ccc] | 138 | call_start(call_info, func, arg);
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| 139 | call_done(call_info);
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| 140 | return;
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| 141 | }
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[a35b458] | 142 |
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[2ee1ccc] | 143 | /* Protect cpu->id against migration. */
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| 144 | preemption_disable();
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[d70fc74] | 145 |
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[2ee1ccc] | 146 | call_start(call_info, func, arg);
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[a35b458] | 147 |
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[2ee1ccc] | 148 | if (cpu_id != CPU->id) {
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| 149 | #ifdef CONFIG_SMP
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| 150 | spinlock_lock(&cpus[cpu_id].smp_calls_lock);
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| 151 | list_append(&call_info->calls_link, &cpus[cpu_id].smp_pending_calls);
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| 152 | spinlock_unlock(&cpus[cpu_id].smp_calls_lock);
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[d70fc74] | 153 |
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| 154 | /*
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| 155 | * If a platform supports SMP it must implement arch_smp_call_ipi().
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[cc106e4] | 156 | * It should issue an IPI on cpu_id and invoke smp_call_ipi_recv()
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[1b20da0] | 157 | * on cpu_id in turn.
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| 158 | *
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[d70fc74] | 159 | * Do not implement as just an empty dummy function. Instead
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[1b20da0] | 160 | * consider providing a full implementation or at least a version
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[d70fc74] | 161 | * that panics if invoked. Note that smp_call_async() never
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| 162 | * calls arch_smp_call_ipi() on uniprocessors even if CONFIG_SMP.
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| 163 | */
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[2ee1ccc] | 164 | arch_smp_call_ipi(cpu_id);
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| 165 | #endif
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| 166 | } else {
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| 167 | /* Invoke local smp calls in place. */
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| 168 | ipl_t ipl = interrupts_disable();
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| 169 | func(arg);
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| 170 | interrupts_restore(ipl);
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[a35b458] | 171 |
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[2ee1ccc] | 172 | call_done(call_info);
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| 173 | }
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[a35b458] | 174 |
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[2ee1ccc] | 175 | preemption_enable();
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| 176 | }
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| 177 |
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| 178 | /** Waits for a function invoked on another CPU asynchronously to complete.
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[1b20da0] | 179 | *
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[d71331b] | 180 | * Does not sleep but rather spins.
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[1b20da0] | 181 | *
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[2ee1ccc] | 182 | * Example usage:
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| 183 | * @code
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| 184 | * void hello(void *p) {
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| 185 | * puts((char*)p);
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| 186 | * }
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[1b20da0] | 187 | *
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[2ee1ccc] | 188 | * smp_call_t call_info;
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| 189 | * smp_call_async(cpus[2].id, hello, "hi!\n", &call_info);
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| 190 | * // Do some work. In the meantime, hello() is executed on cpu2.
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| 191 | * smp_call_wait(&call_info);
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| 192 | * @endcode
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[1b20da0] | 193 | *
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[2ee1ccc] | 194 | * @param call_info Initialized by smp_call_async().
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| 195 | */
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| 196 | void smp_call_wait(smp_call_t *call_info)
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| 197 | {
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| 198 | call_wait(call_info);
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| 199 | }
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| 200 |
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[d71331b] | 201 | #ifdef CONFIG_SMP
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| 202 |
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[2ee1ccc] | 203 | /** Architecture independent smp call IPI handler.
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[1b20da0] | 204 | *
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[d70fc74] | 205 | * Interrupts must be disabled. Tolerates spurious calls.
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[2ee1ccc] | 206 | */
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| 207 | void smp_call_ipi_recv(void)
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| 208 | {
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[63e27ef] | 209 | assert(interrupts_disabled());
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| 210 | assert(CPU);
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[a35b458] | 211 |
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[2ee1ccc] | 212 | list_t calls_list;
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| 213 | list_initialize(&calls_list);
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[a35b458] | 214 |
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[1b20da0] | 215 | /*
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[25969ac] | 216 | * Acts as a load memory barrier. Any changes made by the cpu that
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| 217 | * added the smp_call to calls_list will be made visible to this cpu.
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| 218 | */
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[2ee1ccc] | 219 | spinlock_lock(&CPU->smp_calls_lock);
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[c14762e] | 220 | list_concat(&calls_list, &CPU->smp_pending_calls);
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[2ee1ccc] | 221 | spinlock_unlock(&CPU->smp_calls_lock);
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| 222 |
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| 223 | /* Walk the list manually, so that we can safely remove list items. */
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[1433ecda] | 224 | for (link_t * cur = calls_list.head.next, *next = cur->next;
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| 225 | !list_empty(&calls_list); cur = next, next = cur->next) {
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[a35b458] | 226 |
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[2ee1ccc] | 227 | smp_call_t *call_info = list_get_instance(cur, smp_call_t, calls_link);
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| 228 | list_remove(cur);
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[a35b458] | 229 |
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[2ee1ccc] | 230 | call_info->func(call_info->arg);
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| 231 | call_done(call_info);
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| 232 | }
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| 233 | }
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| 234 |
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[d71331b] | 235 | #endif /* CONFIG_SMP */
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[2ee1ccc] | 236 |
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| 237 | static void call_start(smp_call_t *call_info, smp_call_func_t func, void *arg)
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| 238 | {
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| 239 | link_initialize(&call_info->calls_link);
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| 240 | call_info->func = func;
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| 241 | call_info->arg = arg;
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[a35b458] | 242 |
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[2ee1ccc] | 243 | /*
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| 244 | * We can't use standard spinlocks here because we want to lock
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| 245 | * the structure on one cpu and unlock it on another (without
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| 246 | * messing up the preemption count).
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| 247 | */
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| 248 | atomic_set(&call_info->pending, 1);
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[a35b458] | 249 |
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[2ee1ccc] | 250 | /* Let initialization complete before continuing. */
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| 251 | memory_barrier();
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| 252 | }
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| 253 |
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| 254 | static void call_done(smp_call_t *call_info)
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| 255 | {
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[1b20da0] | 256 | /*
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| 257 | * Separate memory accesses of the called function from the
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[2ee1ccc] | 258 | * announcement of its completion.
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| 259 | */
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| 260 | memory_barrier();
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| 261 | atomic_set(&call_info->pending, 0);
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| 262 | }
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| 263 |
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| 264 | static void call_wait(smp_call_t *call_info)
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| 265 | {
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| 266 | do {
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[1b20da0] | 267 | /*
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[2ee1ccc] | 268 | * Ensure memory accesses following call_wait() are ordered
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[1b20da0] | 269 | * after completion of the called function on another cpu.
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[2ee1ccc] | 270 | * Also, speed up loading of call_info->pending.
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| 271 | */
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| 272 | memory_barrier();
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| 273 | } while (atomic_get(&call_info->pending));
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| 274 | }
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| 275 |
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| 276 |
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[e0c80f66] | 277 | /** @}
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| 278 | */
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