source: mainline/kernel/generic/src/mm/tlb.c@ da1bafb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da1bafb was da1bafb, checked in by Martin Decky <martin@…>, 15 years ago

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genericmm
30 * @{
31 */
32
33/**
34 * @file
35 * @brief Generic TLB shootdown algorithm.
36 *
37 * The algorithm implemented here is based on the CMU TLB shootdown
38 * algorithm and is further simplified (e.g. all CPUs receive all TLB
39 * shootdown messages).
40 */
41
42#include <mm/tlb.h>
43#include <mm/asid.h>
44#include <arch/mm/tlb.h>
45#include <smp/ipi.h>
46#include <synch/spinlock.h>
47#include <atomic.h>
48#include <arch/interrupt.h>
49#include <config.h>
50#include <arch.h>
51#include <panic.h>
52#include <debug.h>
53#include <cpu.h>
54
55void tlb_init(void)
56{
57 tlb_arch_init();
58}
59
60#ifdef CONFIG_SMP
61
62/**
63 * This lock is used for synchronisation between sender and
64 * recipients of TLB shootdown message. It must be acquired
65 * before CPU structure lock.
66 *
67 */
68IRQ_SPINLOCK_STATIC_INITIALIZE(tlblock);
69
70/** Send TLB shootdown message.
71 *
72 * This function attempts to deliver TLB shootdown message
73 * to all other processors.
74 *
75 * This function must be called with interrupts disabled.
76 *
77 * @param type Type describing scope of shootdown.
78 * @param asid Address space, if required by type.
79 * @param page Virtual page address, if required by type.
80 * @param count Number of pages, if required by type.
81 *
82 */
83void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,
84 uintptr_t page, size_t count)
85{
86 CPU->tlb_active = false;
87 irq_spinlock_lock(&tlblock, false);
88
89 size_t i;
90 for (i = 0; i < config.cpu_count; i++) {
91 cpu_t *cpu;
92
93 if (i == CPU->id)
94 continue;
95
96 cpu = &cpus[i];
97 irq_spinlock_lock(&cpu->lock, false);
98 if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
99 /*
100 * The message queue is full.
101 * Erase the queue and store one TLB_INVL_ALL message.
102 */
103 cpu->tlb_messages_count = 1;
104 cpu->tlb_messages[0].type = TLB_INVL_ALL;
105 cpu->tlb_messages[0].asid = ASID_INVALID;
106 cpu->tlb_messages[0].page = 0;
107 cpu->tlb_messages[0].count = 0;
108 } else {
109 /*
110 * Enqueue the message.
111 */
112 size_t idx = cpu->tlb_messages_count++;
113 cpu->tlb_messages[idx].type = type;
114 cpu->tlb_messages[idx].asid = asid;
115 cpu->tlb_messages[idx].page = page;
116 cpu->tlb_messages[idx].count = count;
117 }
118 irq_spinlock_unlock(&cpu->lock, false);
119 }
120
121 tlb_shootdown_ipi_send();
122
123busy_wait:
124 for (i = 0; i < config.cpu_count; i++)
125 if (cpus[i].tlb_active)
126 goto busy_wait;
127}
128
129/** Finish TLB shootdown sequence.
130 *
131 */
132void tlb_shootdown_finalize(void)
133{
134 irq_spinlock_unlock(&tlblock, false);
135 CPU->tlb_active = true;
136}
137
138void tlb_shootdown_ipi_send(void)
139{
140 ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
141}
142
143/** Receive TLB shootdown message.
144 *
145 */
146void tlb_shootdown_ipi_recv(void)
147{
148 ASSERT(CPU);
149
150 CPU->tlb_active = false;
151 irq_spinlock_lock(&tlblock, false);
152 irq_spinlock_unlock(&tlblock, false);
153
154 irq_spinlock_lock(&CPU->lock, false);
155 ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
156
157 size_t i;
158 for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
159 tlb_invalidate_type_t type = CPU->tlb_messages[i].type;
160 asid_t asid = CPU->tlb_messages[i].asid;
161 uintptr_t page = CPU->tlb_messages[i].page;
162 size_t count = CPU->tlb_messages[i].count;
163
164 switch (type) {
165 case TLB_INVL_ALL:
166 tlb_invalidate_all();
167 break;
168 case TLB_INVL_ASID:
169 tlb_invalidate_asid(asid);
170 break;
171 case TLB_INVL_PAGES:
172 ASSERT(count);
173 tlb_invalidate_pages(asid, page, count);
174 break;
175 default:
176 panic("Unknown type (%d).", type);
177 break;
178 }
179
180 if (type == TLB_INVL_ALL)
181 break;
182 }
183
184 irq_spinlock_unlock(&CPU->lock, false);
185 CPU->tlb_active = true;
186}
187
188#endif /* CONFIG_SMP */
189
190/** @}
191 */
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