1 | /*
|
---|
2 | * Copyright (c) 2001-2004 Jakub Jermar
|
---|
3 | * All rights reserved.
|
---|
4 | *
|
---|
5 | * Redistribution and use in source and binary forms, with or without
|
---|
6 | * modification, are permitted provided that the following conditions
|
---|
7 | * are met:
|
---|
8 | *
|
---|
9 | * - Redistributions of source code must retain the above copyright
|
---|
10 | * notice, this list of conditions and the following disclaimer.
|
---|
11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
12 | * notice, this list of conditions and the following disclaimer in the
|
---|
13 | * documentation and/or other materials provided with the distribution.
|
---|
14 | * - The name of the author may not be used to endorse or promote products
|
---|
15 | * derived from this software without specific prior written permission.
|
---|
16 | *
|
---|
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
27 | */
|
---|
28 |
|
---|
29 | /** @addtogroup genericmm
|
---|
30 | * @{
|
---|
31 | */
|
---|
32 |
|
---|
33 | /**
|
---|
34 | * @file
|
---|
35 | * @brief Generic TLB shootdown algorithm.
|
---|
36 | *
|
---|
37 | * The algorithm implemented here is based on the CMU TLB shootdown
|
---|
38 | * algorithm and is further simplified (e.g. all CPUs receive all TLB
|
---|
39 | * shootdown messages).
|
---|
40 | */
|
---|
41 |
|
---|
42 | #include <mm/tlb.h>
|
---|
43 | #include <mm/asid.h>
|
---|
44 | #include <arch/mm/tlb.h>
|
---|
45 | #include <smp/ipi.h>
|
---|
46 | #include <synch/spinlock.h>
|
---|
47 | #include <atomic.h>
|
---|
48 | #include <arch/interrupt.h>
|
---|
49 | #include <config.h>
|
---|
50 | #include <arch.h>
|
---|
51 | #include <panic.h>
|
---|
52 | #include <debug.h>
|
---|
53 | #include <cpu.h>
|
---|
54 |
|
---|
55 | void tlb_init(void)
|
---|
56 | {
|
---|
57 | tlb_arch_init();
|
---|
58 | }
|
---|
59 |
|
---|
60 | #ifdef CONFIG_SMP
|
---|
61 |
|
---|
62 | /**
|
---|
63 | * This lock is used for synchronisation between sender and
|
---|
64 | * recipients of TLB shootdown message. It must be acquired
|
---|
65 | * before CPU structure lock.
|
---|
66 | *
|
---|
67 | */
|
---|
68 | IRQ_SPINLOCK_STATIC_INITIALIZE(tlblock);
|
---|
69 |
|
---|
70 | /** Send TLB shootdown message.
|
---|
71 | *
|
---|
72 | * This function attempts to deliver TLB shootdown message
|
---|
73 | * to all other processors.
|
---|
74 | *
|
---|
75 | * @param type Type describing scope of shootdown.
|
---|
76 | * @param asid Address space, if required by type.
|
---|
77 | * @param page Virtual page address, if required by type.
|
---|
78 | * @param count Number of pages, if required by type.
|
---|
79 | *
|
---|
80 | * @return The interrupt priority level as it existed prior to this call.
|
---|
81 | *
|
---|
82 | */
|
---|
83 | ipl_t tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,
|
---|
84 | uintptr_t page, size_t count)
|
---|
85 | {
|
---|
86 | ipl_t ipl = interrupts_disable();
|
---|
87 | CPU->tlb_active = false;
|
---|
88 | irq_spinlock_lock(&tlblock, false);
|
---|
89 |
|
---|
90 | size_t i;
|
---|
91 | for (i = 0; i < config.cpu_count; i++) {
|
---|
92 | if (i == CPU->id)
|
---|
93 | continue;
|
---|
94 |
|
---|
95 | cpu_t *cpu = &cpus[i];
|
---|
96 |
|
---|
97 | irq_spinlock_lock(&cpu->lock, false);
|
---|
98 | if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
|
---|
99 | /*
|
---|
100 | * The message queue is full.
|
---|
101 | * Erase the queue and store one TLB_INVL_ALL message.
|
---|
102 | */
|
---|
103 | cpu->tlb_messages_count = 1;
|
---|
104 | cpu->tlb_messages[0].type = TLB_INVL_ALL;
|
---|
105 | cpu->tlb_messages[0].asid = ASID_INVALID;
|
---|
106 | cpu->tlb_messages[0].page = 0;
|
---|
107 | cpu->tlb_messages[0].count = 0;
|
---|
108 | } else {
|
---|
109 | /*
|
---|
110 | * Enqueue the message.
|
---|
111 | */
|
---|
112 | size_t idx = cpu->tlb_messages_count++;
|
---|
113 | cpu->tlb_messages[idx].type = type;
|
---|
114 | cpu->tlb_messages[idx].asid = asid;
|
---|
115 | cpu->tlb_messages[idx].page = page;
|
---|
116 | cpu->tlb_messages[idx].count = count;
|
---|
117 | }
|
---|
118 | irq_spinlock_unlock(&cpu->lock, false);
|
---|
119 | }
|
---|
120 |
|
---|
121 | tlb_shootdown_ipi_send();
|
---|
122 |
|
---|
123 | busy_wait:
|
---|
124 | for (i = 0; i < config.cpu_count; i++) {
|
---|
125 | if (cpus[i].tlb_active)
|
---|
126 | goto busy_wait;
|
---|
127 | }
|
---|
128 |
|
---|
129 | return ipl;
|
---|
130 | }
|
---|
131 |
|
---|
132 | /** Finish TLB shootdown sequence.
|
---|
133 | *
|
---|
134 | * @param ipl Previous interrupt priority level.
|
---|
135 | *
|
---|
136 | */
|
---|
137 | void tlb_shootdown_finalize(ipl_t ipl)
|
---|
138 | {
|
---|
139 | irq_spinlock_unlock(&tlblock, false);
|
---|
140 | CPU->tlb_active = true;
|
---|
141 | interrupts_restore(ipl);
|
---|
142 | }
|
---|
143 |
|
---|
144 | void tlb_shootdown_ipi_send(void)
|
---|
145 | {
|
---|
146 | ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
|
---|
147 | }
|
---|
148 |
|
---|
149 | /** Receive TLB shootdown message.
|
---|
150 | *
|
---|
151 | */
|
---|
152 | void tlb_shootdown_ipi_recv(void)
|
---|
153 | {
|
---|
154 | ASSERT(CPU);
|
---|
155 |
|
---|
156 | CPU->tlb_active = false;
|
---|
157 | irq_spinlock_lock(&tlblock, false);
|
---|
158 | irq_spinlock_unlock(&tlblock, false);
|
---|
159 |
|
---|
160 | irq_spinlock_lock(&CPU->lock, false);
|
---|
161 | ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
|
---|
162 |
|
---|
163 | size_t i;
|
---|
164 | for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
|
---|
165 | tlb_invalidate_type_t type = CPU->tlb_messages[i].type;
|
---|
166 | asid_t asid = CPU->tlb_messages[i].asid;
|
---|
167 | uintptr_t page = CPU->tlb_messages[i].page;
|
---|
168 | size_t count = CPU->tlb_messages[i].count;
|
---|
169 |
|
---|
170 | switch (type) {
|
---|
171 | case TLB_INVL_ALL:
|
---|
172 | tlb_invalidate_all();
|
---|
173 | break;
|
---|
174 | case TLB_INVL_ASID:
|
---|
175 | tlb_invalidate_asid(asid);
|
---|
176 | break;
|
---|
177 | case TLB_INVL_PAGES:
|
---|
178 | ASSERT(count);
|
---|
179 | tlb_invalidate_pages(asid, page, count);
|
---|
180 | break;
|
---|
181 | default:
|
---|
182 | panic("Unknown type (%d).", type);
|
---|
183 | break;
|
---|
184 | }
|
---|
185 |
|
---|
186 | if (type == TLB_INVL_ALL)
|
---|
187 | break;
|
---|
188 | }
|
---|
189 |
|
---|
190 | irq_spinlock_unlock(&CPU->lock, false);
|
---|
191 | CPU->tlb_active = true;
|
---|
192 | }
|
---|
193 |
|
---|
194 | #endif /* CONFIG_SMP */
|
---|
195 |
|
---|
196 | /** @}
|
---|
197 | */
|
---|