source: mainline/kernel/generic/src/mm/tlb.c@ 00b38a3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 00b38a3 was 00b38a3, checked in by Jakub Jermar <jakub@…>, 19 years ago

IPI/cross-call support for sparc64.
SMP on sparc64 is now fully supported.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genericmm
30 * @{
31 */
32
33/**
34 * @file
35 * @brief Generic TLB shootdown algorithm.
36 *
37 * The algorithm implemented here is based on the CMU TLB shootdown
38 * algorithm and is further simplified (e.g. all CPUs receive all TLB
39 * shootdown messages).
40 */
41
42#include <mm/tlb.h>
43#include <mm/asid.h>
44#include <arch/mm/tlb.h>
45#include <smp/ipi.h>
46#include <synch/spinlock.h>
47#include <typedefs.h>
48#include <atomic.h>
49#include <arch/interrupt.h>
50#include <config.h>
51#include <arch.h>
52#include <panic.h>
53#include <debug.h>
54
55/**
56 * This lock is used for synchronisation between sender and
57 * recipients of TLB shootdown message. It must be acquired
58 * before CPU structure lock.
59 */
60SPINLOCK_INITIALIZE(tlblock);
61
62void tlb_init(void)
63{
64 tlb_arch_init();
65}
66
67#ifdef CONFIG_SMP
68
69/** Send TLB shootdown message.
70 *
71 * This function attempts to deliver TLB shootdown message
72 * to all other processors.
73 *
74 * This function must be called with interrupts disabled.
75 *
76 * @param type Type describing scope of shootdown.
77 * @param asid Address space, if required by type.
78 * @param page Virtual page address, if required by type.
79 * @param count Number of pages, if required by type.
80 */
81void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid, uintptr_t page, count_t count)
82{
83 int i;
84
85 CPU->tlb_active = 0;
86 spinlock_lock(&tlblock);
87
88 for (i = 0; i < config.cpu_count; i++) {
89 cpu_t *cpu;
90
91 if (i == CPU->id)
92 continue;
93
94 cpu = &cpus[i];
95 spinlock_lock(&cpu->lock);
96 if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
97 /*
98 * The message queue is full.
99 * Erase the queue and store one TLB_INVL_ALL message.
100 */
101 cpu->tlb_messages_count = 1;
102 cpu->tlb_messages[0].type = TLB_INVL_ALL;
103 cpu->tlb_messages[0].asid = ASID_INVALID;
104 cpu->tlb_messages[0].page = 0;
105 cpu->tlb_messages[0].count = 0;
106 } else {
107 /*
108 * Enqueue the message.
109 */
110 cpu->tlb_messages[cpu->tlb_messages_count].type = type;
111 cpu->tlb_messages[cpu->tlb_messages_count].asid = asid;
112 cpu->tlb_messages[cpu->tlb_messages_count].page = page;
113 cpu->tlb_messages[cpu->tlb_messages_count].count = count;
114 cpu->tlb_messages_count++;
115 }
116 spinlock_unlock(&cpu->lock);
117 }
118
119 tlb_shootdown_ipi_send();
120
121busy_wait:
122 for (i = 0; i < config.cpu_count; i++)
123 if (cpus[i].tlb_active)
124 goto busy_wait;
125}
126
127/** Finish TLB shootdown sequence. */
128void tlb_shootdown_finalize(void)
129{
130 spinlock_unlock(&tlblock);
131 CPU->tlb_active = 1;
132}
133
134void tlb_shootdown_ipi_send(void)
135{
136 ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
137}
138
139/** Receive TLB shootdown message. */
140void tlb_shootdown_ipi_recv(void)
141{
142 tlb_invalidate_type_t type;
143 asid_t asid;
144 uintptr_t page;
145 count_t count;
146 int i;
147
148 ASSERT(CPU);
149
150 CPU->tlb_active = 0;
151 spinlock_lock(&tlblock);
152 spinlock_unlock(&tlblock);
153
154 spinlock_lock(&CPU->lock);
155 ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
156
157 for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
158 type = CPU->tlb_messages[i].type;
159 asid = CPU->tlb_messages[i].asid;
160 page = CPU->tlb_messages[i].page;
161 count = CPU->tlb_messages[i].count;
162
163 switch (type) {
164 case TLB_INVL_ALL:
165 tlb_invalidate_all();
166 break;
167 case TLB_INVL_ASID:
168 tlb_invalidate_asid(asid);
169 break;
170 case TLB_INVL_PAGES:
171 ASSERT(count);
172 tlb_invalidate_pages(asid, page, count);
173 break;
174 default:
175 panic("unknown type (%d)\n", type);
176 break;
177 }
178 if (type == TLB_INVL_ALL)
179 break;
180 }
181
182 spinlock_unlock(&CPU->lock);
183 CPU->tlb_active = 1;
184}
185
186#endif /* CONFIG_SMP */
187
188/** @}
189 */
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