source: mainline/kernel/generic/src/mm/tlb.c@ 59e4864

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 59e4864 was 59e4864, checked in by Jakub Vana <jakub.vana@…>, 17 years ago

Alfa of SMP support on IA64

  • Property mode set to 100644
File size: 4.8 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[cc73a8a1]29/** @addtogroup genericmm
[b45c443]30 * @{
31 */
32
[9179d0a]33/**
[b45c443]34 * @file
[9179d0a]35 * @brief Generic TLB shootdown algorithm.
[2bb8648]36 *
37 * The algorithm implemented here is based on the CMU TLB shootdown
38 * algorithm and is further simplified (e.g. all CPUs receive all TLB
39 * shootdown messages).
[9179d0a]40 */
41
[f761f1eb]42#include <mm/tlb.h>
[d1e414c]43#include <mm/asid.h>
[ce031f0]44#include <arch/mm/tlb.h>
[4ffa9e0]45#include <smp/ipi.h>
[169587a]46#include <synch/spinlock.h>
[23684b7]47#include <atomic.h>
[4ffa9e0]48#include <arch/interrupt.h>
[169587a]49#include <config.h>
[434f700]50#include <arch.h>
[02055415]51#include <panic.h>
[d1e414c]52#include <debug.h>
[b3f8fb7]53#include <cpu.h>
[f761f1eb]54
[d1e414c]55/**
56 * This lock is used for synchronisation between sender and
57 * recipients of TLB shootdown message. It must be acquired
58 * before CPU structure lock.
59 */
[dc747e3]60SPINLOCK_INITIALIZE(tlblock);
[169587a]61
62void tlb_init(void)
63{
[b00fdde]64 tlb_arch_init();
[169587a]65}
66
[5f85c91]67#ifdef CONFIG_SMP
[d1e414c]68
69/** Send TLB shootdown message.
70 *
71 * This function attempts to deliver TLB shootdown message
72 * to all other processors.
73 *
74 * This function must be called with interrupts disabled.
75 *
76 * @param type Type describing scope of shootdown.
77 * @param asid Address space, if required by type.
78 * @param page Virtual page address, if required by type.
79 * @param count Number of pages, if required by type.
80 */
[4638401]81void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,
82 uintptr_t page, count_t count)
[169587a]83{
[6c441cf8]84 unsigned int i;
[434f700]85
86 CPU->tlb_active = 0;
[169587a]87 spinlock_lock(&tlblock);
[4512d7e]88
[d1e414c]89 for (i = 0; i < config.cpu_count; i++) {
90 cpu_t *cpu;
91
92 if (i == CPU->id)
93 continue;
94
95 cpu = &cpus[i];
96 spinlock_lock(&cpu->lock);
97 if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
98 /*
99 * The message queue is full.
100 * Erase the queue and store one TLB_INVL_ALL message.
101 */
102 cpu->tlb_messages_count = 1;
103 cpu->tlb_messages[0].type = TLB_INVL_ALL;
104 cpu->tlb_messages[0].asid = ASID_INVALID;
105 cpu->tlb_messages[0].page = 0;
106 cpu->tlb_messages[0].count = 0;
107 } else {
108 /*
109 * Enqueue the message.
110 */
[4638401]111 index_t idx = cpu->tlb_messages_count++;
112 cpu->tlb_messages[idx].type = type;
113 cpu->tlb_messages[idx].asid = asid;
114 cpu->tlb_messages[idx].page = page;
115 cpu->tlb_messages[idx].count = count;
[d1e414c]116 }
117 spinlock_unlock(&cpu->lock);
118 }
[36b01bb2]119
[b109ebb]120 tlb_shootdown_ipi_send();
[4512d7e]121
[434f700]122busy_wait:
[d1e414c]123 for (i = 0; i < config.cpu_count; i++)
[434f700]124 if (cpus[i].tlb_active)
125 goto busy_wait;
[169587a]126}
127
[d1e414c]128/** Finish TLB shootdown sequence. */
[b109ebb]129void tlb_shootdown_finalize(void)
[169587a]130{
131 spinlock_unlock(&tlblock);
[434f700]132 CPU->tlb_active = 1;
[169587a]133}
134
[4ffa9e0]135void tlb_shootdown_ipi_send(void)
136{
[59e4864]137#ifndef ia64
[4ffa9e0]138 ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
[59e4864]139#endif
[4ffa9e0]140}
141
[d1e414c]142/** Receive TLB shootdown message. */
[b109ebb]143void tlb_shootdown_ipi_recv(void)
[f761f1eb]144{
[d1e414c]145 tlb_invalidate_type_t type;
146 asid_t asid;
[7f1c620]147 uintptr_t page;
[d1e414c]148 count_t count;
[6c441cf8]149 unsigned int i;
[d1e414c]150
[97b64c9]151 ASSERT(CPU);
152
[434f700]153 CPU->tlb_active = 0;
[169587a]154 spinlock_lock(&tlblock);
155 spinlock_unlock(&tlblock);
[d1e414c]156
157 spinlock_lock(&CPU->lock);
158 ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
159
160 for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
161 type = CPU->tlb_messages[i].type;
162 asid = CPU->tlb_messages[i].asid;
163 page = CPU->tlb_messages[i].page;
164 count = CPU->tlb_messages[i].count;
165
166 switch (type) {
[00b38a3]167 case TLB_INVL_ALL:
[d1e414c]168 tlb_invalidate_all();
169 break;
[00b38a3]170 case TLB_INVL_ASID:
[d1e414c]171 tlb_invalidate_asid(asid);
172 break;
[00b38a3]173 case TLB_INVL_PAGES:
[d1e414c]174 ASSERT(count);
175 tlb_invalidate_pages(asid, page, count);
176 break;
[00b38a3]177 default:
[d1e414c]178 panic("unknown type (%d)\n", type);
179 break;
180 }
181 if (type == TLB_INVL_ALL)
182 break;
183 }
184
185 spinlock_unlock(&CPU->lock);
[434f700]186 CPU->tlb_active = 1;
[f761f1eb]187}
[d1e414c]188
[5f85c91]189#endif /* CONFIG_SMP */
[b45c443]190
[cc73a8a1]191/** @}
[b45c443]192 */
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