source: mainline/kernel/generic/src/mm/page.c@ da1bafb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da1bafb was da1bafb, checked in by Martin Decky <martin@…>, 15 years ago

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
  • Property mode set to 100644
File size: 5.4 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2006 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[cc73a8a1]29/** @addtogroup genericmm
[b45c443]30 * @{
31 */
32
[9179d0a]33/**
[b45c443]34 * @file
[da1bafb]35 * @brief Virtual Address Translation subsystem.
[9179d0a]36 *
37 * This file contains code for creating, destroying and searching
38 * mappings between virtual addresses and physical addresses.
39 * Functions here are mere wrappers that call the real implementation.
40 * They however, define the single interface.
[da1bafb]41 *
[20d50a1]42 */
43
[80dabb8d]44/*
45 * Note on memory prefetching and updating memory mappings, also described in:
46 * AMD x86-64 Architecture Programmer's Manual, Volume 2, System Programming,
47 * 7.2.1 Special Coherency Considerations.
48 *
49 * The processor which modifies a page table mapping can access prefetched data
50 * from the old mapping. In order to prevent this, we place a memory barrier
51 * after a mapping is updated.
52 *
53 * We assume that the other processors are either not using the mapping yet
54 * (i.e. during the bootstrap) or are executing the TLB shootdown code. While
55 * we don't care much about the former case, the processors in the latter case
56 * will do an implicit serialization by virtue of running the TLB shootdown
57 * interrupt handler.
[da1bafb]58 *
[80dabb8d]59 */
60
[f761f1eb]61#include <mm/page.h>
62#include <arch/mm/page.h>
[677a6d5]63#include <arch/mm/asid.h>
[fc1e4f6]64#include <mm/as.h>
[677a6d5]65#include <mm/frame.h>
[11e9061d]66#include <arch/barrier.h>
[d99c1d2]67#include <typedefs.h>
[ff9f858]68#include <arch/asm.h>
[9c0a9b3]69#include <memstr.h>
[6d7ffa65]70#include <debug.h>
[677a6d5]71#include <arch.h>
[6d7ffa65]72
73/** Virtual operations for page subsystem. */
[f5935ed]74page_mapping_operations_t *page_mapping_operations = NULL;
[9c0a9b3]75
[f761f1eb]76void page_init(void)
[db3341e]77{
[f761f1eb]78 page_arch_init();
79}
[74df77d]80
81/** Map memory structure
82 *
83 * Identity-map memory structure
84 * considering possible crossings
85 * of page boundaries.
86 *
[da1bafb]87 * @param addr Address of the structure.
88 * @param size Size of the structure.
89 *
[74df77d]90 */
[da1bafb]91void map_structure(uintptr_t addr, size_t size)
[74df77d]92{
[da1bafb]93 size_t length = size + (addr - (addr & ~(PAGE_SIZE - 1)));
94 size_t cnt = length / PAGE_SIZE + (length % PAGE_SIZE > 0);
95
96 size_t i;
[76cec1e]97 for (i = 0; i < cnt; i++)
[da1bafb]98 page_mapping_insert(AS_KERNEL, addr + i * PAGE_SIZE,
99 addr + i * PAGE_SIZE, PAGE_NOT_CACHEABLE | PAGE_WRITE);
100
[11e9061d]101 /* Repel prefetched accesses to the old mapping. */
102 memory_barrier();
[74df77d]103}
[ff9f858]104
[8f00329]105/** Insert mapping of page to frame.
[ff9f858]106 *
[9179d0a]107 * Map virtual address page to physical address frame
108 * using flags. Allocate and setup any missing page tables.
[ff9f858]109 *
[2299914]110 * The page table must be locked and interrupts must be disabled.
[ef67bab]111 *
[da1bafb]112 * @param as Address space to wich page belongs.
113 * @param page Virtual address of the page to be mapped.
114 * @param frame Physical address of memory frame to which the mapping is
115 * done.
116 * @param flags Flags to be used for mapping.
117 *
[ff9f858]118 */
[da1bafb]119void page_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
120 unsigned int flags)
[ff9f858]121{
[f5935ed]122 ASSERT(page_mapping_operations);
123 ASSERT(page_mapping_operations->mapping_insert);
[6d7ffa65]124
[f5935ed]125 page_mapping_operations->mapping_insert(as, page, frame, flags);
[11e9061d]126
127 /* Repel prefetched accesses to the old mapping. */
128 memory_barrier();
[ff9f858]129}
[1084a784]130
[8f00329]131/** Remove mapping of page.
132 *
[9179d0a]133 * Remove any mapping of page within address space as.
[8f00329]134 * TLB shootdown should follow in order to make effects of
135 * this call visible.
136 *
[2299914]137 * The page table must be locked and interrupts must be disabled.
[8f00329]138 *
[da1bafb]139 * @param as Address space to wich page belongs.
140 * @param page Virtual address of the page to be demapped.
141 *
[8f00329]142 */
[7f1c620]143void page_mapping_remove(as_t *as, uintptr_t page)
[8f00329]144{
145 ASSERT(page_mapping_operations);
146 ASSERT(page_mapping_operations->mapping_remove);
147
148 page_mapping_operations->mapping_remove(as, page);
[da1bafb]149
[11e9061d]150 /* Repel prefetched accesses to the old mapping. */
151 memory_barrier();
[8f00329]152}
153
[1084a784]154/** Find mapping for virtual page
155 *
156 * Find mapping for virtual page.
157 *
[2299914]158 * The page table must be locked and interrupts must be disabled.
[ef67bab]159 *
[da1bafb]160 * @param as Address space to wich page belongs.
161 * @param page Virtual page.
162 *
163 * @return NULL if there is no such mapping; requested mapping
164 * otherwise.
[1084a784]165 *
166 */
[7f1c620]167pte_t *page_mapping_find(as_t *as, uintptr_t page)
[1084a784]168{
[f5935ed]169 ASSERT(page_mapping_operations);
170 ASSERT(page_mapping_operations->mapping_find);
[da1bafb]171
[f5935ed]172 return page_mapping_operations->mapping_find(as, page);
[1084a784]173}
[b45c443]174
[cc73a8a1]175/** @}
[b45c443]176 */
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