source: mainline/kernel/generic/src/ipc/irq.c@ f5e39a32

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f5e39a32 was 2b017ba, checked in by Jakub Jermar <jakub@…>, 19 years ago

Replace the old IRQ dispatcher and IPC notifier with new implementation.
Note that all architectures except for sparc64 are now broken
and don't even compile.
  • Property mode set to 100644
File size: 8.0 KB
Line 
1/*
2 * Copyright (C) 2006 Ondrej Palkovsky
3 * Copyright (C) 2006 Jakub Jermar
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup genericipc
31 * @{
32 */
33/**
34 * @file
35 * @brief IRQ notification framework.
36 *
37 * This framework allows applications to register to receive a notification
38 * when interrupt is detected. The application may provide a simple 'top-half'
39 * handler as part of its registration, which can perform simple operations
40 * (read/write port/memory, add information to notification ipc message).
41 *
42 * The structure of a notification message is as follows:
43 * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall
44 * - ARG1: payload modified by a 'top-half' handler
45 * - ARG2: payload modified by a 'top-half' handler
46 * - ARG3: payload modified by a 'top-half' handler
47 * - in_phone_hash: interrupt counter (may be needed to assure correct order
48 * in multithreaded drivers)
49 */
50
51#include <arch.h>
52#include <mm/slab.h>
53#include <errno.h>
54#include <ddi/irq.h>
55#include <ipc/ipc.h>
56#include <ipc/irq.h>
57#include <syscall/copy.h>
58#include <console/console.h>
59#include <print.h>
60
61/** Execute code associated with IRQ notification.
62 *
63 * @param call Notification call.
64 * @param code Top-half pseudocode.
65 */
66static void code_execute(call_t *call, irq_code_t *code)
67{
68 int i;
69 unative_t dstval = 0;
70
71 if (!code)
72 return;
73
74 for (i=0; i < code->cmdcount;i++) {
75 switch (code->cmds[i].cmd) {
76 case CMD_MEM_READ_1:
77 dstval = *((uint8_t *)code->cmds[i].addr);
78 break;
79 case CMD_MEM_READ_2:
80 dstval = *((uint16_t *)code->cmds[i].addr);
81 break;
82 case CMD_MEM_READ_4:
83 dstval = *((uint32_t *)code->cmds[i].addr);
84 break;
85 case CMD_MEM_READ_8:
86 dstval = *((uint64_t *)code->cmds[i].addr);
87 break;
88 case CMD_MEM_WRITE_1:
89 *((uint8_t *)code->cmds[i].addr) = code->cmds[i].value;
90 break;
91 case CMD_MEM_WRITE_2:
92 *((uint16_t *)code->cmds[i].addr) = code->cmds[i].value;
93 break;
94 case CMD_MEM_WRITE_4:
95 *((uint32_t *)code->cmds[i].addr) = code->cmds[i].value;
96 break;
97 case CMD_MEM_WRITE_8:
98 *((uint64_t *)code->cmds[i].addr) = code->cmds[i].value;
99 break;
100#if defined(ia32) || defined(amd64)
101 case CMD_PORT_READ_1:
102 dstval = inb((long)code->cmds[i].addr);
103 break;
104 case CMD_PORT_WRITE_1:
105 outb((long)code->cmds[i].addr, code->cmds[i].value);
106 break;
107#endif
108#if defined(ia64)
109 case CMD_IA64_GETCHAR:
110 dstval = _getc(&ski_uconsole);
111 break;
112#endif
113#if defined(ppc32)
114 case CMD_PPC32_GETCHAR:
115 dstval = cuda_get_scancode();
116 break;
117#endif
118 default:
119 break;
120 }
121 if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) {
122 call->data.args[code->cmds[i].dstarg] = dstval;
123 }
124 }
125}
126
127static void code_free(irq_code_t *code)
128{
129 if (code) {
130 free(code->cmds);
131 free(code);
132 }
133}
134
135static irq_code_t * code_from_uspace(irq_code_t *ucode)
136{
137 irq_code_t *code;
138 irq_cmd_t *ucmds;
139 int rc;
140
141 code = malloc(sizeof(*code), 0);
142 rc = copy_from_uspace(code, ucode, sizeof(*code));
143 if (rc != 0) {
144 free(code);
145 return NULL;
146 }
147
148 if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
149 free(code);
150 return NULL;
151 }
152 ucmds = code->cmds;
153 code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
154 rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
155 if (rc != 0) {
156 free(code->cmds);
157 free(code);
158 return NULL;
159 }
160
161 return code;
162}
163
164/** Unregister task from IRQ notification.
165 *
166 * @param box Answerbox associated with the notification.
167 * @param inr IRQ numbe.
168 * @param devno Device number.
169 */
170void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
171{
172 ipl_t ipl;
173 irq_t *irq;
174
175 ipl = interrupts_disable();
176 irq = irq_find_and_lock(inr, devno);
177 if (irq) {
178 if (irq->notif_cfg.answerbox == box) {
179 code_free(irq->notif_cfg.code);
180 irq->notif_cfg.code = NULL;
181 irq->notif_cfg.answerbox = NULL;
182 irq->notif_cfg.method = 0;
183 irq->notif_cfg.counter = 0;
184 spinlock_unlock(&irq->lock);
185 }
186 }
187 interrupts_restore(ipl);
188}
189
190/** Register an answerbox as a receiving end for IRQ notifications.
191 *
192 * @param box Receiving answerbox.
193 * @param inr IRQ number.
194 * @param devno Device number.
195 * @param method Method to be associated with the notification.
196 * @param ucode Uspace pointer to top-half pseudocode.
197 *
198 * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success.
199 */
200int
201ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, unative_t method, irq_code_t *ucode)
202{
203 ipl_t ipl;
204 irq_code_t *code;
205 irq_t *irq;
206
207 if (ucode) {
208 code = code_from_uspace(ucode);
209 if (!code)
210 return EBADMEM;
211 } else
212 code = NULL;
213
214 ipl = interrupts_disable();
215 irq = irq_find_and_lock(inr, devno);
216 if (!irq) {
217 interrupts_restore(ipl);
218 code_free(code);
219 return ENOENT;
220 }
221
222 if (irq->notif_cfg.answerbox) {
223 spinlock_unlock(&irq->lock);
224 interrupts_restore(ipl);
225 code_free(code);
226 return EEXISTS;
227 }
228
229 irq->notif_cfg.answerbox = box;
230 irq->notif_cfg.method = method;
231 irq->notif_cfg.code = code;
232 irq->notif_cfg.counter = 0;
233 spinlock_unlock(&irq->lock);
234 interrupts_restore(ipl);
235
236 return 0;
237}
238
239/** Add call to proper answerbox queue.
240 *
241 * Assume irq->lock is locked.
242 *
243 */
244static void send_call(irq_t *irq, call_t *call)
245{
246 spinlock_lock(&irq->notif_cfg.answerbox->irq_lock);
247 list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
248 spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock);
249
250 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
251}
252
253/** Send notification message
254 *
255 */
256void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3)
257{
258 call_t *call;
259
260 spinlock_lock(&irq->lock);
261
262 if (irq->notif_cfg.answerbox) {
263 call = ipc_call_alloc(FRAME_ATOMIC);
264 if (!call) {
265 spinlock_unlock(&irq->lock);
266 return;
267 }
268 call->flags |= IPC_CALL_NOTIF;
269 IPC_SET_METHOD(call->data, irq->notif_cfg.method);
270 IPC_SET_ARG1(call->data, a1);
271 IPC_SET_ARG2(call->data, a2);
272 IPC_SET_ARG3(call->data, a3);
273 /* Put a counter to the message */
274 call->private = ++irq->notif_cfg.counter;
275
276 send_call(irq, call);
277 }
278 spinlock_unlock(&irq->lock);
279}
280
281/** Notify task that an irq had occurred.
282 *
283 * We expect interrupts to be disabled and the irq->lock already held.
284 */
285void ipc_irq_send_notif(irq_t *irq)
286{
287 call_t *call;
288
289 ASSERT(irq);
290
291 if (irq->notif_cfg.answerbox) {
292 call = ipc_call_alloc(FRAME_ATOMIC);
293 if (!call) {
294 return;
295 }
296 call->flags |= IPC_CALL_NOTIF;
297 /* Put a counter to the message */
298 call->private = ++irq->notif_cfg.counter;
299 /* Set up args */
300 IPC_SET_METHOD(call->data, irq->notif_cfg.method);
301
302 /* Execute code to handle irq */
303 code_execute(call, irq->notif_cfg.code);
304
305 send_call(irq, call);
306 }
307}
308
309/** Disconnect all IRQ notifications from an answerbox.
310 *
311 * @param box Answerbox for which we want to carry out the cleanup.
312 */
313void ipc_irq_cleanup(answerbox_t *box)
314{
315 /* TODO */
316}
317
318/** @}
319 */
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