source: mainline/kernel/generic/src/ipc/irq.c@ c47e1a8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c47e1a8 was 3b3e776, checked in by Lenka Trochtova <trochtova.lenka@…>, 16 years ago

merged with head

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File size: 13.9 KB
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1/*
2 * Copyright (c) 2006 Ondrej Palkovsky
3 * Copyright (c) 2006 Jakub Jermar
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup genericipc
31 * @{
32 */
33/**
34 * @file
35 * @brief IRQ notification framework.
36 *
37 * This framework allows applications to register to receive a notification
38 * when interrupt is detected. The application may provide a simple 'top-half'
39 * handler as part of its registration, which can perform simple operations
40 * (read/write port/memory, add information to notification ipc message).
41 *
42 * The structure of a notification message is as follows:
43 * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall
44 * - ARG1: payload modified by a 'top-half' handler
45 * - ARG2: payload modified by a 'top-half' handler
46 * - ARG3: payload modified by a 'top-half' handler
47 * - ARG4: payload modified by a 'top-half' handler
48 * - ARG5: payload modified by a 'top-half' handler
49 * - in_phone_hash: interrupt counter (may be needed to assure correct order
50 * in multithreaded drivers)
51 *
52 * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
53 * ipc_irq_cleanup() and IRQ handlers:
54 *
55 * By always taking all of the uspace IRQ hash table lock, IRQ structure lock
56 * and answerbox lock, we can rule out race conditions between the
57 * registration functions and also the cleanup function. Thus the observer can
58 * either see the IRQ structure present in both the hash table and the
59 * answerbox list or absent in both. Views in which the IRQ structure would be
60 * linked in the hash table but not in the answerbox list, or vice versa, are
61 * not possible.
62 *
63 * By always taking the hash table lock and the IRQ structure lock, we can
64 * rule out a scenario in which we would free up an IRQ structure, which is
65 * still referenced by, for example, an IRQ handler. The locking scheme forces
66 * us to lock the IRQ structure only after any progressing IRQs on that
67 * structure are finished. Because we hold the hash table lock, we prevent new
68 * IRQs from taking new references to the IRQ structure.
69 */
70
71#include <arch.h>
72#include <mm/slab.h>
73#include <errno.h>
74#include <ddi/irq.h>
75#include <ipc/ipc.h>
76#include <ipc/irq.h>
77#include <syscall/copy.h>
78#include <console/console.h>
79#include <print.h>
80
81/** Free the top-half pseudocode.
82 *
83 * @param code Pointer to the top-half pseudocode.
84 */
85static void code_free(irq_code_t *code)
86{
87 if (code) {
88 free(code->cmds);
89 free(code);
90 }
91}
92
93/** Copy the top-half pseudocode from userspace into the kernel.
94 *
95 * @param ucode Userspace address of the top-half pseudocode.
96 *
97 * @return Kernel address of the copied pseudocode.
98 */
99static irq_code_t *code_from_uspace(irq_code_t *ucode)
100{
101 irq_code_t *code;
102 irq_cmd_t *ucmds;
103 int rc;
104
105 code = malloc(sizeof(*code), 0);
106 rc = copy_from_uspace(code, ucode, sizeof(*code));
107 if (rc != 0) {
108 free(code);
109 return NULL;
110 }
111
112 if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
113 free(code);
114 return NULL;
115 }
116 ucmds = code->cmds;
117 code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
118 rc = copy_from_uspace(code->cmds, ucmds,
119 sizeof(code->cmds[0]) * code->cmdcount);
120 if (rc != 0) {
121 free(code->cmds);
122 free(code);
123 return NULL;
124 }
125
126 return code;
127}
128
129/** Register an answerbox as a receiving end for IRQ notifications.
130 *
131 * @param box Receiving answerbox.
132 * @param inr IRQ number.
133 * @param devno Device number.
134 * @param method Method to be associated with the notification.
135 * @param ucode Uspace pointer to top-half pseudocode.
136 *
137 * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success.
138 *
139 */
140int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
141 unative_t method, irq_code_t *ucode)
142{
143 ipl_t ipl;
144 irq_code_t *code;
145 irq_t *irq;
146 link_t *hlp;
147 unative_t key[] = {
148 (unative_t) inr,
149 (unative_t) devno
150 };
151
152 printf("kernel ipc_irq_register() ... registering irq = %d\n", inr);
153
154 if (ucode) {
155 code = code_from_uspace(ucode);
156 if (!code)
157 return EBADMEM;
158 } else {
159 code = NULL;
160 }
161
162 /*
163 * Allocate and populate the IRQ structure.
164 */
165 irq = malloc(sizeof(irq_t), 0);
166 irq_initialize(irq);
167 irq->devno = devno;
168 irq->inr = inr;
169 irq->claim = ipc_irq_top_half_claim;
170 irq->handler = ipc_irq_top_half_handler;
171 irq->notif_cfg.notify = true;
172 irq->notif_cfg.answerbox = box;
173 irq->notif_cfg.method = method;
174 irq->notif_cfg.code = code;
175 irq->notif_cfg.counter = 0;
176
177 /*
178 * Enlist the IRQ structure in the uspace IRQ hash table and the
179 * answerbox's list.
180 */
181 ipl = interrupts_disable();
182 spinlock_lock(&irq_uspace_hash_table_lock);
183 hlp = hash_table_find(&irq_uspace_hash_table, key);
184 if (hlp) {
185 irq_t *hirq __attribute__((unused))
186 = hash_table_get_instance(hlp, irq_t, link);
187
188 /* hirq is locked */
189 spinlock_unlock(&hirq->lock);
190 code_free(code);
191 spinlock_unlock(&irq_uspace_hash_table_lock);
192 free(irq);
193 interrupts_restore(ipl);
194 return EEXISTS;
195 }
196
197 spinlock_lock(&irq->lock); /* Not really necessary, but paranoid */
198 spinlock_lock(&box->irq_lock);
199 hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
200 list_append(&irq->notif_cfg.link, &box->irq_head);
201 spinlock_unlock(&box->irq_lock);
202 spinlock_unlock(&irq->lock);
203 spinlock_unlock(&irq_uspace_hash_table_lock);
204
205 interrupts_restore(ipl);
206
207 printf("kernel ipc_irq_register() ... registering irq = %d was successful \n", inr);
208
209 return EOK;
210}
211
212/** Unregister task from IRQ notification.
213 *
214 * @param box Answerbox associated with the notification.
215 * @param inr IRQ number.
216 * @param devno Device number.
217 */
218int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
219{
220 ipl_t ipl;
221 unative_t key[] = {
222 (unative_t) inr,
223 (unative_t) devno
224 };
225 link_t *lnk;
226 irq_t *irq;
227
228 ipl = interrupts_disable();
229 spinlock_lock(&irq_uspace_hash_table_lock);
230 lnk = hash_table_find(&irq_uspace_hash_table, key);
231 if (!lnk) {
232 spinlock_unlock(&irq_uspace_hash_table_lock);
233 interrupts_restore(ipl);
234 return ENOENT;
235 }
236 irq = hash_table_get_instance(lnk, irq_t, link);
237 /* irq is locked */
238 spinlock_lock(&box->irq_lock);
239
240 ASSERT(irq->notif_cfg.answerbox == box);
241
242 /* Free up the pseudo code and associated structures. */
243 code_free(irq->notif_cfg.code);
244
245 /* Remove the IRQ from the answerbox's list. */
246 list_remove(&irq->notif_cfg.link);
247
248 /*
249 * We need to drop the IRQ lock now because hash_table_remove() will try
250 * to reacquire it. That basically violates the natural locking order,
251 * but a deadlock in hash_table_remove() is prevented by the fact that
252 * we already held the IRQ lock and didn't drop the hash table lock in
253 * the meantime.
254 */
255 spinlock_unlock(&irq->lock);
256
257 /* Remove the IRQ from the uspace IRQ hash table. */
258 hash_table_remove(&irq_uspace_hash_table, key, 2);
259
260 spinlock_unlock(&irq_uspace_hash_table_lock);
261 spinlock_unlock(&box->irq_lock);
262
263 /* Free up the IRQ structure. */
264 free(irq);
265
266 interrupts_restore(ipl);
267 return EOK;
268}
269
270
271/** Disconnect all IRQ notifications from an answerbox.
272 *
273 * This function is effective because the answerbox contains
274 * list of all irq_t structures that are registered to
275 * send notifications to it.
276 *
277 * @param box Answerbox for which we want to carry out the cleanup.
278 */
279void ipc_irq_cleanup(answerbox_t *box)
280{
281 ipl_t ipl;
282
283loop:
284 ipl = interrupts_disable();
285 spinlock_lock(&irq_uspace_hash_table_lock);
286 spinlock_lock(&box->irq_lock);
287
288 while (box->irq_head.next != &box->irq_head) {
289 link_t *cur = box->irq_head.next;
290 irq_t *irq;
291 DEADLOCK_PROBE_INIT(p_irqlock);
292 unative_t key[2];
293
294 irq = list_get_instance(cur, irq_t, notif_cfg.link);
295 if (!spinlock_trylock(&irq->lock)) {
296 /*
297 * Avoid deadlock by trying again.
298 */
299 spinlock_unlock(&box->irq_lock);
300 spinlock_unlock(&irq_uspace_hash_table_lock);
301 interrupts_restore(ipl);
302 DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
303 goto loop;
304 }
305 key[0] = irq->inr;
306 key[1] = irq->devno;
307
308
309 ASSERT(irq->notif_cfg.answerbox == box);
310
311 /* Unlist from the answerbox. */
312 list_remove(&irq->notif_cfg.link);
313
314 /* Free up the pseudo code and associated structures. */
315 code_free(irq->notif_cfg.code);
316
317 /*
318 * We need to drop the IRQ lock now because hash_table_remove()
319 * will try to reacquire it. That basically violates the natural
320 * locking order, but a deadlock in hash_table_remove() is
321 * prevented by the fact that we already held the IRQ lock and
322 * didn't drop the hash table lock in the meantime.
323 */
324 spinlock_unlock(&irq->lock);
325
326 /* Remove from the hash table. */
327 hash_table_remove(&irq_uspace_hash_table, key, 2);
328
329 free(irq);
330 }
331
332 spinlock_unlock(&box->irq_lock);
333 spinlock_unlock(&irq_uspace_hash_table_lock);
334 interrupts_restore(ipl);
335}
336
337/** Add a call to the proper answerbox queue.
338 *
339 * Assume irq->lock is locked.
340 *
341 * @param irq IRQ structure referencing the target answerbox.
342 * @param call IRQ notification call.
343 */
344static void send_call(irq_t *irq, call_t *call)
345{
346 spinlock_lock(&irq->notif_cfg.answerbox->irq_lock);
347 list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
348 spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock);
349
350 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
351}
352
353/** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
354 *
355 * @param irq IRQ structure.
356 *
357 * @return IRQ_ACCEPT if the interrupt is accepted by the
358 * pseudocode. IRQ_DECLINE otherwise.
359 */
360irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
361{
362 unsigned int i;
363 unative_t dstval;
364 irq_code_t *code = irq->notif_cfg.code;
365 unative_t *scratch = irq->notif_cfg.scratch;
366
367
368 if (!irq->notif_cfg.notify)
369 return IRQ_DECLINE;
370
371 if (!code)
372 return IRQ_DECLINE;
373
374 for (i = 0; i < code->cmdcount; i++) {
375 unsigned int srcarg = code->cmds[i].srcarg;
376 unsigned int dstarg = code->cmds[i].dstarg;
377
378 if (srcarg >= IPC_CALL_LEN)
379 break;
380 if (dstarg >= IPC_CALL_LEN)
381 break;
382
383 switch (code->cmds[i].cmd) {
384 case CMD_PIO_READ_8:
385 dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
386 if (dstarg)
387 scratch[dstarg] = dstval;
388 break;
389 case CMD_PIO_READ_16:
390 dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
391 if (dstarg)
392 scratch[dstarg] = dstval;
393 break;
394 case CMD_PIO_READ_32:
395 dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
396 if (dstarg)
397 scratch[dstarg] = dstval;
398 break;
399 case CMD_PIO_WRITE_8:
400 pio_write_8((ioport8_t *) code->cmds[i].addr,
401 (uint8_t) code->cmds[i].value);
402 break;
403 case CMD_PIO_WRITE_16:
404 pio_write_16((ioport16_t *) code->cmds[i].addr,
405 (uint16_t) code->cmds[i].value);
406 break;
407 case CMD_PIO_WRITE_32:
408 pio_write_32((ioport32_t *) code->cmds[i].addr,
409 (uint32_t) code->cmds[i].value);
410 break;
411 case CMD_BTEST:
412 if (srcarg && dstarg) {
413 dstval = scratch[srcarg] & code->cmds[i].value;
414 scratch[dstarg] = dstval;
415 }
416 break;
417 case CMD_PREDICATE:
418 if (srcarg && !scratch[srcarg]) {
419 i += code->cmds[i].value;
420 continue;
421 }
422 break;
423 case CMD_ACCEPT:
424 return IRQ_ACCEPT;
425 case CMD_DECLINE:
426 default:
427 return IRQ_DECLINE;
428 }
429 }
430
431 return IRQ_DECLINE;
432}
433
434
435/* IRQ top-half handler.
436 *
437 * We expect interrupts to be disabled and the irq->lock already held.
438 *
439 * @param irq IRQ structure.
440 */
441void ipc_irq_top_half_handler(irq_t *irq)
442{
443 ASSERT(irq);
444
445 if (irq->notif_cfg.answerbox) {
446 call_t *call;
447
448 call = ipc_call_alloc(FRAME_ATOMIC);
449 if (!call)
450 return;
451
452 call->flags |= IPC_CALL_NOTIF;
453 /* Put a counter to the message */
454 call->priv = ++irq->notif_cfg.counter;
455
456 /* Set up args */
457 IPC_SET_METHOD(call->data, irq->notif_cfg.method);
458 IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
459 IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
460 IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
461 IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
462 IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
463
464 send_call(irq, call);
465 }
466}
467
468/** Send notification message.
469 *
470 * @param irq IRQ structure.
471 * @param a1 Driver-specific payload argument.
472 * @param a2 Driver-specific payload argument.
473 * @param a3 Driver-specific payload argument.
474 * @param a4 Driver-specific payload argument.
475 * @param a5 Driver-specific payload argument.
476 */
477void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3,
478 unative_t a4, unative_t a5)
479{
480 call_t *call;
481
482 spinlock_lock(&irq->lock);
483
484 if (irq->notif_cfg.answerbox) {
485 call = ipc_call_alloc(FRAME_ATOMIC);
486 if (!call) {
487 spinlock_unlock(&irq->lock);
488 return;
489 }
490 call->flags |= IPC_CALL_NOTIF;
491 /* Put a counter to the message */
492 call->priv = ++irq->notif_cfg.counter;
493
494 IPC_SET_METHOD(call->data, irq->notif_cfg.method);
495 IPC_SET_ARG1(call->data, a1);
496 IPC_SET_ARG2(call->data, a2);
497 IPC_SET_ARG3(call->data, a3);
498 IPC_SET_ARG4(call->data, a4);
499 IPC_SET_ARG5(call->data, a5);
500
501 send_call(irq, call);
502 }
503 spinlock_unlock(&irq->lock);
504}
505
506/** @}
507 */
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