1 | /*
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2 | * Copyright (C) 2006 Ondrej Palkovsky
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3 | * Copyright (C) 2006 Jakub Jermar
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4 | * All rights reserved.
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5 | *
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6 | * Redistribution and use in source and binary forms, with or without
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7 | * modification, are permitted provided that the following conditions
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8 | * are met:
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9 | *
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10 | * - Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions and the following disclaimer.
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12 | * - Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | * - The name of the author may not be used to endorse or promote products
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16 | * derived from this software without specific prior written permission.
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17 | *
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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28 | */
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29 |
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30 | /** @addtogroup genericipc
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31 | * @{
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32 | */
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33 | /**
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34 | * @file
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35 | * @brief IRQ notification framework.
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36 | *
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37 | * This framework allows applications to register to receive a notification
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38 | * when interrupt is detected. The application may provide a simple 'top-half'
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39 | * handler as part of its registration, which can perform simple operations
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40 | * (read/write port/memory, add information to notification ipc message).
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41 | *
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42 | * The structure of a notification message is as follows:
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43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall
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44 | * - ARG1: payload modified by a 'top-half' handler
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45 | * - ARG2: payload modified by a 'top-half' handler
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46 | * - ARG3: payload modified by a 'top-half' handler
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47 | * - in_phone_hash: interrupt counter (may be needed to assure correct order
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48 | * in multithreaded drivers)
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49 | */
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50 |
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51 | #include <arch.h>
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52 | #include <mm/slab.h>
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53 | #include <errno.h>
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54 | #include <ddi/irq.h>
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55 | #include <ipc/ipc.h>
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56 | #include <ipc/irq.h>
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57 | #include <syscall/copy.h>
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58 | #include <console/console.h>
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59 | #include <print.h>
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60 |
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61 | /** Execute code associated with IRQ notification.
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62 | *
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63 | * @param call Notification call.
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64 | * @param code Top-half pseudocode.
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65 | */
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66 | static void code_execute(call_t *call, irq_code_t *code)
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67 | {
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68 | int i;
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69 | unative_t dstval = 0;
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70 |
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71 | if (!code)
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72 | return;
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73 |
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74 | for (i=0; i < code->cmdcount;i++) {
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75 | switch (code->cmds[i].cmd) {
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76 | case CMD_MEM_READ_1:
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77 | dstval = *((uint8_t *)code->cmds[i].addr);
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78 | break;
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79 | case CMD_MEM_READ_2:
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80 | dstval = *((uint16_t *)code->cmds[i].addr);
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81 | break;
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82 | case CMD_MEM_READ_4:
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83 | dstval = *((uint32_t *)code->cmds[i].addr);
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84 | break;
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85 | case CMD_MEM_READ_8:
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86 | dstval = *((uint64_t *)code->cmds[i].addr);
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87 | break;
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88 | case CMD_MEM_WRITE_1:
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89 | *((uint8_t *)code->cmds[i].addr) = code->cmds[i].value;
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90 | break;
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91 | case CMD_MEM_WRITE_2:
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92 | *((uint16_t *)code->cmds[i].addr) = code->cmds[i].value;
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93 | break;
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94 | case CMD_MEM_WRITE_4:
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95 | *((uint32_t *)code->cmds[i].addr) = code->cmds[i].value;
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96 | break;
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97 | case CMD_MEM_WRITE_8:
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98 | *((uint64_t *)code->cmds[i].addr) = code->cmds[i].value;
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99 | break;
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100 | #if defined(ia32) || defined(amd64)
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101 | case CMD_PORT_READ_1:
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102 | dstval = inb((long)code->cmds[i].addr);
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103 | break;
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104 | case CMD_PORT_WRITE_1:
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105 | outb((long)code->cmds[i].addr, code->cmds[i].value);
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106 | break;
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107 | #endif
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108 | #if defined(ia64)
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109 | case CMD_IA64_GETCHAR:
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110 | dstval = _getc(&ski_uconsole);
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111 | break;
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112 | #endif
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113 | #if defined(ppc32)
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114 | case CMD_PPC32_GETCHAR:
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115 | dstval = cuda_get_scancode();
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116 | break;
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117 | #endif
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118 | default:
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119 | break;
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120 | }
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121 | if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) {
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122 | call->data.args[code->cmds[i].dstarg] = dstval;
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123 | }
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124 | }
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125 | }
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126 |
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127 | static void code_free(irq_code_t *code)
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128 | {
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129 | if (code) {
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130 | free(code->cmds);
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131 | free(code);
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132 | }
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133 | }
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134 |
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135 | static irq_code_t * code_from_uspace(irq_code_t *ucode)
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136 | {
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137 | irq_code_t *code;
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138 | irq_cmd_t *ucmds;
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139 | int rc;
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140 |
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141 | code = malloc(sizeof(*code), 0);
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142 | rc = copy_from_uspace(code, ucode, sizeof(*code));
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143 | if (rc != 0) {
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144 | free(code);
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145 | return NULL;
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146 | }
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147 |
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148 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
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149 | free(code);
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150 | return NULL;
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151 | }
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152 | ucmds = code->cmds;
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153 | code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
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154 | rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
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155 | if (rc != 0) {
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156 | free(code->cmds);
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157 | free(code);
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158 | return NULL;
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159 | }
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160 |
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161 | return code;
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162 | }
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163 |
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164 | /** Unregister task from IRQ notification.
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165 | *
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166 | * @param box Answerbox associated with the notification.
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167 | * @param inr IRQ numbe.
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168 | * @param devno Device number.
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169 | */
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170 | void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
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171 | {
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172 | ipl_t ipl;
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173 | irq_t *irq;
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174 |
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175 | ipl = interrupts_disable();
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176 | irq = irq_find_and_lock(inr, devno);
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177 | if (irq) {
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178 | if (irq->notif_cfg.answerbox == box) {
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179 | irq->notif_cfg.notify = false;
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180 | irq->notif_cfg.answerbox = NULL;
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181 | irq->notif_cfg.code = NULL;
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182 | irq->notif_cfg.method = 0;
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183 | irq->notif_cfg.counter = 0;
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184 | code_free(irq->notif_cfg.code);
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185 | spinlock_unlock(&irq->lock);
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186 | }
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187 | }
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188 | interrupts_restore(ipl);
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189 | }
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190 |
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191 | /** Register an answerbox as a receiving end for IRQ notifications.
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192 | *
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193 | * @param box Receiving answerbox.
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194 | * @param inr IRQ number.
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195 | * @param devno Device number.
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196 | * @param method Method to be associated with the notification.
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197 | * @param ucode Uspace pointer to top-half pseudocode.
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198 | *
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199 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success.
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200 | */
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201 | int
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202 | ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, unative_t method, irq_code_t *ucode)
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203 | {
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204 | ipl_t ipl;
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205 | irq_code_t *code;
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206 | irq_t *irq;
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207 |
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208 | if (ucode) {
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209 | code = code_from_uspace(ucode);
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210 | if (!code)
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211 | return EBADMEM;
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212 | } else
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213 | code = NULL;
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214 |
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215 | ipl = interrupts_disable();
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216 | irq = irq_find_and_lock(inr, devno);
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217 | if (!irq) {
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218 | interrupts_restore(ipl);
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219 | code_free(code);
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220 | return ENOENT;
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221 | }
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222 |
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223 | if (irq->notif_cfg.answerbox) {
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224 | spinlock_unlock(&irq->lock);
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225 | interrupts_restore(ipl);
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226 | code_free(code);
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227 | return EEXISTS;
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228 | }
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229 |
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230 | irq->notif_cfg.notify = true;
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231 | irq->notif_cfg.answerbox = box;
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232 | irq->notif_cfg.method = method;
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233 | irq->notif_cfg.code = code;
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234 | irq->notif_cfg.counter = 0;
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235 | spinlock_unlock(&irq->lock);
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236 | interrupts_restore(ipl);
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237 |
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238 | return 0;
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239 | }
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240 |
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241 | /** Add call to proper answerbox queue.
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242 | *
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243 | * Assume irq->lock is locked.
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244 | *
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245 | */
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246 | static void send_call(irq_t *irq, call_t *call)
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247 | {
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248 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock);
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249 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
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250 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock);
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251 |
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252 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
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253 | }
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254 |
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255 | /** Send notification message
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256 | *
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257 | */
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258 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3)
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259 | {
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260 | call_t *call;
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261 |
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262 | spinlock_lock(&irq->lock);
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263 |
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264 | if (irq->notif_cfg.answerbox) {
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265 | call = ipc_call_alloc(FRAME_ATOMIC);
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266 | if (!call) {
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267 | spinlock_unlock(&irq->lock);
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268 | return;
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269 | }
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270 | call->flags |= IPC_CALL_NOTIF;
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271 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
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272 | IPC_SET_ARG1(call->data, a1);
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273 | IPC_SET_ARG2(call->data, a2);
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274 | IPC_SET_ARG3(call->data, a3);
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275 | /* Put a counter to the message */
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276 | call->private = ++irq->notif_cfg.counter;
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277 |
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278 | send_call(irq, call);
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279 | }
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280 | spinlock_unlock(&irq->lock);
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281 | }
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282 |
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283 | /** Notify task that an irq had occurred.
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284 | *
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285 | * We expect interrupts to be disabled and the irq->lock already held.
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286 | */
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287 | void ipc_irq_send_notif(irq_t *irq)
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288 | {
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289 | call_t *call;
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290 |
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291 | ASSERT(irq);
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292 |
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293 | if (irq->notif_cfg.answerbox) {
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294 | call = ipc_call_alloc(FRAME_ATOMIC);
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295 | if (!call) {
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296 | return;
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297 | }
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298 | call->flags |= IPC_CALL_NOTIF;
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299 | /* Put a counter to the message */
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300 | call->private = ++irq->notif_cfg.counter;
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301 | /* Set up args */
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302 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
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303 |
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304 | /* Execute code to handle irq */
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305 | code_execute(call, irq->notif_cfg.code);
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306 |
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307 | send_call(irq, call);
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308 | }
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309 | }
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310 |
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311 | /** Disconnect all IRQ notifications from an answerbox.
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312 | *
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313 | * @param box Answerbox for which we want to carry out the cleanup.
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314 | */
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315 | void ipc_irq_cleanup(answerbox_t *box)
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316 | {
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317 | /* TODO */
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318 | }
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319 |
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320 | /** @}
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321 | */
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