| 1 | /*
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| 2 | * Copyright (c) 2006 Ondrej Palkovsky
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| 3 | * Copyright (c) 2006 Jakub Jermar
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @addtogroup genericipc
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| 31 | * @{
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| 32 | */
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| 33 | /**
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| 34 | * @file
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| 35 | * @brief IRQ notification framework.
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| 36 | *
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| 37 | * This framework allows applications to register to receive a notification
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| 38 | * when interrupt is detected. The application may provide a simple 'top-half'
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| 39 | * handler as part of its registration, which can perform simple operations
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| 40 | * (read/write port/memory, add information to notification ipc message).
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| 41 | *
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| 42 | * The structure of a notification message is as follows:
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| 43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall
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| 44 | * - ARG1: payload modified by a 'top-half' handler
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| 45 | * - ARG2: payload modified by a 'top-half' handler
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| 46 | * - ARG3: payload modified by a 'top-half' handler
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| 47 | * - in_phone_hash: interrupt counter (may be needed to assure correct order
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| 48 | * in multithreaded drivers)
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| 49 | */
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| 50 |
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| 51 | #include <arch.h>
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| 52 | #include <mm/slab.h>
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| 53 | #include <errno.h>
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| 54 | #include <ddi/irq.h>
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| 55 | #include <ipc/ipc.h>
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| 56 | #include <ipc/irq.h>
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| 57 | #include <syscall/copy.h>
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| 58 | #include <console/console.h>
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| 59 | #include <print.h>
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| 60 |
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| 61 | /** Execute code associated with IRQ notification.
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| 62 | *
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| 63 | * @param call Notification call.
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| 64 | * @param code Top-half pseudocode.
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| 65 | */
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| 66 | static void code_execute(call_t *call, irq_code_t *code)
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| 67 | {
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| 68 | unsigned int i;
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| 69 | unative_t dstval = 0;
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| 70 |
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| 71 | if (!code)
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| 72 | return;
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| 73 |
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| 74 | for (i = 0; i < code->cmdcount; i++) {
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| 75 | switch (code->cmds[i].cmd) {
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| 76 | case CMD_MEM_READ_1:
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| 77 | dstval = *((uint8_t *) code->cmds[i].addr);
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| 78 | break;
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| 79 | case CMD_MEM_READ_2:
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| 80 | dstval = *((uint16_t *) code->cmds[i].addr);
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| 81 | break;
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| 82 | case CMD_MEM_READ_4:
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| 83 | dstval = *((uint32_t *) code->cmds[i].addr);
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| 84 | break;
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| 85 | case CMD_MEM_READ_8:
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| 86 | dstval = *((uint64_t *) code->cmds[i].addr);
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| 87 | break;
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| 88 | case CMD_MEM_WRITE_1:
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| 89 | *((uint8_t *) code->cmds[i].addr) = code->cmds[i].value;
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| 90 | break;
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| 91 | case CMD_MEM_WRITE_2:
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| 92 | *((uint16_t *) code->cmds[i].addr) =
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| 93 | code->cmds[i].value;
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| 94 | break;
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| 95 | case CMD_MEM_WRITE_4:
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| 96 | *((uint32_t *) code->cmds[i].addr) =
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| 97 | code->cmds[i].value;
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| 98 | break;
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| 99 | case CMD_MEM_WRITE_8:
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| 100 | *((uint64_t *) code->cmds[i].addr) =
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| 101 | code->cmds[i].value;
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| 102 | break;
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| 103 | #if defined(ia32) || defined(amd64)
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| 104 | case CMD_PORT_READ_1:
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| 105 | dstval = inb((long) code->cmds[i].addr);
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| 106 | break;
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| 107 | case CMD_PORT_WRITE_1:
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| 108 | outb((long) code->cmds[i].addr, code->cmds[i].value);
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| 109 | break;
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| 110 | #endif
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| 111 | #if defined(ia64) && defined(SKI)
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| 112 | case CMD_IA64_GETCHAR:
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| 113 | dstval = _getc(&ski_uconsole);
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| 114 | break;
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| 115 | #endif
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| 116 | #if defined(ppc32)
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| 117 | case CMD_PPC32_GETCHAR:
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| 118 | dstval = cuda_get_scancode();
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| 119 | break;
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| 120 | #endif
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| 121 | default:
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| 122 | break;
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| 123 | }
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| 124 | if (code->cmds[i].dstarg && code->cmds[i].dstarg <
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| 125 | IPC_CALL_LEN) {
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| 126 | call->data.args[code->cmds[i].dstarg] = dstval;
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| 127 | }
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| 128 | }
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| 129 | }
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| 130 |
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| 131 | /** Free top-half pseudocode.
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| 132 | *
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| 133 | * @param code Pointer to the top-half pseudocode.
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| 134 | */
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| 135 | static void code_free(irq_code_t *code)
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| 136 | {
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| 137 | if (code) {
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| 138 | free(code->cmds);
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| 139 | free(code);
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| 140 | }
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| 141 | }
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| 142 |
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| 143 | /** Copy top-half pseudocode from userspace into the kernel.
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| 144 | *
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| 145 | * @param ucode Userspace address of the top-half pseudocode.
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| 146 | *
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| 147 | * @return Kernel address of the copied pseudocode.
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| 148 | */
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| 149 | static irq_code_t *code_from_uspace(irq_code_t *ucode)
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| 150 | {
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| 151 | irq_code_t *code;
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| 152 | irq_cmd_t *ucmds;
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| 153 | int rc;
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| 154 |
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| 155 | code = malloc(sizeof(*code), 0);
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| 156 | rc = copy_from_uspace(code, ucode, sizeof(*code));
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| 157 | if (rc != 0) {
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| 158 | free(code);
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| 159 | return NULL;
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| 160 | }
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| 161 |
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| 162 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
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| 163 | free(code);
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| 164 | return NULL;
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| 165 | }
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| 166 | ucmds = code->cmds;
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| 167 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
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| 168 | rc = copy_from_uspace(code->cmds, ucmds,
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| 169 | sizeof(code->cmds[0]) * code->cmdcount);
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| 170 | if (rc != 0) {
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| 171 | free(code->cmds);
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| 172 | free(code);
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| 173 | return NULL;
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| 174 | }
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| 175 |
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| 176 | return code;
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| 177 | }
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| 178 |
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| 179 | /** Unregister task from IRQ notification.
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| 180 | *
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| 181 | * @param box Answerbox associated with the notification.
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| 182 | * @param inr IRQ number.
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| 183 | * @param devno Device number.
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| 184 | */
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| 185 | void ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
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| 186 | {
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| 187 | ipl_t ipl;
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| 188 | irq_t *irq;
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| 189 |
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| 190 | ipl = interrupts_disable();
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| 191 | irq = irq_find_and_lock(inr, devno);
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| 192 | if (irq) {
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| 193 | if (irq->notif_cfg.answerbox == box) {
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| 194 | code_free(irq->notif_cfg.code);
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| 195 | irq->notif_cfg.notify = false;
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| 196 | irq->notif_cfg.answerbox = NULL;
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| 197 | irq->notif_cfg.code = NULL;
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| 198 | irq->notif_cfg.method = 0;
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| 199 | irq->notif_cfg.counter = 0;
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| 200 |
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| 201 | spinlock_lock(&box->irq_lock);
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| 202 | list_remove(&irq->notif_cfg.link);
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| 203 | spinlock_unlock(&box->irq_lock);
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| 204 |
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| 205 | spinlock_unlock(&irq->lock);
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| 206 | }
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| 207 | }
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| 208 | interrupts_restore(ipl);
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| 209 | }
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| 210 |
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| 211 | /** Register an answerbox as a receiving end for IRQ notifications.
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| 212 | *
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| 213 | * @param box Receiving answerbox.
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| 214 | * @param inr IRQ number.
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| 215 | * @param devno Device number.
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| 216 | * @param method Method to be associated with the notification.
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| 217 | * @param ucode Uspace pointer to top-half pseudocode.
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| 218 | *
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| 219 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success.
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| 220 | */
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| 221 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
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| 222 | unative_t method, irq_code_t *ucode)
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| 223 | {
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| 224 | ipl_t ipl;
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| 225 | irq_code_t *code;
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| 226 | irq_t *irq;
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| 227 |
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| 228 | if (ucode) {
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| 229 | code = code_from_uspace(ucode);
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| 230 | if (!code)
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| 231 | return EBADMEM;
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| 232 | } else {
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| 233 | code = NULL;
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| 234 | }
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| 235 |
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| 236 | ipl = interrupts_disable();
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| 237 | irq = irq_find_and_lock(inr, devno);
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| 238 | if (!irq) {
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| 239 | interrupts_restore(ipl);
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| 240 | code_free(code);
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| 241 | return ENOENT;
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| 242 | }
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| 243 |
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| 244 | if (irq->notif_cfg.answerbox) {
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| 245 | spinlock_unlock(&irq->lock);
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| 246 | interrupts_restore(ipl);
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| 247 | code_free(code);
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| 248 | return EEXISTS;
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| 249 | }
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| 250 |
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| 251 | irq->notif_cfg.notify = true;
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| 252 | irq->notif_cfg.answerbox = box;
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| 253 | irq->notif_cfg.method = method;
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| 254 | irq->notif_cfg.code = code;
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| 255 | irq->notif_cfg.counter = 0;
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| 256 |
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| 257 | spinlock_lock(&box->irq_lock);
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| 258 | list_append(&irq->notif_cfg.link, &box->irq_head);
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| 259 | spinlock_unlock(&box->irq_lock);
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| 260 |
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| 261 | spinlock_unlock(&irq->lock);
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| 262 | interrupts_restore(ipl);
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| 263 |
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| 264 | return 0;
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| 265 | }
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| 266 |
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| 267 | /** Add a call to the proper answerbox queue.
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| 268 | *
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| 269 | * Assume irq->lock is locked.
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| 270 | *
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| 271 | * @param irq IRQ structure referencing the target answerbox.
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| 272 | * @param call IRQ notification call.
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| 273 | */
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| 274 | static void send_call(irq_t *irq, call_t *call)
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| 275 | {
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| 276 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock);
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| 277 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
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| 278 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock);
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| 279 |
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| 280 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
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| 281 | }
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| 282 |
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| 283 | /** Send notification message.
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| 284 | *
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| 285 | * @param irq IRQ structure.
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| 286 | * @param a1 Driver-specific payload argument.
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| 287 | * @param a2 Driver-specific payload argument.
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| 288 | * @param a3 Driver-specific payload argument.
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| 289 | * @param a4 Driver-specific payload argument.
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| 290 | * @param a5 Driver-specific payload argument.
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| 291 | */
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| 292 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3,
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| 293 | unative_t a4, unative_t a5)
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| 294 | {
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| 295 | call_t *call;
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| 296 |
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| 297 | spinlock_lock(&irq->lock);
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| 298 |
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| 299 | if (irq->notif_cfg.answerbox) {
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| 300 | call = ipc_call_alloc(FRAME_ATOMIC);
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| 301 | if (!call) {
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| 302 | spinlock_unlock(&irq->lock);
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| 303 | return;
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| 304 | }
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| 305 | call->flags |= IPC_CALL_NOTIF;
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| 306 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
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| 307 | IPC_SET_ARG1(call->data, a1);
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| 308 | IPC_SET_ARG2(call->data, a2);
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| 309 | IPC_SET_ARG3(call->data, a3);
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| 310 | IPC_SET_ARG4(call->data, a4);
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| 311 | IPC_SET_ARG5(call->data, a5);
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| 312 | /* Put a counter to the message */
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| 313 | call->priv = ++irq->notif_cfg.counter;
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| 314 |
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| 315 | send_call(irq, call);
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| 316 | }
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| 317 | spinlock_unlock(&irq->lock);
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| 318 | }
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| 319 |
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| 320 | /** Notify a task that an IRQ had occurred.
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| 321 | *
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| 322 | * We expect interrupts to be disabled and the irq->lock already held.
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| 323 | *
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| 324 | * @param irq IRQ structure.
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| 325 | */
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| 326 | void ipc_irq_send_notif(irq_t *irq)
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| 327 | {
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| 328 | call_t *call;
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| 329 |
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| 330 | ASSERT(irq);
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| 331 |
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| 332 | if (irq->notif_cfg.answerbox) {
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| 333 | call = ipc_call_alloc(FRAME_ATOMIC);
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| 334 | if (!call) {
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| 335 | return;
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| 336 | }
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| 337 | call->flags |= IPC_CALL_NOTIF;
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| 338 | /* Put a counter to the message */
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| 339 | call->priv = ++irq->notif_cfg.counter;
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| 340 | /* Set up args */
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| 341 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
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| 342 |
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| 343 | /* Execute code to handle irq */
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| 344 | code_execute(call, irq->notif_cfg.code);
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| 345 |
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| 346 | send_call(irq, call);
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| 347 | }
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| 348 | }
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| 349 |
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| 350 | /** Disconnect all IRQ notifications from an answerbox.
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| 351 | *
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| 352 | * This function is effective because the answerbox contains
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| 353 | * list of all irq_t structures that are registered to
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| 354 | * send notifications to it.
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| 355 | *
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| 356 | * @param box Answerbox for which we want to carry out the cleanup.
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| 357 | */
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| 358 | void ipc_irq_cleanup(answerbox_t *box)
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| 359 | {
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| 360 | ipl_t ipl;
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| 361 |
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| 362 | loop:
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| 363 | ipl = interrupts_disable();
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| 364 | spinlock_lock(&box->irq_lock);
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| 365 |
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| 366 | while (box->irq_head.next != &box->irq_head) {
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| 367 | link_t *cur = box->irq_head.next;
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| 368 | irq_t *irq;
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| 369 | DEADLOCK_PROBE_INIT(p_irqlock);
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| 370 |
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| 371 | irq = list_get_instance(cur, irq_t, notif_cfg.link);
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| 372 | if (!spinlock_trylock(&irq->lock)) {
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| 373 | /*
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| 374 | * Avoid deadlock by trying again.
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| 375 | */
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| 376 | spinlock_unlock(&box->irq_lock);
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| 377 | interrupts_restore(ipl);
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| 378 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
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| 379 | goto loop;
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| 380 | }
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| 381 |
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| 382 | ASSERT(irq->notif_cfg.answerbox == box);
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| 383 |
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| 384 | list_remove(&irq->notif_cfg.link);
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| 385 |
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| 386 | /*
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| 387 | * Don't forget to free any top-half pseudocode.
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| 388 | */
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| 389 | code_free(irq->notif_cfg.code);
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| 390 |
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| 391 | irq->notif_cfg.notify = false;
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| 392 | irq->notif_cfg.answerbox = NULL;
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| 393 | irq->notif_cfg.code = NULL;
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| 394 | irq->notif_cfg.method = 0;
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| 395 | irq->notif_cfg.counter = 0;
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| 396 |
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| 397 | spinlock_unlock(&irq->lock);
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| 398 | }
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| 399 |
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| 400 | spinlock_unlock(&box->irq_lock);
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| 401 | interrupts_restore(ipl);
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| 402 | }
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| 403 |
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| 404 | /** @}
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| 405 | */
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