| 1 | /*
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| 2 | * Copyright (c) 2006 Ondrej Palkovsky
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| 3 | * Copyright (c) 2006 Jakub Jermar
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @addtogroup genericipc
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| 31 | * @{
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| 32 | */
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| 33 |
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| 34 | /**
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| 35 | * @file
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| 36 | * @brief IRQ notification framework.
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| 37 | *
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| 38 | * This framework allows applications to register to receive a notification
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| 39 | * when interrupt is detected. The application may provide a simple 'top-half'
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| 40 | * handler as part of its registration, which can perform simple operations
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| 41 | * (read/write port/memory, add information to notification ipc message).
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| 42 | *
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| 43 | * The structure of a notification message is as follows:
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| 44 | * - IMETHOD: interface and method as registered by
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| 45 | * the SYS_IRQ_REGISTER syscall
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| 46 | * - ARG1: payload modified by a 'top-half' handler
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| 47 | * - ARG2: payload modified by a 'top-half' handler
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| 48 | * - ARG3: payload modified by a 'top-half' handler
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| 49 | * - ARG4: payload modified by a 'top-half' handler
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| 50 | * - ARG5: payload modified by a 'top-half' handler
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| 51 | * - in_phone_hash: interrupt counter (may be needed to assure correct order
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| 52 | * in multithreaded drivers)
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| 53 | *
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| 54 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
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| 55 | * ipc_irq_cleanup() and IRQ handlers:
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| 56 | *
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| 57 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock
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| 58 | * and answerbox lock, we can rule out race conditions between the
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| 59 | * registration functions and also the cleanup function. Thus the observer can
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| 60 | * either see the IRQ structure present in both the hash table and the
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| 61 | * answerbox list or absent in both. Views in which the IRQ structure would be
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| 62 | * linked in the hash table but not in the answerbox list, or vice versa, are
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| 63 | * not possible.
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| 64 | *
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| 65 | * By always taking the hash table lock and the IRQ structure lock, we can
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| 66 | * rule out a scenario in which we would free up an IRQ structure, which is
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| 67 | * still referenced by, for example, an IRQ handler. The locking scheme forces
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| 68 | * us to lock the IRQ structure only after any progressing IRQs on that
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| 69 | * structure are finished. Because we hold the hash table lock, we prevent new
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| 70 | * IRQs from taking new references to the IRQ structure.
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| 71 | *
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| 72 | */
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| 73 |
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| 74 | #include <arch.h>
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| 75 | #include <mm/slab.h>
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| 76 | #include <mm/page.h>
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| 77 | #include <mm/km.h>
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| 78 | #include <errno.h>
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| 79 | #include <ddi/irq.h>
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| 80 | #include <ipc/ipc.h>
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| 81 | #include <ipc/irq.h>
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| 82 | #include <syscall/copy.h>
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| 83 | #include <console/console.h>
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| 84 | #include <print.h>
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| 85 | #include <macros.h>
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| 86 |
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| 87 | static void ranges_unmap(irq_pio_range_t *ranges, size_t rangecount)
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| 88 | {
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| 89 | size_t i;
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| 90 |
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| 91 | for (i = 0; i < rangecount; i++) {
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| 92 | #ifdef IO_SPACE_BOUNDARY
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| 93 | if ((void *) ranges[i].base >= IO_SPACE_BOUNDARY)
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| 94 | #endif
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| 95 | km_unmap(ranges[i].base, ranges[i].size);
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| 96 | }
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| 97 | }
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| 98 |
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| 99 | static int ranges_map_and_apply(irq_pio_range_t *ranges, size_t rangecount,
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| 100 | irq_cmd_t *cmds, size_t cmdcount)
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| 101 | {
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| 102 | uintptr_t *pbase;
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| 103 | size_t i, j;
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| 104 |
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| 105 | /* Copy the physical base addresses aside. */
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| 106 | pbase = malloc(rangecount * sizeof(uintptr_t), 0);
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| 107 | for (i = 0; i < rangecount; i++)
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| 108 | pbase[i] = ranges[i].base;
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| 109 |
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| 110 | /* Map the PIO ranges into the kernel virtual address space. */
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| 111 | for (i = 0; i < rangecount; i++) {
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| 112 | #ifdef IO_SPACE_BOUNDARY
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| 113 | if ((void *) ranges[i].base < IO_SPACE_BOUNDARY)
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| 114 | continue;
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| 115 | #endif
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| 116 | ranges[i].base = km_map(pbase[i], ranges[i].size,
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| 117 | PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);
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| 118 | if (!ranges[i].base) {
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| 119 | ranges_unmap(ranges, i);
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| 120 | free(pbase);
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| 121 | return ENOMEM;
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| 122 | }
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| 123 | }
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| 124 |
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| 125 | /* Rewrite the pseudocode addresses from physical to kernel virtual. */
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| 126 | for (i = 0; i < cmdcount; i++) {
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| 127 | uintptr_t addr;
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| 128 | size_t size;
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| 129 |
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| 130 | /* Process only commands that use an address. */
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| 131 | switch (cmds[i].cmd) {
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| 132 | case CMD_PIO_READ_8:
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| 133 | case CMD_PIO_WRITE_8:
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| 134 | case CMD_PIO_WRITE_A_8:
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| 135 | size = 1;
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| 136 | break;
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| 137 | case CMD_PIO_READ_16:
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| 138 | case CMD_PIO_WRITE_16:
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| 139 | case CMD_PIO_WRITE_A_16:
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| 140 | size = 2;
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| 141 | break;
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| 142 | case CMD_PIO_READ_32:
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| 143 | case CMD_PIO_WRITE_32:
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| 144 | case CMD_PIO_WRITE_A_32:
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| 145 | size = 4;
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| 146 | break;
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| 147 | default:
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| 148 | /* Move onto the next command. */
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| 149 | continue;
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| 150 | }
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| 151 |
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| 152 | addr = (uintptr_t) cmds[i].addr;
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| 153 |
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| 154 | for (j = 0; j < rangecount; j++) {
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| 155 |
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| 156 | /* Find the matching range. */
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| 157 | if (!iswithin(pbase[j], ranges[j].size, addr, size))
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| 158 | continue;
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| 159 |
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| 160 | /* Switch the command to a kernel virtual address. */
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| 161 | addr -= pbase[j];
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| 162 | addr += ranges[j].base;
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| 163 |
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| 164 | cmds[i].addr = (void *) addr;
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| 165 | break;
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| 166 | }
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| 167 |
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| 168 | if (j == rangecount) {
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| 169 | /*
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| 170 | * The address used in this command is outside of all
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| 171 | * defined ranges.
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| 172 | */
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| 173 | ranges_unmap(ranges, rangecount);
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| 174 | free(pbase);
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| 175 | return EINVAL;
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| 176 | }
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| 177 | }
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| 178 |
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| 179 | free(pbase);
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| 180 | return EOK;
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| 181 | }
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| 182 |
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| 183 | /** Free the top-half pseudocode.
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| 184 | *
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| 185 | * @param code Pointer to the top-half pseudocode.
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| 186 | *
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| 187 | */
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| 188 | static void code_free(irq_code_t *code)
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| 189 | {
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| 190 | if (code) {
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| 191 | ranges_unmap(code->ranges, code->rangecount);
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| 192 | free(code->ranges);
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| 193 | free(code->cmds);
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| 194 | free(code);
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| 195 | }
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| 196 | }
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| 197 |
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| 198 | /** Copy the top-half pseudocode from userspace into the kernel.
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| 199 | *
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| 200 | * @param ucode Userspace address of the top-half pseudocode.
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| 201 | *
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| 202 | * @return Kernel address of the copied pseudocode.
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| 203 | *
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| 204 | */
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| 205 | static irq_code_t *code_from_uspace(irq_code_t *ucode)
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| 206 | {
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| 207 | irq_pio_range_t *ranges = NULL;
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| 208 | irq_cmd_t *cmds = NULL;
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| 209 |
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| 210 | irq_code_t *code = malloc(sizeof(*code), 0);
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| 211 | int rc = copy_from_uspace(code, ucode, sizeof(*code));
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| 212 | if (rc != EOK)
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| 213 | goto error;
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| 214 |
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| 215 | if ((code->rangecount > IRQ_MAX_RANGE_COUNT) ||
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| 216 | (code->cmdcount > IRQ_MAX_PROG_SIZE))
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| 217 | goto error;
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| 218 |
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| 219 | ranges = malloc(sizeof(code->ranges[0]) * code->rangecount, 0);
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| 220 | rc = copy_from_uspace(ranges, code->ranges,
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| 221 | sizeof(code->ranges[0]) * code->rangecount);
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| 222 | if (rc != EOK)
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| 223 | goto error;
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| 224 |
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| 225 | cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
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| 226 | rc = copy_from_uspace(cmds, code->cmds,
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| 227 | sizeof(code->cmds[0]) * code->cmdcount);
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| 228 | if (rc != EOK)
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| 229 | goto error;
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| 230 |
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| 231 | rc = ranges_map_and_apply(ranges, code->rangecount, cmds,
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| 232 | code->cmdcount);
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| 233 | if (rc != EOK)
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| 234 | goto error;
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| 235 |
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| 236 | code->ranges = ranges;
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| 237 | code->cmds = cmds;
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| 238 |
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| 239 | return code;
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| 240 |
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| 241 | error:
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| 242 | if (cmds)
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| 243 | free(cmds);
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| 244 | if (ranges)
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| 245 | free(ranges);
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| 246 | free(code);
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| 247 | return NULL;
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| 248 | }
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| 249 |
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| 250 | /** Register an answerbox as a receiving end for IRQ notifications.
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| 251 | *
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| 252 | * @param box Receiving answerbox.
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| 253 | * @param inr IRQ number.
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| 254 | * @param devno Device number.
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| 255 | * @param imethod Interface and method to be associated with the
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| 256 | * notification.
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| 257 | * @param ucode Uspace pointer to top-half pseudocode.
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| 258 | * @return EOK on success or a negative error code.
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| 259 | *
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| 260 | */
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| 261 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
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| 262 | sysarg_t imethod, irq_code_t *ucode)
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| 263 | {
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| 264 | sysarg_t key[] = {
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| 265 | (sysarg_t) inr,
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| 266 | (sysarg_t) devno
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| 267 | };
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| 268 |
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| 269 | if ((inr < 0) || (inr > last_inr))
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| 270 | return ELIMIT;
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| 271 |
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| 272 | irq_code_t *code;
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| 273 | if (ucode) {
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| 274 | code = code_from_uspace(ucode);
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| 275 | if (!code)
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| 276 | return EBADMEM;
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| 277 | } else
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| 278 | code = NULL;
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| 279 |
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| 280 | /*
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| 281 | * Allocate and populate the IRQ structure.
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| 282 | */
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| 283 | irq_t *irq = malloc(sizeof(irq_t), 0);
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| 284 |
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| 285 | irq_initialize(irq);
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| 286 | irq->devno = devno;
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| 287 | irq->inr = inr;
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| 288 | irq->claim = ipc_irq_top_half_claim;
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| 289 | irq->handler = ipc_irq_top_half_handler;
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| 290 | irq->notif_cfg.notify = true;
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| 291 | irq->notif_cfg.answerbox = box;
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| 292 | irq->notif_cfg.imethod = imethod;
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| 293 | irq->notif_cfg.code = code;
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| 294 | irq->notif_cfg.counter = 0;
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| 295 |
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| 296 | /*
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| 297 | * Enlist the IRQ structure in the uspace IRQ hash table and the
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| 298 | * answerbox's list.
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| 299 | */
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| 300 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 301 |
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| 302 | link_t *hlp = hash_table_find(&irq_uspace_hash_table, key);
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| 303 | if (hlp) {
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| 304 | irq_t *hirq = hash_table_get_instance(hlp, irq_t, link);
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| 305 |
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| 306 | /* hirq is locked */
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| 307 | irq_spinlock_unlock(&hirq->lock, false);
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| 308 | code_free(code);
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| 309 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 310 |
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| 311 | free(irq);
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| 312 | return EEXISTS;
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| 313 | }
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| 314 |
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| 315 | /* Locking is not really necessary, but paranoid */
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| 316 | irq_spinlock_lock(&irq->lock, false);
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| 317 | irq_spinlock_lock(&box->irq_lock, false);
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| 318 |
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| 319 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
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| 320 | list_append(&irq->notif_cfg.link, &box->irq_list);
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| 321 |
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| 322 | irq_spinlock_unlock(&box->irq_lock, false);
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| 323 | irq_spinlock_unlock(&irq->lock, false);
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| 324 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 325 |
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| 326 | return EOK;
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| 327 | }
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| 328 |
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| 329 | /** Unregister task from IRQ notification.
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| 330 | *
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| 331 | * @param box Answerbox associated with the notification.
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| 332 | * @param inr IRQ number.
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| 333 | * @param devno Device number.
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| 334 | * @return EOK on success or a negative error code.
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| 335 | */
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| 336 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
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| 337 | {
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| 338 | sysarg_t key[] = {
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| 339 | (sysarg_t) inr,
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| 340 | (sysarg_t) devno
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| 341 | };
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| 342 |
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| 343 | if ((inr < 0) || (inr > last_inr))
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| 344 | return ELIMIT;
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| 345 |
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| 346 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 347 | link_t *lnk = hash_table_find(&irq_uspace_hash_table, key);
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| 348 | if (!lnk) {
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| 349 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 350 | return ENOENT;
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| 351 | }
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| 352 |
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| 353 | irq_t *irq = hash_table_get_instance(lnk, irq_t, link);
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| 354 |
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| 355 | /* irq is locked */
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| 356 | irq_spinlock_lock(&box->irq_lock, false);
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| 357 |
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| 358 | ASSERT(irq->notif_cfg.answerbox == box);
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| 359 |
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| 360 | /* Remove the IRQ from the answerbox's list. */
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| 361 | list_remove(&irq->notif_cfg.link);
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| 362 |
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| 363 | /*
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| 364 | * We need to drop the IRQ lock now because hash_table_remove() will try
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| 365 | * to reacquire it. That basically violates the natural locking order,
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| 366 | * but a deadlock in hash_table_remove() is prevented by the fact that
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| 367 | * we already held the IRQ lock and didn't drop the hash table lock in
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| 368 | * the meantime.
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| 369 | */
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| 370 | irq_spinlock_unlock(&irq->lock, false);
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| 371 |
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| 372 | /* Remove the IRQ from the uspace IRQ hash table. */
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| 373 | hash_table_remove(&irq_uspace_hash_table, key, 2);
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| 374 |
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| 375 | irq_spinlock_unlock(&box->irq_lock, false);
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| 376 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 377 |
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| 378 | /* Free up the pseudo code and associated structures. */
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| 379 | code_free(irq->notif_cfg.code);
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| 380 |
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| 381 | /* Free up the IRQ structure. */
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| 382 | free(irq);
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| 383 |
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| 384 | return EOK;
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| 385 | }
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| 386 |
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| 387 | /** Disconnect all IRQ notifications from an answerbox.
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| 388 | *
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| 389 | * This function is effective because the answerbox contains
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| 390 | * list of all irq_t structures that are registered to
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| 391 | * send notifications to it.
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| 392 | *
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| 393 | * @param box Answerbox for which we want to carry out the cleanup.
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| 394 | *
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| 395 | */
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| 396 | void ipc_irq_cleanup(answerbox_t *box)
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| 397 | {
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| 398 | loop:
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| 399 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 400 | irq_spinlock_lock(&box->irq_lock, false);
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| 401 |
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| 402 | while (!list_empty(&box->irq_list)) {
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| 403 | DEADLOCK_PROBE_INIT(p_irqlock);
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| 404 |
|
|---|
| 405 | irq_t *irq = list_get_instance(list_first(&box->irq_list), irq_t,
|
|---|
| 406 | notif_cfg.link);
|
|---|
| 407 |
|
|---|
| 408 | if (!irq_spinlock_trylock(&irq->lock)) {
|
|---|
| 409 | /*
|
|---|
| 410 | * Avoid deadlock by trying again.
|
|---|
| 411 | */
|
|---|
| 412 | irq_spinlock_unlock(&box->irq_lock, false);
|
|---|
| 413 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
|
|---|
| 414 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
|
|---|
| 415 | goto loop;
|
|---|
| 416 | }
|
|---|
| 417 |
|
|---|
| 418 | sysarg_t key[2];
|
|---|
| 419 | key[0] = irq->inr;
|
|---|
| 420 | key[1] = irq->devno;
|
|---|
| 421 |
|
|---|
| 422 | ASSERT(irq->notif_cfg.answerbox == box);
|
|---|
| 423 |
|
|---|
| 424 | /* Unlist from the answerbox. */
|
|---|
| 425 | list_remove(&irq->notif_cfg.link);
|
|---|
| 426 |
|
|---|
| 427 | /*
|
|---|
| 428 | * We need to drop the IRQ lock now because hash_table_remove()
|
|---|
| 429 | * will try to reacquire it. That basically violates the natural
|
|---|
| 430 | * locking order, but a deadlock in hash_table_remove() is
|
|---|
| 431 | * prevented by the fact that we already held the IRQ lock and
|
|---|
| 432 | * didn't drop the hash table lock in the meantime.
|
|---|
| 433 | */
|
|---|
| 434 | irq_spinlock_unlock(&irq->lock, false);
|
|---|
| 435 |
|
|---|
| 436 | /* Remove from the hash table. */
|
|---|
| 437 | hash_table_remove(&irq_uspace_hash_table, key, 2);
|
|---|
| 438 |
|
|---|
| 439 | /*
|
|---|
| 440 | * Release both locks so that we can free the pseudo code.
|
|---|
| 441 | */
|
|---|
| 442 | irq_spinlock_unlock(&box->irq_lock, false);
|
|---|
| 443 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
|
|---|
| 444 |
|
|---|
| 445 | code_free(irq->notif_cfg.code);
|
|---|
| 446 | free(irq);
|
|---|
| 447 |
|
|---|
| 448 | /* Reacquire both locks before taking another round. */
|
|---|
| 449 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
|
|---|
| 450 | irq_spinlock_lock(&box->irq_lock, false);
|
|---|
| 451 | }
|
|---|
| 452 |
|
|---|
| 453 | irq_spinlock_unlock(&box->irq_lock, false);
|
|---|
| 454 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
|
|---|
| 455 | }
|
|---|
| 456 |
|
|---|
| 457 | /** Add a call to the proper answerbox queue.
|
|---|
| 458 | *
|
|---|
| 459 | * Assume irq->lock is locked and interrupts disabled.
|
|---|
| 460 | *
|
|---|
| 461 | * @param irq IRQ structure referencing the target answerbox.
|
|---|
| 462 | * @param call IRQ notification call.
|
|---|
| 463 | *
|
|---|
| 464 | */
|
|---|
| 465 | static void send_call(irq_t *irq, call_t *call)
|
|---|
| 466 | {
|
|---|
| 467 | irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
|
|---|
| 468 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
|
|---|
| 469 | irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
|
|---|
| 470 |
|
|---|
| 471 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
|
|---|
| 472 | }
|
|---|
| 473 |
|
|---|
| 474 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
|
|---|
| 475 | *
|
|---|
| 476 | * @param irq IRQ structure.
|
|---|
| 477 | *
|
|---|
| 478 | * @return IRQ_ACCEPT if the interrupt is accepted by the
|
|---|
| 479 | * pseudocode, IRQ_DECLINE otherwise.
|
|---|
| 480 | *
|
|---|
| 481 | */
|
|---|
| 482 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
|
|---|
| 483 | {
|
|---|
| 484 | irq_code_t *code = irq->notif_cfg.code;
|
|---|
| 485 | uint32_t *scratch = irq->notif_cfg.scratch;
|
|---|
| 486 |
|
|---|
| 487 | if (!irq->notif_cfg.notify)
|
|---|
| 488 | return IRQ_DECLINE;
|
|---|
| 489 |
|
|---|
| 490 | if (!code)
|
|---|
| 491 | return IRQ_DECLINE;
|
|---|
| 492 |
|
|---|
| 493 | for (size_t i = 0; i < code->cmdcount; i++) {
|
|---|
| 494 | uint32_t dstval;
|
|---|
| 495 |
|
|---|
| 496 | uintptr_t srcarg = code->cmds[i].srcarg;
|
|---|
| 497 | uintptr_t dstarg = code->cmds[i].dstarg;
|
|---|
| 498 |
|
|---|
| 499 | if (srcarg >= IPC_CALL_LEN)
|
|---|
| 500 | break;
|
|---|
| 501 |
|
|---|
| 502 | if (dstarg >= IPC_CALL_LEN)
|
|---|
| 503 | break;
|
|---|
| 504 |
|
|---|
| 505 | switch (code->cmds[i].cmd) {
|
|---|
| 506 | case CMD_PIO_READ_8:
|
|---|
| 507 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
|
|---|
| 508 | if (dstarg)
|
|---|
| 509 | scratch[dstarg] = dstval;
|
|---|
| 510 | break;
|
|---|
| 511 | case CMD_PIO_READ_16:
|
|---|
| 512 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
|
|---|
| 513 | if (dstarg)
|
|---|
| 514 | scratch[dstarg] = dstval;
|
|---|
| 515 | break;
|
|---|
| 516 | case CMD_PIO_READ_32:
|
|---|
| 517 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
|
|---|
| 518 | if (dstarg)
|
|---|
| 519 | scratch[dstarg] = dstval;
|
|---|
| 520 | break;
|
|---|
| 521 | case CMD_PIO_WRITE_8:
|
|---|
| 522 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
|---|
| 523 | (uint8_t) code->cmds[i].value);
|
|---|
| 524 | break;
|
|---|
| 525 | case CMD_PIO_WRITE_16:
|
|---|
| 526 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
|---|
| 527 | (uint16_t) code->cmds[i].value);
|
|---|
| 528 | break;
|
|---|
| 529 | case CMD_PIO_WRITE_32:
|
|---|
| 530 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
|---|
| 531 | (uint32_t) code->cmds[i].value);
|
|---|
| 532 | break;
|
|---|
| 533 | case CMD_PIO_WRITE_A_8:
|
|---|
| 534 | if (srcarg) {
|
|---|
| 535 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
|---|
| 536 | (uint8_t) scratch[srcarg]);
|
|---|
| 537 | }
|
|---|
| 538 | break;
|
|---|
| 539 | case CMD_PIO_WRITE_A_16:
|
|---|
| 540 | if (srcarg) {
|
|---|
| 541 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
|---|
| 542 | (uint16_t) scratch[srcarg]);
|
|---|
| 543 | }
|
|---|
| 544 | break;
|
|---|
| 545 | case CMD_PIO_WRITE_A_32:
|
|---|
| 546 | if (srcarg) {
|
|---|
| 547 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
|---|
| 548 | (uint32_t) scratch[srcarg]);
|
|---|
| 549 | }
|
|---|
| 550 | break;
|
|---|
| 551 | case CMD_BTEST:
|
|---|
| 552 | if ((srcarg) && (dstarg)) {
|
|---|
| 553 | dstval = scratch[srcarg] & code->cmds[i].value;
|
|---|
| 554 | scratch[dstarg] = dstval;
|
|---|
| 555 | }
|
|---|
| 556 | break;
|
|---|
| 557 | case CMD_PREDICATE:
|
|---|
| 558 | if ((srcarg) && (!scratch[srcarg])) {
|
|---|
| 559 | i += code->cmds[i].value;
|
|---|
| 560 | continue;
|
|---|
| 561 | }
|
|---|
| 562 | break;
|
|---|
| 563 | case CMD_ACCEPT:
|
|---|
| 564 | return IRQ_ACCEPT;
|
|---|
| 565 | case CMD_DECLINE:
|
|---|
| 566 | default:
|
|---|
| 567 | return IRQ_DECLINE;
|
|---|
| 568 | }
|
|---|
| 569 | }
|
|---|
| 570 |
|
|---|
| 571 | return IRQ_DECLINE;
|
|---|
| 572 | }
|
|---|
| 573 |
|
|---|
| 574 | /* IRQ top-half handler.
|
|---|
| 575 | *
|
|---|
| 576 | * We expect interrupts to be disabled and the irq->lock already held.
|
|---|
| 577 | *
|
|---|
| 578 | * @param irq IRQ structure.
|
|---|
| 579 | *
|
|---|
| 580 | */
|
|---|
| 581 | void ipc_irq_top_half_handler(irq_t *irq)
|
|---|
| 582 | {
|
|---|
| 583 | ASSERT(irq);
|
|---|
| 584 |
|
|---|
| 585 | ASSERT(interrupts_disabled());
|
|---|
| 586 | ASSERT(irq_spinlock_locked(&irq->lock));
|
|---|
| 587 |
|
|---|
| 588 | if (irq->notif_cfg.answerbox) {
|
|---|
| 589 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
|---|
| 590 | if (!call)
|
|---|
| 591 | return;
|
|---|
| 592 |
|
|---|
| 593 | call->flags |= IPC_CALL_NOTIF;
|
|---|
| 594 | /* Put a counter to the message */
|
|---|
| 595 | call->priv = ++irq->notif_cfg.counter;
|
|---|
| 596 |
|
|---|
| 597 | /* Set up args */
|
|---|
| 598 | IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
|
|---|
| 599 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
|
|---|
| 600 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
|
|---|
| 601 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
|
|---|
| 602 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
|
|---|
| 603 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
|
|---|
| 604 |
|
|---|
| 605 | send_call(irq, call);
|
|---|
| 606 | }
|
|---|
| 607 | }
|
|---|
| 608 |
|
|---|
| 609 | /** Send notification message.
|
|---|
| 610 | *
|
|---|
| 611 | * @param irq IRQ structure.
|
|---|
| 612 | * @param a1 Driver-specific payload argument.
|
|---|
| 613 | * @param a2 Driver-specific payload argument.
|
|---|
| 614 | * @param a3 Driver-specific payload argument.
|
|---|
| 615 | * @param a4 Driver-specific payload argument.
|
|---|
| 616 | * @param a5 Driver-specific payload argument.
|
|---|
| 617 | *
|
|---|
| 618 | */
|
|---|
| 619 | void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
|
|---|
| 620 | sysarg_t a4, sysarg_t a5)
|
|---|
| 621 | {
|
|---|
| 622 | irq_spinlock_lock(&irq->lock, true);
|
|---|
| 623 |
|
|---|
| 624 | if (irq->notif_cfg.answerbox) {
|
|---|
| 625 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
|---|
| 626 | if (!call) {
|
|---|
| 627 | irq_spinlock_unlock(&irq->lock, true);
|
|---|
| 628 | return;
|
|---|
| 629 | }
|
|---|
| 630 |
|
|---|
| 631 | call->flags |= IPC_CALL_NOTIF;
|
|---|
| 632 | /* Put a counter to the message */
|
|---|
| 633 | call->priv = ++irq->notif_cfg.counter;
|
|---|
| 634 |
|
|---|
| 635 | IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
|
|---|
| 636 | IPC_SET_ARG1(call->data, a1);
|
|---|
| 637 | IPC_SET_ARG2(call->data, a2);
|
|---|
| 638 | IPC_SET_ARG3(call->data, a3);
|
|---|
| 639 | IPC_SET_ARG4(call->data, a4);
|
|---|
| 640 | IPC_SET_ARG5(call->data, a5);
|
|---|
| 641 |
|
|---|
| 642 | send_call(irq, call);
|
|---|
| 643 | }
|
|---|
| 644 |
|
|---|
| 645 | irq_spinlock_unlock(&irq->lock, true);
|
|---|
| 646 | }
|
|---|
| 647 |
|
|---|
| 648 | /** @}
|
|---|
| 649 | */
|
|---|