source: mainline/kernel/generic/src/ipc/irq.c@ eca820c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since eca820c was c1f68b0, checked in by Jakub Jermar <jakub@…>, 8 years ago

Use recursive mutex to protect task_t::cap_info

This makes it possible to use the mutex-protected capability APIs even
inside caps_apply_to_kobject_type() callbacks. Now there is no need to
provide eg. cap_unpublish_locked() and cap_free_locked(). Likewise,
ipc_irq_unsubscribe() can be used when the task's cap_info is already
locked by the current thread inside of a callback.

  • Property mode set to 100644
File size: 14.4 KB
RevLine 
[162f919]1/*
[df4ed85]2 * Copyright (c) 2006 Ondrej Palkovsky
3 * Copyright (c) 2006 Jakub Jermar
[162f919]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
[cc73a8a1]30/** @addtogroup genericipc
[b45c443]31 * @{
32 */
[da1bafb]33
[cc73a8a1]34/**
35 * @file
36 * @brief IRQ notification framework.
[bdc5c516]37 *
[8820544]38 * This framework allows applications to subscribe to receive a notification
[a5d0143]39 * when an interrupt is detected. The application may provide a simple
40 * 'top-half' handler as part of its registration, which can perform simple
41 * operations (read/write port/memory, add information to notification IPC
42 * message).
[bdc5c516]43 *
44 * The structure of a notification message is as follows:
[8820544]45 * - IMETHOD: interface and method as set by the SYS_IPC_IRQ_SUBSCRIBE syscall
[56c167c]46 * - ARG1: payload modified by a 'top-half' handler (scratch[1])
47 * - ARG2: payload modified by a 'top-half' handler (scratch[2])
48 * - ARG3: payload modified by a 'top-half' handler (scratch[3])
49 * - ARG4: payload modified by a 'top-half' handler (scratch[4])
50 * - ARG5: payload modified by a 'top-half' handler (scratch[5])
[43752b6]51 * - in_phone_hash: interrupt counter (may be needed to assure correct order
[228e490]52 * in multithreaded drivers)
[bdc5c516]53 */
54
[162f919]55#include <arch.h>
[63e27ef]56#include <assert.h>
[162f919]57#include <mm/slab.h>
[a996ae31]58#include <mm/page.h>
59#include <mm/km.h>
[162f919]60#include <errno.h>
[2b017ba]61#include <ddi/irq.h>
[162f919]62#include <ipc/ipc.h>
63#include <ipc/irq.h>
[e3c762cd]64#include <syscall/copy.h>
[d0c5901]65#include <console/console.h>
[253f35a1]66#include <print.h>
[a996ae31]67#include <macros.h>
[3f74275]68#include <cap/cap.h>
[a996ae31]69
70static void ranges_unmap(irq_pio_range_t *ranges, size_t rangecount)
71{
[56c167c]72 for (size_t i = 0; i < rangecount; i++) {
[472d813]73#ifdef IO_SPACE_BOUNDARY
[a996ae31]74 if ((void *) ranges[i].base >= IO_SPACE_BOUNDARY)
[472d813]75#endif
[a996ae31]76 km_unmap(ranges[i].base, ranges[i].size);
77 }
78}
79
80static int ranges_map_and_apply(irq_pio_range_t *ranges, size_t rangecount,
81 irq_cmd_t *cmds, size_t cmdcount)
82{
83 /* Copy the physical base addresses aside. */
[56c167c]84 uintptr_t *pbase = malloc(rangecount * sizeof(uintptr_t), 0);
85 for (size_t i = 0; i < rangecount; i++)
[a996ae31]86 pbase[i] = ranges[i].base;
[56c167c]87
[a996ae31]88 /* Map the PIO ranges into the kernel virtual address space. */
[56c167c]89 for (size_t i = 0; i < rangecount; i++) {
[472d813]90#ifdef IO_SPACE_BOUNDARY
[a996ae31]91 if ((void *) ranges[i].base < IO_SPACE_BOUNDARY)
92 continue;
[472d813]93#endif
[a996ae31]94 ranges[i].base = km_map(pbase[i], ranges[i].size,
95 PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);
96 if (!ranges[i].base) {
97 ranges_unmap(ranges, i);
98 free(pbase);
99 return ENOMEM;
100 }
101 }
[56c167c]102
[a5d0143]103 /* Rewrite the IRQ code addresses from physical to kernel virtual. */
[56c167c]104 for (size_t i = 0; i < cmdcount; i++) {
[a996ae31]105 uintptr_t addr;
[f2bbe8c]106 size_t size;
[56c167c]107
[a996ae31]108 /* Process only commands that use an address. */
109 switch (cmds[i].cmd) {
110 case CMD_PIO_READ_8:
[56c167c]111 case CMD_PIO_WRITE_8:
112 case CMD_PIO_WRITE_A_8:
[f2bbe8c]113 size = 1;
114 break;
[56c167c]115 case CMD_PIO_READ_16:
116 case CMD_PIO_WRITE_16:
117 case CMD_PIO_WRITE_A_16:
[f2bbe8c]118 size = 2;
119 break;
[56c167c]120 case CMD_PIO_READ_32:
121 case CMD_PIO_WRITE_32:
122 case CMD_PIO_WRITE_A_32:
[f2bbe8c]123 size = 4;
[a996ae31]124 break;
125 default:
126 /* Move onto the next command. */
127 continue;
128 }
[56c167c]129
[a996ae31]130 addr = (uintptr_t) cmds[i].addr;
131
[56c167c]132 size_t j;
[a996ae31]133 for (j = 0; j < rangecount; j++) {
134 /* Find the matching range. */
[f2bbe8c]135 if (!iswithin(pbase[j], ranges[j].size, addr, size))
[a996ae31]136 continue;
[56c167c]137
[a996ae31]138 /* Switch the command to a kernel virtual address. */
139 addr -= pbase[j];
140 addr += ranges[j].base;
[56c167c]141
[a996ae31]142 cmds[i].addr = (void *) addr;
143 break;
[bd8c6537]144 }
[56c167c]145
[bd8c6537]146 if (j == rangecount) {
147 /*
148 * The address used in this command is outside of all
149 * defined ranges.
150 */
151 ranges_unmap(ranges, rangecount);
152 free(pbase);
153 return EINVAL;
154 }
[a996ae31]155 }
[56c167c]156
[a996ae31]157 free(pbase);
158 return EOK;
159}
[162f919]160
[a5d0143]161/** Statically check the top-half IRQ code
[8486c07]162 *
[a5d0143]163 * Check the top-half IRQ code for invalid or unsafe constructs.
[8486c07]164 *
165 */
166static int code_check(irq_cmd_t *cmds, size_t cmdcount)
167{
168 for (size_t i = 0; i < cmdcount; i++) {
169 /*
170 * Check for accepted ranges.
171 */
172 if (cmds[i].cmd >= CMD_LAST)
173 return EINVAL;
174
175 if (cmds[i].srcarg >= IPC_CALL_LEN)
176 return EINVAL;
177
178 if (cmds[i].dstarg >= IPC_CALL_LEN)
179 return EINVAL;
180
181 switch (cmds[i].cmd) {
182 case CMD_PREDICATE:
183 /*
184 * Check for control flow overflow.
185 * Note that jumping just beyond the last
186 * command is a correct behaviour.
187 */
188 if (i + cmds[i].value > cmdcount)
189 return EINVAL;
190
191 break;
192 default:
193 break;
194 }
195 }
196
197 return EOK;
198}
199
[a5d0143]200/** Free the top-half IRQ code.
[8b243f2]201 *
[a5d0143]202 * @param code Pointer to the top-half IRQ code.
[da1bafb]203 *
[8b243f2]204 */
[162f919]205static void code_free(irq_code_t *code)
206{
207 if (code) {
[a996ae31]208 ranges_unmap(code->ranges, code->rangecount);
209 free(code->ranges);
[162f919]210 free(code->cmds);
211 free(code);
212 }
213}
214
[a5d0143]215/** Copy the top-half IRQ code from userspace into the kernel.
[8b243f2]216 *
[a5d0143]217 * @param ucode Userspace address of the top-half IRQ code.
[da1bafb]218 *
[a5d0143]219 * @return Kernel address of the copied IRQ code.
[8b243f2]220 *
221 */
222static irq_code_t *code_from_uspace(irq_code_t *ucode)
[162f919]223{
[a996ae31]224 irq_pio_range_t *ranges = NULL;
225 irq_cmd_t *cmds = NULL;
[56c167c]226
[da1bafb]227 irq_code_t *code = malloc(sizeof(*code), 0);
228 int rc = copy_from_uspace(code, ucode, sizeof(*code));
[a996ae31]229 if (rc != EOK)
230 goto error;
[162f919]231
[a996ae31]232 if ((code->rangecount > IRQ_MAX_RANGE_COUNT) ||
233 (code->cmdcount > IRQ_MAX_PROG_SIZE))
234 goto error;
[da1bafb]235
[a996ae31]236 ranges = malloc(sizeof(code->ranges[0]) * code->rangecount, 0);
237 rc = copy_from_uspace(ranges, code->ranges,
238 sizeof(code->ranges[0]) * code->rangecount);
239 if (rc != EOK)
240 goto error;
[56c167c]241
[a996ae31]242 cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
243 rc = copy_from_uspace(cmds, code->cmds,
[8b243f2]244 sizeof(code->cmds[0]) * code->cmdcount);
[a996ae31]245 if (rc != EOK)
246 goto error;
[8486c07]247
248 rc = code_check(cmds, code->cmdcount);
249 if (rc != EOK)
250 goto error;
251
[a996ae31]252 rc = ranges_map_and_apply(ranges, code->rangecount, cmds,
253 code->cmdcount);
254 if (rc != EOK)
255 goto error;
[56c167c]256
[a996ae31]257 code->ranges = ranges;
258 code->cmds = cmds;
[56c167c]259
[162f919]260 return code;
[56c167c]261
[a996ae31]262error:
263 if (cmds)
264 free(cmds);
[56c167c]265
[a996ae31]266 if (ranges)
267 free(ranges);
[56c167c]268
[a996ae31]269 free(code);
270 return NULL;
[162f919]271}
272
[c1f68b0]273static void irq_hash_out(irq_t *irq)
274{
275 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
276 irq_spinlock_lock(&irq->lock, false);
277
278 if (irq->notif_cfg.hashed_in) {
279 /* Remove the IRQ from the uspace IRQ hash table. */
280 hash_table_remove_item(&irq_uspace_hash_table, &irq->link);
281 irq->notif_cfg.hashed_in = false;
282 }
283
284 irq_spinlock_unlock(&irq->lock, false);
285 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
286}
287
[48bcf49]288static void irq_destroy(void *arg)
289{
290 irq_t *irq = (irq_t *) arg;
291
[c1f68b0]292 irq_hash_out(irq);
293
[48bcf49]294 /* Free up the IRQ code and associated structures. */
295 code_free(irq->notif_cfg.code);
296 slab_free(irq_slab, irq);
297}
298
299static kobject_ops_t irq_kobject_ops = {
300 .destroy = irq_destroy
301};
302
[8820544]303/** Subscribe an answerbox as a receiving end for IRQ notifications.
[2b017ba]304 *
[56c167c]305 * @param box Receiving answerbox.
306 * @param inr IRQ number.
[a5d0143]307 * @param imethod Interface and method to be associated with the notification.
308 * @param ucode Uspace pointer to top-half IRQ code.
[56c167c]309 *
[3f74275]310 * @return IRQ capability handle.
[e9d15d9]311 * @return Negative error code.
[2b017ba]312 *
313 */
[24abb85d]314int ipc_irq_subscribe(answerbox_t *box, inr_t inr, sysarg_t imethod,
315 irq_code_t *ucode)
[162f919]316{
[78ffb70]317 if ((inr < 0) || (inr > last_inr))
318 return ELIMIT;
[c822026]319
[da1bafb]320 irq_code_t *code;
[162f919]321 if (ucode) {
322 code = code_from_uspace(ucode);
323 if (!code)
324 return EBADMEM;
[da1bafb]325 } else
[162f919]326 code = NULL;
[c822026]327
[cecb0789]328 /*
[e9d15d9]329 * Allocate and populate the IRQ kernel object.
[cecb0789]330 */
[48bcf49]331 cap_handle_t handle = cap_alloc(TASK);
[3f74275]332 if (handle < 0)
333 return handle;
[63d8f43]334
[431c402]335 irq_t *irq = (irq_t *) slab_alloc(irq_slab, FRAME_ATOMIC);
[63d8f43]336 if (!irq) {
337 cap_free(TASK, handle);
338 return ENOMEM;
339 }
[48bcf49]340
341 kobject_t *kobject = malloc(sizeof(kobject_t), FRAME_ATOMIC);
342 if (!kobject) {
343 cap_free(TASK, handle);
344 slab_free(irq_slab, irq);
345 return ENOMEM;
346 }
[63d8f43]347
[cecb0789]348 irq_initialize(irq);
349 irq->inr = inr;
350 irq->claim = ipc_irq_top_half_claim;
[691eb52]351 irq->handler = ipc_irq_top_half_handler;
[4874c2d]352 irq->notif_cfg.notify = true;
[2b017ba]353 irq->notif_cfg.answerbox = box;
[228e490]354 irq->notif_cfg.imethod = imethod;
[2b017ba]355 irq->notif_cfg.code = code;
356 irq->notif_cfg.counter = 0;
[c822026]357
[cecb0789]358 /*
[9e87562]359 * Insert the IRQ structure into the uspace IRQ hash table.
[cecb0789]360 */
[da1bafb]361 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
362 irq_spinlock_lock(&irq->lock, false);
363
[48bcf49]364 irq->notif_cfg.hashed_in = true;
[82cbf8c6]365 hash_table_insert(&irq_uspace_hash_table, &irq->link);
[c822026]366
[da1bafb]367 irq_spinlock_unlock(&irq->lock, false);
368 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
[9e87562]369
[48bcf49]370 kobject_initialize(kobject, KOBJECT_TYPE_IRQ, irq, &irq_kobject_ops);
371 cap_publish(TASK, handle, kobject);
[da1bafb]372
[3f74275]373 return handle;
[cecb0789]374}
375
[8820544]376/** Unsubscribe task from IRQ notification.
[cecb0789]377 *
[3f74275]378 * @param box Answerbox associated with the notification.
379 * @param handle IRQ capability handle.
[56c167c]380 *
381 * @return EOK on success or a negative error code.
382 *
[cecb0789]383 */
[3f74275]384int ipc_irq_unsubscribe(answerbox_t *box, int handle)
[cecb0789]385{
[48bcf49]386 kobject_t *kobj = cap_unpublish(TASK, handle, KOBJECT_TYPE_IRQ);
387 if (!kobj)
[cecb0789]388 return ENOENT;
[9306cd7]389
[48bcf49]390 assert(kobj->irq->notif_cfg.answerbox == box);
391
[c1f68b0]392 irq_hash_out(kobj->irq);
[48bcf49]393
394 kobject_put(kobj);
[3f74275]395 cap_free(TASK, handle);
[cecb0789]396
397 return EOK;
398}
399
[8b243f2]400/** Add a call to the proper answerbox queue.
[2b017ba]401 *
[da1bafb]402 * Assume irq->lock is locked and interrupts disabled.
403 *
404 * @param irq IRQ structure referencing the target answerbox.
405 * @param call IRQ notification call.
[874621f]406 *
[2b017ba]407 */
408static void send_call(irq_t *irq, call_t *call)
[874621f]409{
[da1bafb]410 irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
[cfaa35a]411 list_append(&call->ab_link, &irq->notif_cfg.answerbox->irq_notifs);
[da1bafb]412 irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
413
[2b017ba]414 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
[874621f]415}
416
[a5d0143]417/** Apply the top-half IRQ code to find out whether to accept the IRQ or not.
[874621f]418 *
[da1bafb]419 * @param irq IRQ structure.
420 *
[a5d0143]421 * @return IRQ_ACCEPT if the interrupt is accepted by the IRQ code.
422 * @return IRQ_DECLINE if the interrupt is not accepted byt the IRQ code.
[cecb0789]423 *
[874621f]424 */
[cecb0789]425irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
[874621f]426{
[cecb0789]427 irq_code_t *code = irq->notif_cfg.code;
[da1bafb]428 uint32_t *scratch = irq->notif_cfg.scratch;
[cecb0789]429
430 if (!irq->notif_cfg.notify)
431 return IRQ_DECLINE;
432
433 if (!code)
434 return IRQ_DECLINE;
435
[01e39cbe]436 for (size_t i = 0; i < code->cmdcount; i++) {
[da1bafb]437 uintptr_t srcarg = code->cmds[i].srcarg;
438 uintptr_t dstarg = code->cmds[i].dstarg;
[874621f]439
[cecb0789]440 switch (code->cmds[i].cmd) {
441 case CMD_PIO_READ_8:
[8486c07]442 scratch[dstarg] =
443 pio_read_8((ioport8_t *) code->cmds[i].addr);
[cecb0789]444 break;
445 case CMD_PIO_READ_16:
[8486c07]446 scratch[dstarg] =
447 pio_read_16((ioport16_t *) code->cmds[i].addr);
[cecb0789]448 break;
449 case CMD_PIO_READ_32:
[8486c07]450 scratch[dstarg] =
451 pio_read_32((ioport32_t *) code->cmds[i].addr);
[cecb0789]452 break;
453 case CMD_PIO_WRITE_8:
454 pio_write_8((ioport8_t *) code->cmds[i].addr,
455 (uint8_t) code->cmds[i].value);
456 break;
457 case CMD_PIO_WRITE_16:
458 pio_write_16((ioport16_t *) code->cmds[i].addr,
459 (uint16_t) code->cmds[i].value);
460 break;
461 case CMD_PIO_WRITE_32:
462 pio_write_32((ioport32_t *) code->cmds[i].addr,
463 (uint32_t) code->cmds[i].value);
464 break;
[9cdac5a]465 case CMD_PIO_WRITE_A_8:
[8486c07]466 pio_write_8((ioport8_t *) code->cmds[i].addr,
467 (uint8_t) scratch[srcarg]);
[9cdac5a]468 break;
469 case CMD_PIO_WRITE_A_16:
[8486c07]470 pio_write_16((ioport16_t *) code->cmds[i].addr,
471 (uint16_t) scratch[srcarg]);
[9cdac5a]472 break;
473 case CMD_PIO_WRITE_A_32:
[8486c07]474 pio_write_32((ioport32_t *) code->cmds[i].addr,
475 (uint32_t) scratch[srcarg]);
476 break;
477 case CMD_LOAD:
478 scratch[dstarg] = code->cmds[i].value;
[9cdac5a]479 break;
[8486c07]480 case CMD_AND:
481 scratch[dstarg] = scratch[srcarg] &
482 code->cmds[i].value;
[cecb0789]483 break;
484 case CMD_PREDICATE:
[8486c07]485 if (scratch[srcarg] == 0)
[cecb0789]486 i += code->cmds[i].value;
[8486c07]487
[cecb0789]488 break;
489 case CMD_ACCEPT:
490 return IRQ_ACCEPT;
491 case CMD_DECLINE:
492 default:
493 return IRQ_DECLINE;
494 }
[874621f]495 }
[01e39cbe]496
[cecb0789]497 return IRQ_DECLINE;
[874621f]498}
499
[cecb0789]500/* IRQ top-half handler.
[162f919]501 *
[2b017ba]502 * We expect interrupts to be disabled and the irq->lock already held.
[8b243f2]503 *
[da1bafb]504 * @param irq IRQ structure.
505 *
[162f919]506 */
[cecb0789]507void ipc_irq_top_half_handler(irq_t *irq)
[162f919]508{
[63e27ef]509 assert(irq);
[56c167c]510
[63e27ef]511 assert(interrupts_disabled());
512 assert(irq_spinlock_locked(&irq->lock));
[da1bafb]513
[2b017ba]514 if (irq->notif_cfg.answerbox) {
[da1bafb]515 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]516 if (!call)
[d8f7362]517 return;
[cecb0789]518
[162f919]519 call->flags |= IPC_CALL_NOTIF;
[43752b6]520 /* Put a counter to the message */
[0c1a5d8a]521 call->priv = ++irq->notif_cfg.counter;
[da1bafb]522
[43752b6]523 /* Set up args */
[228e490]524 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]525 IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
526 IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
527 IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
528 IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
529 IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
[da1bafb]530
[2b017ba]531 send_call(irq, call);
[162f919]532 }
533}
534
[cecb0789]535/** Send notification message.
[874621f]536 *
[da1bafb]537 * @param irq IRQ structure.
538 * @param a1 Driver-specific payload argument.
539 * @param a2 Driver-specific payload argument.
540 * @param a3 Driver-specific payload argument.
541 * @param a4 Driver-specific payload argument.
542 * @param a5 Driver-specific payload argument.
543 *
[162f919]544 */
[96b02eb9]545void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
546 sysarg_t a4, sysarg_t a5)
[162f919]547{
[da1bafb]548 irq_spinlock_lock(&irq->lock, true);
549
[cecb0789]550 if (irq->notif_cfg.answerbox) {
[da1bafb]551 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]552 if (!call) {
[da1bafb]553 irq_spinlock_unlock(&irq->lock, true);
[cecb0789]554 return;
[b14e35f2]555 }
[da1bafb]556
[cecb0789]557 call->flags |= IPC_CALL_NOTIF;
558 /* Put a counter to the message */
559 call->priv = ++irq->notif_cfg.counter;
[da1bafb]560
[228e490]561 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]562 IPC_SET_ARG1(call->data, a1);
563 IPC_SET_ARG2(call->data, a2);
564 IPC_SET_ARG3(call->data, a3);
565 IPC_SET_ARG4(call->data, a4);
566 IPC_SET_ARG5(call->data, a5);
567
568 send_call(irq, call);
[b14e35f2]569 }
[da1bafb]570
571 irq_spinlock_unlock(&irq->lock, true);
[162f919]572}
[b45c443]573
[cc73a8a1]574/** @}
[b45c443]575 */
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