[162f919] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Ondrej Palkovsky
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| 3 | * Copyright (c) 2006 Jakub Jermar
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[162f919] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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[cc73a8a1] | 30 | /** @addtogroup genericipc
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[b45c443] | 31 | * @{
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| 32 | */
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[da1bafb] | 33 |
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[cc73a8a1] | 34 | /**
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| 35 | * @file
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| 36 | * @brief IRQ notification framework.
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[bdc5c516] | 37 | *
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| 38 | * This framework allows applications to register to receive a notification
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| 39 | * when interrupt is detected. The application may provide a simple 'top-half'
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| 40 | * handler as part of its registration, which can perform simple operations
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| 41 | * (read/write port/memory, add information to notification ipc message).
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| 42 | *
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| 43 | * The structure of a notification message is as follows:
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[8add9ca5] | 44 | * - IMETHOD: interface and method as registered by the SYS_REGISTER_IRQ
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[228e490] | 45 | * syscall
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[43752b6] | 46 | * - ARG1: payload modified by a 'top-half' handler
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[2b017ba] | 47 | * - ARG2: payload modified by a 'top-half' handler
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| 48 | * - ARG3: payload modified by a 'top-half' handler
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[cecb0789] | 49 | * - ARG4: payload modified by a 'top-half' handler
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| 50 | * - ARG5: payload modified by a 'top-half' handler
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[43752b6] | 51 | * - in_phone_hash: interrupt counter (may be needed to assure correct order
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[228e490] | 52 | * in multithreaded drivers)
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[cecb0789] | 53 | *
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| 54 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
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| 55 | * ipc_irq_cleanup() and IRQ handlers:
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| 56 | *
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| 57 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock
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| 58 | * and answerbox lock, we can rule out race conditions between the
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| 59 | * registration functions and also the cleanup function. Thus the observer can
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| 60 | * either see the IRQ structure present in both the hash table and the
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| 61 | * answerbox list or absent in both. Views in which the IRQ structure would be
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| 62 | * linked in the hash table but not in the answerbox list, or vice versa, are
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| 63 | * not possible.
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| 64 | *
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| 65 | * By always taking the hash table lock and the IRQ structure lock, we can
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| 66 | * rule out a scenario in which we would free up an IRQ structure, which is
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| 67 | * still referenced by, for example, an IRQ handler. The locking scheme forces
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| 68 | * us to lock the IRQ structure only after any progressing IRQs on that
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| 69 | * structure are finished. Because we hold the hash table lock, we prevent new
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| 70 | * IRQs from taking new references to the IRQ structure.
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[da1bafb] | 71 | *
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[bdc5c516] | 72 | */
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| 73 |
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[162f919] | 74 | #include <arch.h>
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| 75 | #include <mm/slab.h>
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| 76 | #include <errno.h>
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[2b017ba] | 77 | #include <ddi/irq.h>
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[162f919] | 78 | #include <ipc/ipc.h>
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| 79 | #include <ipc/irq.h>
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[e3c762cd] | 80 | #include <syscall/copy.h>
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[d0c5901] | 81 | #include <console/console.h>
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[253f35a1] | 82 | #include <print.h>
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[162f919] | 83 |
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[cecb0789] | 84 | /** Free the top-half pseudocode.
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[8b243f2] | 85 | *
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[da1bafb] | 86 | * @param code Pointer to the top-half pseudocode.
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| 87 | *
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[8b243f2] | 88 | */
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[162f919] | 89 | static void code_free(irq_code_t *code)
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| 90 | {
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| 91 | if (code) {
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| 92 | free(code->cmds);
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| 93 | free(code);
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| 94 | }
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| 95 | }
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| 96 |
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[cecb0789] | 97 | /** Copy the top-half pseudocode from userspace into the kernel.
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[8b243f2] | 98 | *
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[da1bafb] | 99 | * @param ucode Userspace address of the top-half pseudocode.
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| 100 | *
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| 101 | * @return Kernel address of the copied pseudocode.
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[8b243f2] | 102 | *
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| 103 | */
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| 104 | static irq_code_t *code_from_uspace(irq_code_t *ucode)
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[162f919] | 105 | {
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[da1bafb] | 106 | irq_code_t *code = malloc(sizeof(*code), 0);
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| 107 | int rc = copy_from_uspace(code, ucode, sizeof(*code));
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[e3c762cd] | 108 | if (rc != 0) {
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| 109 | free(code);
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| 110 | return NULL;
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| 111 | }
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[162f919] | 112 |
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| 113 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
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| 114 | free(code);
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| 115 | return NULL;
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| 116 | }
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[da1bafb] | 117 |
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| 118 | irq_cmd_t *ucmds = code->cmds;
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[8b243f2] | 119 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
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| 120 | rc = copy_from_uspace(code->cmds, ucmds,
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| 121 | sizeof(code->cmds[0]) * code->cmdcount);
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[e3c762cd] | 122 | if (rc != 0) {
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| 123 | free(code->cmds);
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| 124 | free(code);
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| 125 | return NULL;
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| 126 | }
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[da1bafb] | 127 |
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[162f919] | 128 | return code;
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| 129 | }
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| 130 |
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[2b017ba] | 131 | /** Register an answerbox as a receiving end for IRQ notifications.
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| 132 | *
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[78ffb70] | 133 | * @param box Receiving answerbox.
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| 134 | * @param inr IRQ number.
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| 135 | * @param devno Device number.
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| 136 | * @param imethod Interface and method to be associated with the
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| 137 | * notification.
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| 138 | * @param ucode Uspace pointer to top-half pseudocode.
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| 139 | * @return EOK on success or a negative error code.
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[2b017ba] | 140 | *
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| 141 | */
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[8b243f2] | 142 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
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[228e490] | 143 | sysarg_t imethod, irq_code_t *ucode)
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[162f919] | 144 | {
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[96b02eb9] | 145 | sysarg_t key[] = {
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| 146 | (sysarg_t) inr,
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| 147 | (sysarg_t) devno
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[cecb0789] | 148 | };
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[78ffb70] | 149 |
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| 150 | if ((inr < 0) || (inr > last_inr))
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| 151 | return ELIMIT;
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[c822026] | 152 |
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[da1bafb] | 153 | irq_code_t *code;
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[162f919] | 154 | if (ucode) {
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| 155 | code = code_from_uspace(ucode);
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| 156 | if (!code)
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| 157 | return EBADMEM;
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[da1bafb] | 158 | } else
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[162f919] | 159 | code = NULL;
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[c822026] | 160 |
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[cecb0789] | 161 | /*
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| 162 | * Allocate and populate the IRQ structure.
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| 163 | */
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[da1bafb] | 164 | irq_t *irq = malloc(sizeof(irq_t), 0);
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| 165 |
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[cecb0789] | 166 | irq_initialize(irq);
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| 167 | irq->devno = devno;
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| 168 | irq->inr = inr;
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| 169 | irq->claim = ipc_irq_top_half_claim;
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[691eb52] | 170 | irq->handler = ipc_irq_top_half_handler;
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[4874c2d] | 171 | irq->notif_cfg.notify = true;
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[2b017ba] | 172 | irq->notif_cfg.answerbox = box;
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[228e490] | 173 | irq->notif_cfg.imethod = imethod;
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[2b017ba] | 174 | irq->notif_cfg.code = code;
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| 175 | irq->notif_cfg.counter = 0;
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[c822026] | 176 |
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[cecb0789] | 177 | /*
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| 178 | * Enlist the IRQ structure in the uspace IRQ hash table and the
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| 179 | * answerbox's list.
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| 180 | */
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[da1bafb] | 181 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 182 |
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| 183 | link_t *hlp = hash_table_find(&irq_uspace_hash_table, key);
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[2845930] | 184 | if (hlp) {
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[da1bafb] | 185 | irq_t *hirq = hash_table_get_instance(hlp, irq_t, link);
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[c822026] | 186 |
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[2845930] | 187 | /* hirq is locked */
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[da1bafb] | 188 | irq_spinlock_unlock(&hirq->lock, false);
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[cecb0789] | 189 | code_free(code);
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[da1bafb] | 190 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 191 |
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[cecb0789] | 192 | free(irq);
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| 193 | return EEXISTS;
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| 194 | }
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[c822026] | 195 |
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[da1bafb] | 196 | /* Locking is not really necessary, but paranoid */
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| 197 | irq_spinlock_lock(&irq->lock, false);
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| 198 | irq_spinlock_lock(&box->irq_lock, false);
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| 199 |
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[cecb0789] | 200 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
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[b14e35f2] | 201 | list_append(&irq->notif_cfg.link, &box->irq_head);
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[c822026] | 202 |
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[da1bafb] | 203 | irq_spinlock_unlock(&box->irq_lock, false);
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| 204 | irq_spinlock_unlock(&irq->lock, false);
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| 205 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 206 |
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[cecb0789] | 207 | return EOK;
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| 208 | }
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| 209 |
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| 210 | /** Unregister task from IRQ notification.
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| 211 | *
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[78ffb70] | 212 | * @param box Answerbox associated with the notification.
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| 213 | * @param inr IRQ number.
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| 214 | * @param devno Device number.
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| 215 | * @return EOK on success or a negative error code.
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[cecb0789] | 216 | */
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| 217 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
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| 218 | {
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[96b02eb9] | 219 | sysarg_t key[] = {
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| 220 | (sysarg_t) inr,
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| 221 | (sysarg_t) devno
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[cecb0789] | 222 | };
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[78ffb70] | 223 |
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| 224 | if ((inr < 0) || (inr > last_inr))
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| 225 | return ELIMIT;
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[da1bafb] | 226 |
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| 227 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 228 | link_t *lnk = hash_table_find(&irq_uspace_hash_table, key);
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[cecb0789] | 229 | if (!lnk) {
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[da1bafb] | 230 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 231 | return ENOENT;
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| 232 | }
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[da1bafb] | 233 |
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| 234 | irq_t *irq = hash_table_get_instance(lnk, irq_t, link);
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| 235 |
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[2845930] | 236 | /* irq is locked */
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[da1bafb] | 237 | irq_spinlock_lock(&box->irq_lock, false);
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[cecb0789] | 238 |
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| 239 | ASSERT(irq->notif_cfg.answerbox == box);
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| 240 |
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| 241 | /* Free up the pseudo code and associated structures. */
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| 242 | code_free(irq->notif_cfg.code);
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[da1bafb] | 243 |
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| 244 | /* Remove the IRQ from the answerbox's list. */
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[cecb0789] | 245 | list_remove(&irq->notif_cfg.link);
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[da1bafb] | 246 |
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[2845930] | 247 | /*
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| 248 | * We need to drop the IRQ lock now because hash_table_remove() will try
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| 249 | * to reacquire it. That basically violates the natural locking order,
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| 250 | * but a deadlock in hash_table_remove() is prevented by the fact that
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| 251 | * we already held the IRQ lock and didn't drop the hash table lock in
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| 252 | * the meantime.
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| 253 | */
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[da1bafb] | 254 | irq_spinlock_unlock(&irq->lock, false);
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| 255 |
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[cecb0789] | 256 | /* Remove the IRQ from the uspace IRQ hash table. */
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| 257 | hash_table_remove(&irq_uspace_hash_table, key, 2);
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| 258 |
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[da1bafb] | 259 | irq_spinlock_unlock(&box->irq_lock, false);
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| 260 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 261 |
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| 262 | /* Free up the IRQ structure. */
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| 263 | free(irq);
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| 264 |
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| 265 | return EOK;
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| 266 | }
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| 267 |
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| 268 | /** Disconnect all IRQ notifications from an answerbox.
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| 269 | *
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| 270 | * This function is effective because the answerbox contains
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| 271 | * list of all irq_t structures that are registered to
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| 272 | * send notifications to it.
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| 273 | *
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[da1bafb] | 274 | * @param box Answerbox for which we want to carry out the cleanup.
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| 275 | *
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[cecb0789] | 276 | */
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| 277 | void ipc_irq_cleanup(answerbox_t *box)
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| 278 | {
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| 279 | loop:
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[da1bafb] | 280 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 281 | irq_spinlock_lock(&box->irq_lock, false);
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[cecb0789] | 282 |
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| 283 | while (box->irq_head.next != &box->irq_head) {
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| 284 | DEADLOCK_PROBE_INIT(p_irqlock);
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| 285 |
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[da1bafb] | 286 | irq_t *irq = list_get_instance(box->irq_head.next, irq_t,
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| 287 | notif_cfg.link);
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| 288 |
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| 289 | if (!irq_spinlock_trylock(&irq->lock)) {
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[cecb0789] | 290 | /*
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| 291 | * Avoid deadlock by trying again.
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| 292 | */
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[da1bafb] | 293 | irq_spinlock_unlock(&box->irq_lock, false);
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| 294 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 295 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
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| 296 | goto loop;
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| 297 | }
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[da1bafb] | 298 |
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[96b02eb9] | 299 | sysarg_t key[2];
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[cecb0789] | 300 | key[0] = irq->inr;
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| 301 | key[1] = irq->devno;
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| 302 |
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| 303 | ASSERT(irq->notif_cfg.answerbox == box);
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| 304 |
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| 305 | /* Unlist from the answerbox. */
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| 306 | list_remove(&irq->notif_cfg.link);
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| 307 |
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| 308 | /* Free up the pseudo code and associated structures. */
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| 309 | code_free(irq->notif_cfg.code);
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| 310 |
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[2845930] | 311 | /*
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| 312 | * We need to drop the IRQ lock now because hash_table_remove()
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| 313 | * will try to reacquire it. That basically violates the natural
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| 314 | * locking order, but a deadlock in hash_table_remove() is
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| 315 | * prevented by the fact that we already held the IRQ lock and
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| 316 | * didn't drop the hash table lock in the meantime.
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| 317 | */
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[da1bafb] | 318 | irq_spinlock_unlock(&irq->lock, false);
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[37be841] | 319 |
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| 320 | /* Remove from the hash table. */
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| 321 | hash_table_remove(&irq_uspace_hash_table, key, 2);
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| 322 |
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[cecb0789] | 323 | free(irq);
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| 324 | }
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| 325 |
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[da1bafb] | 326 | irq_spinlock_unlock(&box->irq_lock, false);
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| 327 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[162f919] | 328 | }
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| 329 |
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[8b243f2] | 330 | /** Add a call to the proper answerbox queue.
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[2b017ba] | 331 | *
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[da1bafb] | 332 | * Assume irq->lock is locked and interrupts disabled.
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| 333 | *
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| 334 | * @param irq IRQ structure referencing the target answerbox.
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| 335 | * @param call IRQ notification call.
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[874621f] | 336 | *
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[2b017ba] | 337 | */
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| 338 | static void send_call(irq_t *irq, call_t *call)
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[874621f] | 339 | {
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[da1bafb] | 340 | irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
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[2b017ba] | 341 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
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[da1bafb] | 342 | irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
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| 343 |
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[2b017ba] | 344 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
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[874621f] | 345 | }
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| 346 |
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[cecb0789] | 347 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
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[874621f] | 348 | *
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[da1bafb] | 349 | * @param irq IRQ structure.
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| 350 | *
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| 351 | * @return IRQ_ACCEPT if the interrupt is accepted by the
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| 352 | * pseudocode, IRQ_DECLINE otherwise.
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[cecb0789] | 353 | *
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[874621f] | 354 | */
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[cecb0789] | 355 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
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[874621f] | 356 | {
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[cecb0789] | 357 | irq_code_t *code = irq->notif_cfg.code;
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[da1bafb] | 358 | uint32_t *scratch = irq->notif_cfg.scratch;
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[cecb0789] | 359 |
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| 360 | if (!irq->notif_cfg.notify)
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| 361 | return IRQ_DECLINE;
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| 362 |
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| 363 | if (!code)
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| 364 | return IRQ_DECLINE;
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| 365 |
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[da1bafb] | 366 | size_t i;
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[cecb0789] | 367 | for (i = 0; i < code->cmdcount; i++) {
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[da1bafb] | 368 | uint32_t dstval;
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| 369 | uintptr_t srcarg = code->cmds[i].srcarg;
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| 370 | uintptr_t dstarg = code->cmds[i].dstarg;
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[874621f] | 371 |
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[cecb0789] | 372 | if (srcarg >= IPC_CALL_LEN)
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| 373 | break;
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[da1bafb] | 374 |
|
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[cecb0789] | 375 | if (dstarg >= IPC_CALL_LEN)
|
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| 376 | break;
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| 377 |
|
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| 378 | switch (code->cmds[i].cmd) {
|
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| 379 | case CMD_PIO_READ_8:
|
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| 380 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
|
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| 381 | if (dstarg)
|
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| 382 | scratch[dstarg] = dstval;
|
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| 383 | break;
|
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| 384 | case CMD_PIO_READ_16:
|
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| 385 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
|
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| 386 | if (dstarg)
|
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| 387 | scratch[dstarg] = dstval;
|
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| 388 | break;
|
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| 389 | case CMD_PIO_READ_32:
|
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| 390 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
|
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| 391 | if (dstarg)
|
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| 392 | scratch[dstarg] = dstval;
|
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| 393 | break;
|
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| 394 | case CMD_PIO_WRITE_8:
|
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| 395 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
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| 396 | (uint8_t) code->cmds[i].value);
|
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| 397 | break;
|
---|
| 398 | case CMD_PIO_WRITE_16:
|
---|
| 399 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
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| 400 | (uint16_t) code->cmds[i].value);
|
---|
| 401 | break;
|
---|
| 402 | case CMD_PIO_WRITE_32:
|
---|
| 403 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
---|
| 404 | (uint32_t) code->cmds[i].value);
|
---|
| 405 | break;
|
---|
[9cdac5a] | 406 | case CMD_PIO_WRITE_A_8:
|
---|
| 407 | if (srcarg) {
|
---|
| 408 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
---|
| 409 | (uint8_t) scratch[srcarg]);
|
---|
| 410 | }
|
---|
| 411 | break;
|
---|
| 412 | case CMD_PIO_WRITE_A_16:
|
---|
| 413 | if (srcarg) {
|
---|
| 414 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
---|
| 415 | (uint16_t) scratch[srcarg]);
|
---|
| 416 | }
|
---|
| 417 | break;
|
---|
| 418 | case CMD_PIO_WRITE_A_32:
|
---|
| 419 | if (srcarg) {
|
---|
| 420 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
---|
| 421 | (uint32_t) scratch[srcarg]);
|
---|
| 422 | }
|
---|
| 423 | break;
|
---|
[cecb0789] | 424 | case CMD_BTEST:
|
---|
[da1bafb] | 425 | if ((srcarg) && (dstarg)) {
|
---|
[cecb0789] | 426 | dstval = scratch[srcarg] & code->cmds[i].value;
|
---|
| 427 | scratch[dstarg] = dstval;
|
---|
| 428 | }
|
---|
| 429 | break;
|
---|
| 430 | case CMD_PREDICATE:
|
---|
[da1bafb] | 431 | if ((srcarg) && (!scratch[srcarg])) {
|
---|
[cecb0789] | 432 | i += code->cmds[i].value;
|
---|
| 433 | continue;
|
---|
| 434 | }
|
---|
| 435 | break;
|
---|
| 436 | case CMD_ACCEPT:
|
---|
| 437 | return IRQ_ACCEPT;
|
---|
| 438 | case CMD_DECLINE:
|
---|
| 439 | default:
|
---|
| 440 | return IRQ_DECLINE;
|
---|
| 441 | }
|
---|
[874621f] | 442 | }
|
---|
[cecb0789] | 443 |
|
---|
| 444 | return IRQ_DECLINE;
|
---|
[874621f] | 445 | }
|
---|
| 446 |
|
---|
[cecb0789] | 447 | /* IRQ top-half handler.
|
---|
[162f919] | 448 | *
|
---|
[2b017ba] | 449 | * We expect interrupts to be disabled and the irq->lock already held.
|
---|
[8b243f2] | 450 | *
|
---|
[da1bafb] | 451 | * @param irq IRQ structure.
|
---|
| 452 | *
|
---|
[162f919] | 453 | */
|
---|
[cecb0789] | 454 | void ipc_irq_top_half_handler(irq_t *irq)
|
---|
[162f919] | 455 | {
|
---|
[2b017ba] | 456 | ASSERT(irq);
|
---|
[1d432f9] | 457 |
|
---|
| 458 | ASSERT(interrupts_disabled());
|
---|
| 459 | ASSERT(irq_spinlock_locked(&irq->lock));
|
---|
[da1bafb] | 460 |
|
---|
[2b017ba] | 461 | if (irq->notif_cfg.answerbox) {
|
---|
[da1bafb] | 462 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
---|
[cecb0789] | 463 | if (!call)
|
---|
[d8f7362] | 464 | return;
|
---|
[cecb0789] | 465 |
|
---|
[162f919] | 466 | call->flags |= IPC_CALL_NOTIF;
|
---|
[43752b6] | 467 | /* Put a counter to the message */
|
---|
[0c1a5d8a] | 468 | call->priv = ++irq->notif_cfg.counter;
|
---|
[da1bafb] | 469 |
|
---|
[43752b6] | 470 | /* Set up args */
|
---|
[228e490] | 471 | IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
|
---|
[cecb0789] | 472 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
|
---|
| 473 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
|
---|
| 474 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
|
---|
| 475 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
|
---|
| 476 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
|
---|
[da1bafb] | 477 |
|
---|
[2b017ba] | 478 | send_call(irq, call);
|
---|
[162f919] | 479 | }
|
---|
| 480 | }
|
---|
| 481 |
|
---|
[cecb0789] | 482 | /** Send notification message.
|
---|
[874621f] | 483 | *
|
---|
[da1bafb] | 484 | * @param irq IRQ structure.
|
---|
| 485 | * @param a1 Driver-specific payload argument.
|
---|
| 486 | * @param a2 Driver-specific payload argument.
|
---|
| 487 | * @param a3 Driver-specific payload argument.
|
---|
| 488 | * @param a4 Driver-specific payload argument.
|
---|
| 489 | * @param a5 Driver-specific payload argument.
|
---|
| 490 | *
|
---|
[162f919] | 491 | */
|
---|
[96b02eb9] | 492 | void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
|
---|
| 493 | sysarg_t a4, sysarg_t a5)
|
---|
[162f919] | 494 | {
|
---|
[da1bafb] | 495 | irq_spinlock_lock(&irq->lock, true);
|
---|
| 496 |
|
---|
[cecb0789] | 497 | if (irq->notif_cfg.answerbox) {
|
---|
[da1bafb] | 498 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
---|
[cecb0789] | 499 | if (!call) {
|
---|
[da1bafb] | 500 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[cecb0789] | 501 | return;
|
---|
[b14e35f2] | 502 | }
|
---|
[da1bafb] | 503 |
|
---|
[cecb0789] | 504 | call->flags |= IPC_CALL_NOTIF;
|
---|
| 505 | /* Put a counter to the message */
|
---|
| 506 | call->priv = ++irq->notif_cfg.counter;
|
---|
[da1bafb] | 507 |
|
---|
[228e490] | 508 | IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
|
---|
[cecb0789] | 509 | IPC_SET_ARG1(call->data, a1);
|
---|
| 510 | IPC_SET_ARG2(call->data, a2);
|
---|
| 511 | IPC_SET_ARG3(call->data, a3);
|
---|
| 512 | IPC_SET_ARG4(call->data, a4);
|
---|
| 513 | IPC_SET_ARG5(call->data, a5);
|
---|
| 514 |
|
---|
| 515 | send_call(irq, call);
|
---|
[b14e35f2] | 516 | }
|
---|
[da1bafb] | 517 |
|
---|
| 518 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[162f919] | 519 | }
|
---|
[b45c443] | 520 |
|
---|
[cc73a8a1] | 521 | /** @}
|
---|
[b45c443] | 522 | */
|
---|