[162f919] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Ondrej Palkovsky
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| 3 | * Copyright (c) 2006 Jakub Jermar
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[162f919] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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[cc73a8a1] | 30 | /** @addtogroup genericipc
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[b45c443] | 31 | * @{
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| 32 | */
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[da1bafb] | 33 |
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[cc73a8a1] | 34 | /**
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| 35 | * @file
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| 36 | * @brief IRQ notification framework.
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[bdc5c516] | 37 | *
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| 38 | * This framework allows applications to register to receive a notification
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| 39 | * when interrupt is detected. The application may provide a simple 'top-half'
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| 40 | * handler as part of its registration, which can perform simple operations
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| 41 | * (read/write port/memory, add information to notification ipc message).
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| 42 | *
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| 43 | * The structure of a notification message is as follows:
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[2b017ba] | 44 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall
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[43752b6] | 45 | * - ARG1: payload modified by a 'top-half' handler
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[2b017ba] | 46 | * - ARG2: payload modified by a 'top-half' handler
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| 47 | * - ARG3: payload modified by a 'top-half' handler
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[cecb0789] | 48 | * - ARG4: payload modified by a 'top-half' handler
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| 49 | * - ARG5: payload modified by a 'top-half' handler
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[43752b6] | 50 | * - in_phone_hash: interrupt counter (may be needed to assure correct order
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[bdc5c516] | 51 | * in multithreaded drivers)
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[cecb0789] | 52 | *
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| 53 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
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| 54 | * ipc_irq_cleanup() and IRQ handlers:
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| 55 | *
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| 56 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock
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| 57 | * and answerbox lock, we can rule out race conditions between the
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| 58 | * registration functions and also the cleanup function. Thus the observer can
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| 59 | * either see the IRQ structure present in both the hash table and the
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| 60 | * answerbox list or absent in both. Views in which the IRQ structure would be
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| 61 | * linked in the hash table but not in the answerbox list, or vice versa, are
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| 62 | * not possible.
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| 63 | *
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| 64 | * By always taking the hash table lock and the IRQ structure lock, we can
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| 65 | * rule out a scenario in which we would free up an IRQ structure, which is
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| 66 | * still referenced by, for example, an IRQ handler. The locking scheme forces
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| 67 | * us to lock the IRQ structure only after any progressing IRQs on that
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| 68 | * structure are finished. Because we hold the hash table lock, we prevent new
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| 69 | * IRQs from taking new references to the IRQ structure.
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[da1bafb] | 70 | *
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[bdc5c516] | 71 | */
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| 72 |
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[162f919] | 73 | #include <arch.h>
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| 74 | #include <mm/slab.h>
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| 75 | #include <errno.h>
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[2b017ba] | 76 | #include <ddi/irq.h>
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[162f919] | 77 | #include <ipc/ipc.h>
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| 78 | #include <ipc/irq.h>
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[e3c762cd] | 79 | #include <syscall/copy.h>
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[d0c5901] | 80 | #include <console/console.h>
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[253f35a1] | 81 | #include <print.h>
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[162f919] | 82 |
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[cecb0789] | 83 | /** Free the top-half pseudocode.
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[8b243f2] | 84 | *
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[da1bafb] | 85 | * @param code Pointer to the top-half pseudocode.
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| 86 | *
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[8b243f2] | 87 | */
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[162f919] | 88 | static void code_free(irq_code_t *code)
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| 89 | {
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| 90 | if (code) {
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| 91 | free(code->cmds);
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| 92 | free(code);
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| 93 | }
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| 94 | }
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| 95 |
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[cecb0789] | 96 | /** Copy the top-half pseudocode from userspace into the kernel.
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[8b243f2] | 97 | *
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[da1bafb] | 98 | * @param ucode Userspace address of the top-half pseudocode.
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| 99 | *
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| 100 | * @return Kernel address of the copied pseudocode.
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[8b243f2] | 101 | *
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| 102 | */
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| 103 | static irq_code_t *code_from_uspace(irq_code_t *ucode)
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[162f919] | 104 | {
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[da1bafb] | 105 | irq_code_t *code = malloc(sizeof(*code), 0);
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| 106 | int rc = copy_from_uspace(code, ucode, sizeof(*code));
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[e3c762cd] | 107 | if (rc != 0) {
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| 108 | free(code);
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| 109 | return NULL;
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| 110 | }
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[162f919] | 111 |
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| 112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
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| 113 | free(code);
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| 114 | return NULL;
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| 115 | }
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[da1bafb] | 116 |
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| 117 | irq_cmd_t *ucmds = code->cmds;
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[8b243f2] | 118 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
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| 119 | rc = copy_from_uspace(code->cmds, ucmds,
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| 120 | sizeof(code->cmds[0]) * code->cmdcount);
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[e3c762cd] | 121 | if (rc != 0) {
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| 122 | free(code->cmds);
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| 123 | free(code);
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| 124 | return NULL;
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| 125 | }
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[da1bafb] | 126 |
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[162f919] | 127 | return code;
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| 128 | }
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| 129 |
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[2b017ba] | 130 | /** Register an answerbox as a receiving end for IRQ notifications.
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| 131 | *
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[c822026] | 132 | * @param box Receiving answerbox.
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| 133 | * @param inr IRQ number.
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| 134 | * @param devno Device number.
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| 135 | * @param method Method to be associated with the notification.
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| 136 | * @param ucode Uspace pointer to top-half pseudocode.
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| 137 | *
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| 138 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success.
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[2b017ba] | 139 | *
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| 140 | */
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[8b243f2] | 141 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
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| 142 | unative_t method, irq_code_t *ucode)
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[162f919] | 143 | {
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[cecb0789] | 144 | unative_t key[] = {
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| 145 | (unative_t) inr,
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| 146 | (unative_t) devno
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| 147 | };
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[c822026] | 148 |
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[da1bafb] | 149 | irq_code_t *code;
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[162f919] | 150 | if (ucode) {
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| 151 | code = code_from_uspace(ucode);
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| 152 | if (!code)
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| 153 | return EBADMEM;
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[da1bafb] | 154 | } else
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[162f919] | 155 | code = NULL;
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[c822026] | 156 |
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[cecb0789] | 157 | /*
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| 158 | * Allocate and populate the IRQ structure.
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| 159 | */
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[da1bafb] | 160 | irq_t *irq = malloc(sizeof(irq_t), 0);
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| 161 |
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[cecb0789] | 162 | irq_initialize(irq);
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| 163 | irq->devno = devno;
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| 164 | irq->inr = inr;
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| 165 | irq->claim = ipc_irq_top_half_claim;
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[691eb52] | 166 | irq->handler = ipc_irq_top_half_handler;
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[4874c2d] | 167 | irq->notif_cfg.notify = true;
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[2b017ba] | 168 | irq->notif_cfg.answerbox = box;
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| 169 | irq->notif_cfg.method = method;
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| 170 | irq->notif_cfg.code = code;
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| 171 | irq->notif_cfg.counter = 0;
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[c822026] | 172 |
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[cecb0789] | 173 | /*
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| 174 | * Enlist the IRQ structure in the uspace IRQ hash table and the
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| 175 | * answerbox's list.
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| 176 | */
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[da1bafb] | 177 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 178 |
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| 179 | link_t *hlp = hash_table_find(&irq_uspace_hash_table, key);
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[2845930] | 180 | if (hlp) {
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[da1bafb] | 181 | irq_t *hirq = hash_table_get_instance(hlp, irq_t, link);
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[c822026] | 182 |
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[2845930] | 183 | /* hirq is locked */
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[da1bafb] | 184 | irq_spinlock_unlock(&hirq->lock, false);
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[cecb0789] | 185 | code_free(code);
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[da1bafb] | 186 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 187 |
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[cecb0789] | 188 | free(irq);
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| 189 | return EEXISTS;
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| 190 | }
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[c822026] | 191 |
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[da1bafb] | 192 | /* Locking is not really necessary, but paranoid */
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| 193 | irq_spinlock_lock(&irq->lock, false);
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| 194 | irq_spinlock_lock(&box->irq_lock, false);
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| 195 |
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[cecb0789] | 196 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
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[b14e35f2] | 197 | list_append(&irq->notif_cfg.link, &box->irq_head);
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[c822026] | 198 |
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[da1bafb] | 199 | irq_spinlock_unlock(&box->irq_lock, false);
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| 200 | irq_spinlock_unlock(&irq->lock, false);
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| 201 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 202 |
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[cecb0789] | 203 | return EOK;
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| 204 | }
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| 205 |
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| 206 | /** Unregister task from IRQ notification.
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| 207 | *
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[da1bafb] | 208 | * @param box Answerbox associated with the notification.
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| 209 | * @param inr IRQ number.
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| 210 | * @param devno Device number.
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| 211 | *
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[cecb0789] | 212 | */
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| 213 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
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| 214 | {
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| 215 | unative_t key[] = {
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| 216 | (unative_t) inr,
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| 217 | (unative_t) devno
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| 218 | };
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[da1bafb] | 219 |
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| 220 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 221 | link_t *lnk = hash_table_find(&irq_uspace_hash_table, key);
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[cecb0789] | 222 | if (!lnk) {
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[da1bafb] | 223 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 224 | return ENOENT;
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| 225 | }
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[da1bafb] | 226 |
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| 227 | irq_t *irq = hash_table_get_instance(lnk, irq_t, link);
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| 228 |
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[2845930] | 229 | /* irq is locked */
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[da1bafb] | 230 | irq_spinlock_lock(&box->irq_lock, false);
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[cecb0789] | 231 |
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| 232 | ASSERT(irq->notif_cfg.answerbox == box);
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| 233 |
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| 234 | /* Free up the pseudo code and associated structures. */
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| 235 | code_free(irq->notif_cfg.code);
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[da1bafb] | 236 |
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| 237 | /* Remove the IRQ from the answerbox's list. */
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[cecb0789] | 238 | list_remove(&irq->notif_cfg.link);
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[da1bafb] | 239 |
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[2845930] | 240 | /*
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| 241 | * We need to drop the IRQ lock now because hash_table_remove() will try
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| 242 | * to reacquire it. That basically violates the natural locking order,
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| 243 | * but a deadlock in hash_table_remove() is prevented by the fact that
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| 244 | * we already held the IRQ lock and didn't drop the hash table lock in
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| 245 | * the meantime.
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| 246 | */
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[da1bafb] | 247 | irq_spinlock_unlock(&irq->lock, false);
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| 248 |
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[cecb0789] | 249 | /* Remove the IRQ from the uspace IRQ hash table. */
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| 250 | hash_table_remove(&irq_uspace_hash_table, key, 2);
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| 251 |
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[da1bafb] | 252 | irq_spinlock_unlock(&box->irq_lock, false);
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| 253 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 254 |
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| 255 | /* Free up the IRQ structure. */
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| 256 | free(irq);
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| 257 |
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| 258 | return EOK;
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| 259 | }
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| 260 |
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| 261 | /** Disconnect all IRQ notifications from an answerbox.
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| 262 | *
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| 263 | * This function is effective because the answerbox contains
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| 264 | * list of all irq_t structures that are registered to
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| 265 | * send notifications to it.
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| 266 | *
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[da1bafb] | 267 | * @param box Answerbox for which we want to carry out the cleanup.
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| 268 | *
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[cecb0789] | 269 | */
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| 270 | void ipc_irq_cleanup(answerbox_t *box)
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| 271 | {
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| 272 | loop:
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[da1bafb] | 273 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 274 | irq_spinlock_lock(&box->irq_lock, false);
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[cecb0789] | 275 |
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| 276 | while (box->irq_head.next != &box->irq_head) {
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| 277 | DEADLOCK_PROBE_INIT(p_irqlock);
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| 278 |
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[da1bafb] | 279 | irq_t *irq = list_get_instance(box->irq_head.next, irq_t,
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| 280 | notif_cfg.link);
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| 281 |
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| 282 | if (!irq_spinlock_trylock(&irq->lock)) {
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[cecb0789] | 283 | /*
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| 284 | * Avoid deadlock by trying again.
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| 285 | */
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[da1bafb] | 286 | irq_spinlock_unlock(&box->irq_lock, false);
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| 287 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[cecb0789] | 288 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
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| 289 | goto loop;
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| 290 | }
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[da1bafb] | 291 |
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| 292 | unative_t key[2];
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[cecb0789] | 293 | key[0] = irq->inr;
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| 294 | key[1] = irq->devno;
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| 295 |
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| 296 | ASSERT(irq->notif_cfg.answerbox == box);
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| 297 |
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| 298 | /* Unlist from the answerbox. */
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| 299 | list_remove(&irq->notif_cfg.link);
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| 300 |
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| 301 | /* Free up the pseudo code and associated structures. */
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| 302 | code_free(irq->notif_cfg.code);
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| 303 |
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[2845930] | 304 | /*
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| 305 | * We need to drop the IRQ lock now because hash_table_remove()
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| 306 | * will try to reacquire it. That basically violates the natural
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| 307 | * locking order, but a deadlock in hash_table_remove() is
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| 308 | * prevented by the fact that we already held the IRQ lock and
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| 309 | * didn't drop the hash table lock in the meantime.
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| 310 | */
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[da1bafb] | 311 | irq_spinlock_unlock(&irq->lock, false);
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[37be841] | 312 |
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| 313 | /* Remove from the hash table. */
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| 314 | hash_table_remove(&irq_uspace_hash_table, key, 2);
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| 315 |
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[cecb0789] | 316 | free(irq);
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| 317 | }
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| 318 |
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[da1bafb] | 319 | irq_spinlock_unlock(&box->irq_lock, false);
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| 320 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[162f919] | 321 | }
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| 322 |
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[8b243f2] | 323 | /** Add a call to the proper answerbox queue.
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[2b017ba] | 324 | *
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[da1bafb] | 325 | * Assume irq->lock is locked and interrupts disabled.
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| 326 | *
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| 327 | * @param irq IRQ structure referencing the target answerbox.
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| 328 | * @param call IRQ notification call.
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[874621f] | 329 | *
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[2b017ba] | 330 | */
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| 331 | static void send_call(irq_t *irq, call_t *call)
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[874621f] | 332 | {
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[da1bafb] | 333 | irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
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[2b017ba] | 334 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
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[da1bafb] | 335 | irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
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| 336 |
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[2b017ba] | 337 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
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[874621f] | 338 | }
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| 339 |
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[cecb0789] | 340 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
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[874621f] | 341 | *
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[da1bafb] | 342 | * @param irq IRQ structure.
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| 343 | *
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| 344 | * @return IRQ_ACCEPT if the interrupt is accepted by the
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| 345 | * pseudocode, IRQ_DECLINE otherwise.
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[cecb0789] | 346 | *
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[874621f] | 347 | */
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[cecb0789] | 348 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
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[874621f] | 349 | {
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[cecb0789] | 350 | irq_code_t *code = irq->notif_cfg.code;
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[da1bafb] | 351 | uint32_t *scratch = irq->notif_cfg.scratch;
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[cecb0789] | 352 |
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| 353 | if (!irq->notif_cfg.notify)
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| 354 | return IRQ_DECLINE;
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| 355 |
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| 356 | if (!code)
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| 357 | return IRQ_DECLINE;
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| 358 |
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[da1bafb] | 359 | size_t i;
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[cecb0789] | 360 | for (i = 0; i < code->cmdcount; i++) {
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[da1bafb] | 361 | uint32_t dstval;
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| 362 | uintptr_t srcarg = code->cmds[i].srcarg;
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| 363 | uintptr_t dstarg = code->cmds[i].dstarg;
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[874621f] | 364 |
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[cecb0789] | 365 | if (srcarg >= IPC_CALL_LEN)
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| 366 | break;
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[da1bafb] | 367 |
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[cecb0789] | 368 | if (dstarg >= IPC_CALL_LEN)
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| 369 | break;
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| 370 |
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| 371 | switch (code->cmds[i].cmd) {
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| 372 | case CMD_PIO_READ_8:
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| 373 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
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| 374 | if (dstarg)
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| 375 | scratch[dstarg] = dstval;
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| 376 | break;
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| 377 | case CMD_PIO_READ_16:
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| 378 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
|
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| 379 | if (dstarg)
|
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| 380 | scratch[dstarg] = dstval;
|
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| 381 | break;
|
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| 382 | case CMD_PIO_READ_32:
|
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| 383 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
|
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| 384 | if (dstarg)
|
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| 385 | scratch[dstarg] = dstval;
|
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| 386 | break;
|
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| 387 | case CMD_PIO_WRITE_8:
|
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| 388 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
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| 389 | (uint8_t) code->cmds[i].value);
|
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| 390 | break;
|
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| 391 | case CMD_PIO_WRITE_16:
|
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| 392 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
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| 393 | (uint16_t) code->cmds[i].value);
|
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| 394 | break;
|
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| 395 | case CMD_PIO_WRITE_32:
|
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| 396 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
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| 397 | (uint32_t) code->cmds[i].value);
|
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| 398 | break;
|
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| 399 | case CMD_BTEST:
|
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[da1bafb] | 400 | if ((srcarg) && (dstarg)) {
|
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[cecb0789] | 401 | dstval = scratch[srcarg] & code->cmds[i].value;
|
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| 402 | scratch[dstarg] = dstval;
|
---|
| 403 | }
|
---|
| 404 | break;
|
---|
| 405 | case CMD_PREDICATE:
|
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[da1bafb] | 406 | if ((srcarg) && (!scratch[srcarg])) {
|
---|
[cecb0789] | 407 | i += code->cmds[i].value;
|
---|
| 408 | continue;
|
---|
| 409 | }
|
---|
| 410 | break;
|
---|
| 411 | case CMD_ACCEPT:
|
---|
| 412 | return IRQ_ACCEPT;
|
---|
| 413 | case CMD_DECLINE:
|
---|
| 414 | default:
|
---|
| 415 | return IRQ_DECLINE;
|
---|
| 416 | }
|
---|
[874621f] | 417 | }
|
---|
[cecb0789] | 418 |
|
---|
| 419 | return IRQ_DECLINE;
|
---|
[874621f] | 420 | }
|
---|
| 421 |
|
---|
[cecb0789] | 422 | /* IRQ top-half handler.
|
---|
[162f919] | 423 | *
|
---|
[2b017ba] | 424 | * We expect interrupts to be disabled and the irq->lock already held.
|
---|
[8b243f2] | 425 | *
|
---|
[da1bafb] | 426 | * @param irq IRQ structure.
|
---|
| 427 | *
|
---|
[162f919] | 428 | */
|
---|
[cecb0789] | 429 | void ipc_irq_top_half_handler(irq_t *irq)
|
---|
[162f919] | 430 | {
|
---|
[2b017ba] | 431 | ASSERT(irq);
|
---|
[1d432f9] | 432 |
|
---|
| 433 | ASSERT(interrupts_disabled());
|
---|
| 434 | ASSERT(irq_spinlock_locked(&irq->lock));
|
---|
[da1bafb] | 435 |
|
---|
[2b017ba] | 436 | if (irq->notif_cfg.answerbox) {
|
---|
[da1bafb] | 437 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
---|
[cecb0789] | 438 | if (!call)
|
---|
[d8f7362] | 439 | return;
|
---|
[cecb0789] | 440 |
|
---|
[162f919] | 441 | call->flags |= IPC_CALL_NOTIF;
|
---|
[43752b6] | 442 | /* Put a counter to the message */
|
---|
[0c1a5d8a] | 443 | call->priv = ++irq->notif_cfg.counter;
|
---|
[da1bafb] | 444 |
|
---|
[43752b6] | 445 | /* Set up args */
|
---|
[2b017ba] | 446 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
|
---|
[cecb0789] | 447 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
|
---|
| 448 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
|
---|
| 449 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
|
---|
| 450 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
|
---|
| 451 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
|
---|
[da1bafb] | 452 |
|
---|
[2b017ba] | 453 | send_call(irq, call);
|
---|
[162f919] | 454 | }
|
---|
| 455 | }
|
---|
| 456 |
|
---|
[cecb0789] | 457 | /** Send notification message.
|
---|
[874621f] | 458 | *
|
---|
[da1bafb] | 459 | * @param irq IRQ structure.
|
---|
| 460 | * @param a1 Driver-specific payload argument.
|
---|
| 461 | * @param a2 Driver-specific payload argument.
|
---|
| 462 | * @param a3 Driver-specific payload argument.
|
---|
| 463 | * @param a4 Driver-specific payload argument.
|
---|
| 464 | * @param a5 Driver-specific payload argument.
|
---|
| 465 | *
|
---|
[162f919] | 466 | */
|
---|
[cecb0789] | 467 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3,
|
---|
| 468 | unative_t a4, unative_t a5)
|
---|
[162f919] | 469 | {
|
---|
[da1bafb] | 470 | irq_spinlock_lock(&irq->lock, true);
|
---|
| 471 |
|
---|
[cecb0789] | 472 | if (irq->notif_cfg.answerbox) {
|
---|
[da1bafb] | 473 | call_t *call = ipc_call_alloc(FRAME_ATOMIC);
|
---|
[cecb0789] | 474 | if (!call) {
|
---|
[da1bafb] | 475 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[cecb0789] | 476 | return;
|
---|
[b14e35f2] | 477 | }
|
---|
[da1bafb] | 478 |
|
---|
[cecb0789] | 479 | call->flags |= IPC_CALL_NOTIF;
|
---|
| 480 | /* Put a counter to the message */
|
---|
| 481 | call->priv = ++irq->notif_cfg.counter;
|
---|
[da1bafb] | 482 |
|
---|
[cecb0789] | 483 | IPC_SET_METHOD(call->data, irq->notif_cfg.method);
|
---|
| 484 | IPC_SET_ARG1(call->data, a1);
|
---|
| 485 | IPC_SET_ARG2(call->data, a2);
|
---|
| 486 | IPC_SET_ARG3(call->data, a3);
|
---|
| 487 | IPC_SET_ARG4(call->data, a4);
|
---|
| 488 | IPC_SET_ARG5(call->data, a5);
|
---|
| 489 |
|
---|
| 490 | send_call(irq, call);
|
---|
[b14e35f2] | 491 | }
|
---|
[da1bafb] | 492 |
|
---|
| 493 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[162f919] | 494 | }
|
---|
[b45c443] | 495 |
|
---|
[cc73a8a1] | 496 | /** @}
|
---|
[b45c443] | 497 | */
|
---|